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Groups > linux.kernel > #1657112
| From | Icenowy Zheng <icenowy@aosc.io> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH v2 06/11] drm: sun4i: add color space correction support for DE2 mixer |
| Date | 2017-06-04 18:20 +0200 |
| Message-ID | <tOGpX-7x8-5@gated-at.bofh.it> (permalink) |
| References | <tOGgh-7tg-5@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
The DE2 mixer can do color space correction needed by TV Encoder with
its DCSC sub-engine.
Add support for it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
drivers/gpu/drm/sun4i/sun8i_mixer.c | 35 +++++++++++++++++++++++++++++++++++
drivers/gpu/drm/sun4i/sun8i_mixer.h | 6 +++++-
2 files changed, 40 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c
index d658a3a8159a..65f86641eca3 100644
--- a/drivers/gpu/drm/sun4i/sun8i_mixer.c
+++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c
@@ -29,6 +29,14 @@
#include "sun8i_layer.h"
#include "sunxi_engine.h"
+static const u32 sun8i_rgb2yuv_coef[12] = {
+ 0x00000107, 0x00000204, 0x00000064, 0x00004200,
+ 0x00001f68, 0x00001ed6, 0x000001c2, 0x00020200,
+ 0x000001c2, 0x00001e87, 0x00001fb7, 0x00020200,
+};
+
+static const u32 sun8i_rgb2yuv_dcsc_alpha = 0x00020200;
+
static void sun8i_mixer_commit(struct sunxi_engine *engine)
{
DRM_DEBUG_DRIVER("Committing changes\n");
@@ -37,6 +45,31 @@ static void sun8i_mixer_commit(struct sunxi_engine *engine)
SUN8I_MIXER_GLOBAL_DBUFF_ENABLE);
}
+static void sun8i_mixer_apply_color_correction(struct sunxi_engine *engine)
+{
+ int i;
+
+ DRM_DEBUG_DRIVER("Applying RGB to YUV color correction\n");
+
+ /* Set color correction */
+ regmap_write(engine->regs, SUN8I_MIXER_DCSC_EN, 1);
+
+ for (i = 0; i < 12; i++)
+ regmap_write(engine->regs, SUN8I_MIXER_DCSC_COEF_REG(i),
+ sun8i_rgb2yuv_coef[i]);
+
+ regmap_write(engine->regs, SUN8I_MIXER_DCSC_COEF_ALPHA,
+ sun8i_rgb2yuv_dcsc_alpha);
+}
+
+static void sun8i_mixer_disable_color_correction(struct sunxi_engine *engine)
+{
+ DRM_DEBUG_DRIVER("Disabling color correction\n");
+
+ /* Disable color correction */
+ regmap_write(engine->regs, SUN8I_MIXER_DCSC_EN, 0);
+}
+
void sun8i_mixer_layer_enable(struct sun8i_mixer *mixer,
int layer, bool enable)
{
@@ -229,6 +262,8 @@ int sun8i_mixer_update_layer_buffer(struct sun8i_mixer *mixer,
static const struct sunxi_engine_ops sun8i_engine_ops = {
.commit = sun8i_mixer_commit,
.layers_init = sun8i_layers_init,
+ .apply_color_correction = sun8i_mixer_apply_color_correction,
+ .disable_color_correction = sun8i_mixer_disable_color_correction,
};
static struct regmap_config sun8i_mixer_regmap_config = {
diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.h b/drivers/gpu/drm/sun4i/sun8i_mixer.h
index 4785ac090b8c..d7f7513898b6 100644
--- a/drivers/gpu/drm/sun4i/sun8i_mixer.h
+++ b/drivers/gpu/drm/sun4i/sun8i_mixer.h
@@ -88,6 +88,11 @@
#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_RGB888 (8 << 8)
#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA_DEF (0xff << 24)
+/* The DCSC sub-engine is used to do color space conversation */
+#define SUN8I_MIXER_DCSC_EN 0xb0000
+#define SUN8I_MIXER_DCSC_COEF_REG(x) (0xb0010 + 0x4 * x)
+#define SUN8I_MIXER_DCSC_COEF_ALPHA 0xb0040
+
/*
* These sub-engines are still unknown now, the EN registers are here only to
* be used to disable these sub-engines.
@@ -102,7 +107,6 @@
#define SUN8I_MIXER_PEAK_EN 0xa6000
#define SUN8I_MIXER_ASE_EN 0xa8000
#define SUN8I_MIXER_FCC_EN 0xaa000
-#define SUN8I_MIXER_DCSC_EN 0xb0000
struct sun8i_mixer_cfg {
int vi_num;
--
2.12.2
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[PATCH v2 00/11] Support for H3 Composite Output support Icenowy Zheng <icenowy@aosc.io> - 2017-06-04 18:10 +0200
[PATCH v2 04/11] drm: sun4i: add support for H3's TCON0/1 Icenowy Zheng <icenowy@aosc.io> - 2017-06-04 18:10 +0200
Re: [PATCH v2 04/11] drm: sun4i: add support for H3's TCON0/1 Jernej Škrabec <jernej.skrabec@siol.net> - 2017-06-04 21:00 +0200
Re: [PATCH v2 04/11] drm: sun4i: add support for H3's TCON0/1 Icenowy Zheng <icenowy@aosc.io> - 2017-06-04 21:10 +0200
Re: [PATCH v2 04/11] drm: sun4i: add support for H3's TCON0/1 Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-06-07 11:50 +0200
Re: [PATCH v2 04/11] drm: sun4i: add support for H3's TCON0/1 Icenowy Zheng <icenowy@aosc.io> - 2017-06-07 13:20 +0200
Re: [PATCH v2 04/11] drm: sun4i: add support for H3's TCON0/1 Icenowy Zheng <icenowy@aosc.io> - 2017-06-07 14:20 +0200
Re: [PATCH v2 04/11] drm: sun4i: add support for H3's TCON0/1 Icenowy Zheng <icenowy@aosc.io> - 2017-06-07 16:30 +0200
Re: [PATCH v2 04/11] drm: sun4i: add support for H3's TCON0/1 Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-06-07 16:50 +0200
[PATCH v2 11/11] [DO NOT MERGE] ARM: sun8i: h3: enable TV output on Orange Pi PC Icenowy Zheng <icenowy@aosc.io> - 2017-06-04 18:10 +0200
[PATCH v2 05/11] drm: sun4i: add compatible for H3 display engine Icenowy Zheng <icenowy@aosc.io> - 2017-06-04 18:20 +0200
[PATCH v2 06/11] drm: sun4i: add color space correction support for DE2 mixer Icenowy Zheng <icenowy@aosc.io> - 2017-06-04 18:20 +0200
[PATCH v2 08/11] clk: sunxi-ng: allow CLK_DE to set CLK_PLL_DE for H3 Icenowy Zheng <icenowy@aosc.io> - 2017-06-04 18:20 +0200
[PATCH v2 07/11] drm: sun4i: add support for the TV encoder in H3 SoC Icenowy Zheng <icenowy@aosc.io> - 2017-06-04 18:20 +0200
Re: [PATCH v2 07/11] drm: sun4i: add support for the TV encoder in H3 SoC Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-06-07 11:40 +0200
[PATCH v2 09/11] clk: sunxi-ng: export CLK_PLL_DE for H3 Icenowy Zheng <icenowy@aosc.io> - 2017-06-04 18:20 +0200
[PATCH v2 02/11] drm: sun4i: add support for H3 mixers Icenowy Zheng <icenowy@aosc.io> - 2017-06-04 18:30 +0200
[PATCH v2 10/11] ARM: sun8i: h3: add display engine pipeline for TVE Icenowy Zheng <icenowy@aosc.io> - 2017-06-04 18:30 +0200
Re: [PATCH v2 10/11] ARM: sun8i: h3: add display engine pipeline for TVE Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-06-07 11:50 +0200
Re: [PATCH v2 00/11] Support for H3 Composite Output support icenowy@aosc.io - 2017-06-07 02:30 +0200
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