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Groups > linux.kernel > #1647675
| From | Peter Zijlstra <peterz@infradead.org> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH 1/2] perf/x86/intel: enable CPU ref_cycles for GP counter |
| Date | 2017-05-23 08:40 +0200 |
| Message-ID | <tKbE5-7Qs-9@gated-at.bofh.it> (permalink) |
| References | <tIUlY-5uX-11@gated-at.bofh.it> <tJRP4-3Ve-19@gated-at.bofh.it> <tJYQy-8az-45@gated-at.bofh.it> <tK1bI-1hH-1@gated-at.bofh.it> <tK1bI-1hH-7@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On Mon, May 22, 2017 at 12:28:26PM -0700, Stephane Eranian wrote: > On Mon, May 22, 2017 at 12:23 PM, Peter Zijlstra <peterz@infradead.org> wrote: > > On Mon, May 22, 2017 at 04:55:47PM +0000, Liang, Kan wrote: > >> > >> > >> > On Fri, May 19, 2017 at 10:06:21AM -0700, kan.liang@intel.com wrote: > >> > > diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c index > >> > > 580b60f..e8b2326 100644 > >> > > --- a/arch/x86/events/core.c > >> > > +++ b/arch/x86/events/core.c > >> > > @@ -101,6 +101,10 @@ u64 x86_perf_event_update(struct perf_event > >> > *event) > >> > > delta = (new_raw_count << shift) - (prev_raw_count << shift); > >> > > delta >>= shift; > >> > > > >> > > + /* Correct the count number if applying ref_cycles replacement */ > >> > > + if (!is_sampling_event(event) && > >> > > + (hwc->flags & PERF_X86_EVENT_REF_CYCLES_REP)) > >> > > + delta *= x86_pmu.ref_cycles_factor; > >> > > >> > That condition seems wrong, why only correct for !sampling events? > >> > > >> > >> For sampling, it's either fixed freq mode or fixed period mode. > >> - In the fixed freq mode, we should do nothing, because the adaptive > >> frequency algorithm will handle it. > >> - In the fixed period mode, we have already adjusted the period in > >> ref_cycles_rep(). > >> Therefore, we should only handle !sampling events here. > > > > How so? For sampling events the actual event count should also be > > accurate. > > Yes, it must be. Because you can reconstruct the total number of > occurrences of the event by adding > all the periods recorded in each sample. So the period in each sample > must reflect user event and not > kernel event. Well, that, but you can equally use read() or the mmap()'ed rdpmc stuff on a sampling event. The fact that is also generates samples does not mean it should not also function as a non-sampling event.
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[PATCH 1/2] perf/x86/intel: enable CPU ref_cycles for GP counter kan.liang@intel.com - 2017-05-19 20:00 +0200
[PATCH 2/2] perf/x86/intel, watchdog: Switch NMI watchdog to ref cycles on x86 kan.liang@intel.com - 2017-05-19 20:00 +0200
Re: [PATCH 2/2] perf/x86/intel, watchdog: Switch NMI watchdog to ref cycles on x86 Peter Zijlstra <peterz@infradead.org> - 2017-05-22 14:10 +0200
Re: [PATCH 2/2] perf/x86/intel, watchdog: Switch NMI watchdog to ref cycles on x86 Peter Zijlstra <peterz@infradead.org> - 2017-05-22 14:10 +0200
RE: [PATCH 2/2] perf/x86/intel, watchdog: Switch NMI watchdog to ref cycles on x86 "Liang, Kan" <kan.liang@intel.com> - 2017-05-22 19:00 +0200
Re: [PATCH 2/2] perf/x86/intel, watchdog: Switch NMI watchdog to ref cycles on x86 Peter Zijlstra <peterz@infradead.org> - 2017-05-22 21:30 +0200
Re: [PATCH 2/2] perf/x86/intel, watchdog: Switch NMI watchdog to ref cycles on x86 Stephane Eranian <eranian@google.com> - 2017-05-22 20:30 +0200
Re: [PATCH 2/2] perf/x86/intel, watchdog: Switch NMI watchdog to ref cycles on x86 Andi Kleen <ak@linux.intel.com> - 2017-05-22 22:10 +0200
Re: [PATCH 1/2] perf/x86/intel: enable CPU ref_cycles for GP counter Peter Zijlstra <peterz@infradead.org> - 2017-05-22 10:40 +0200
Re: [PATCH 1/2] perf/x86/intel: enable CPU ref_cycles for GP counter Stephane Eranian <eranian@google.com> - 2017-05-22 20:20 +0200
Re: [PATCH 1/2] perf/x86/intel: enable CPU ref_cycles for GP counter Peter Zijlstra <peterz@infradead.org> - 2017-05-22 11:30 +0200
Re: [PATCH 1/2] perf/x86/intel: enable CPU ref_cycles for GP counter Peter Zijlstra <peterz@infradead.org> - 2017-05-22 14:30 +0200
RE: [PATCH 1/2] perf/x86/intel: enable CPU ref_cycles for GP counter "Liang, Kan" <kan.liang@intel.com> - 2017-05-22 19:00 +0200
RE: [PATCH 1/2] perf/x86/intel: enable CPU ref_cycles for GP counter "Liang, Kan" <kan.liang@intel.com> - 2017-05-22 19:00 +0200
Re: [PATCH 1/2] perf/x86/intel: enable CPU ref_cycles for GP counter Peter Zijlstra <peterz@infradead.org> - 2017-05-22 21:30 +0200
Re: [PATCH 1/2] perf/x86/intel: enable CPU ref_cycles for GP counter Stephane Eranian <eranian@google.com> - 2017-05-22 21:30 +0200
RE: [PATCH 1/2] perf/x86/intel: enable CPU ref_cycles for GP counter "Liang, Kan" <kan.liang@intel.com> - 2017-05-23 00:00 +0200
Re: [PATCH 1/2] perf/x86/intel: enable CPU ref_cycles for GP counter Peter Zijlstra <peterz@infradead.org> - 2017-05-23 08:40 +0200
Re: [PATCH 1/2] perf/x86/intel: enable CPU ref_cycles for GP counter Stephane Eranian <eranian@google.com> - 2017-05-23 08:50 +0200
Re: [PATCH 1/2] perf/x86/intel: enable CPU ref_cycles for GP counter Andi Kleen <ak@linux.intel.com> - 2017-05-24 17:50 +0200
Re: [PATCH 1/2] perf/x86/intel: enable CPU ref_cycles for GP counter Vince Weaver <vincent.weaver@maine.edu> - 2017-05-24 18:10 +0200
Re: [PATCH 1/2] perf/x86/intel: enable CPU ref_cycles for GP counter Andi Kleen <ak@linux.intel.com> - 2017-05-24 19:00 +0200
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