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Groups > linux.kernel > #1646830
| From | Peter Zijlstra <peterz@infradead.org> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH 1/2] perf/x86/intel: enable CPU ref_cycles for GP counter |
| Date | 2017-05-22 14:30 +0200 |
| Message-ID | <tJUDg-5Es-5@gated-at.bofh.it> (permalink) |
| References | <tIUlY-5uX-11@gated-at.bofh.it> <tJRP4-3Ve-19@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On Mon, May 22, 2017 at 11:19:16AM +0200, Peter Zijlstra wrote:
> On Fri, May 19, 2017 at 10:06:21AM -0700, kan.liang@intel.com wrote:
> > @@ -934,6 +938,21 @@ int x86_schedule_events(struct cpu_hw_events *cpuc, int n, int *assign)
> > for (i = 0; i < n; i++) {
> > e = cpuc->event_list[i];
> > e->hw.flags |= PERF_X86_EVENT_COMMITTED;
> > +
> > + /*
> > + * 0x0300 is pseudo-encoding for REF_CPU_CYCLES.
> > + * It indicates that fixed counter 2 should be used.
> > + *
> > + * If fixed counter 2 is occupied and a GP counter
> > + * is assigned, an alternative event which can be
> > + * counted in GP counter will be used to replace
> > + * the pseudo-encoding REF_CPU_CYCLES event.
> > + */
> > + if (((e->hw.config & X86_RAW_EVENT_MASK) == 0x0300) &&
> > + (assign[i] < INTEL_PMC_IDX_FIXED) &&
> > + x86_pmu.ref_cycles_rep)
> > + x86_pmu.ref_cycles_rep(e);
> > +
> > if (x86_pmu.commit_scheduling)
> > x86_pmu.commit_scheduling(cpuc, i, assign[i]);
> > }
>
> This looks dodgy, this is the branch were we managed to schedule all
> events. Why would we need to consider anything here?
>
> I was expecting a retry if there are still unscheduled events and one of
> the events was our 0x0300 event. In that case you have to reset the
> event and retry the whole scheduling thing.
Ah, I see what you've done. That Changelog could use a lot of help, it's
barely readable.
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[PATCH 1/2] perf/x86/intel: enable CPU ref_cycles for GP counter kan.liang@intel.com - 2017-05-19 20:00 +0200
[PATCH 2/2] perf/x86/intel, watchdog: Switch NMI watchdog to ref cycles on x86 kan.liang@intel.com - 2017-05-19 20:00 +0200
Re: [PATCH 2/2] perf/x86/intel, watchdog: Switch NMI watchdog to ref cycles on x86 Peter Zijlstra <peterz@infradead.org> - 2017-05-22 14:10 +0200
Re: [PATCH 2/2] perf/x86/intel, watchdog: Switch NMI watchdog to ref cycles on x86 Peter Zijlstra <peterz@infradead.org> - 2017-05-22 14:10 +0200
RE: [PATCH 2/2] perf/x86/intel, watchdog: Switch NMI watchdog to ref cycles on x86 "Liang, Kan" <kan.liang@intel.com> - 2017-05-22 19:00 +0200
Re: [PATCH 2/2] perf/x86/intel, watchdog: Switch NMI watchdog to ref cycles on x86 Peter Zijlstra <peterz@infradead.org> - 2017-05-22 21:30 +0200
Re: [PATCH 2/2] perf/x86/intel, watchdog: Switch NMI watchdog to ref cycles on x86 Stephane Eranian <eranian@google.com> - 2017-05-22 20:30 +0200
Re: [PATCH 2/2] perf/x86/intel, watchdog: Switch NMI watchdog to ref cycles on x86 Andi Kleen <ak@linux.intel.com> - 2017-05-22 22:10 +0200
Re: [PATCH 1/2] perf/x86/intel: enable CPU ref_cycles for GP counter Peter Zijlstra <peterz@infradead.org> - 2017-05-22 10:40 +0200
Re: [PATCH 1/2] perf/x86/intel: enable CPU ref_cycles for GP counter Stephane Eranian <eranian@google.com> - 2017-05-22 20:20 +0200
Re: [PATCH 1/2] perf/x86/intel: enable CPU ref_cycles for GP counter Peter Zijlstra <peterz@infradead.org> - 2017-05-22 11:30 +0200
Re: [PATCH 1/2] perf/x86/intel: enable CPU ref_cycles for GP counter Peter Zijlstra <peterz@infradead.org> - 2017-05-22 14:30 +0200
RE: [PATCH 1/2] perf/x86/intel: enable CPU ref_cycles for GP counter "Liang, Kan" <kan.liang@intel.com> - 2017-05-22 19:00 +0200
RE: [PATCH 1/2] perf/x86/intel: enable CPU ref_cycles for GP counter "Liang, Kan" <kan.liang@intel.com> - 2017-05-22 19:00 +0200
Re: [PATCH 1/2] perf/x86/intel: enable CPU ref_cycles for GP counter Peter Zijlstra <peterz@infradead.org> - 2017-05-22 21:30 +0200
Re: [PATCH 1/2] perf/x86/intel: enable CPU ref_cycles for GP counter Stephane Eranian <eranian@google.com> - 2017-05-22 21:30 +0200
RE: [PATCH 1/2] perf/x86/intel: enable CPU ref_cycles for GP counter "Liang, Kan" <kan.liang@intel.com> - 2017-05-23 00:00 +0200
Re: [PATCH 1/2] perf/x86/intel: enable CPU ref_cycles for GP counter Peter Zijlstra <peterz@infradead.org> - 2017-05-23 08:40 +0200
Re: [PATCH 1/2] perf/x86/intel: enable CPU ref_cycles for GP counter Stephane Eranian <eranian@google.com> - 2017-05-23 08:50 +0200
Re: [PATCH 1/2] perf/x86/intel: enable CPU ref_cycles for GP counter Andi Kleen <ak@linux.intel.com> - 2017-05-24 17:50 +0200
Re: [PATCH 1/2] perf/x86/intel: enable CPU ref_cycles for GP counter Vince Weaver <vincent.weaver@maine.edu> - 2017-05-24 18:10 +0200
Re: [PATCH 1/2] perf/x86/intel: enable CPU ref_cycles for GP counter Andi Kleen <ak@linux.intel.com> - 2017-05-24 19:00 +0200
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