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RE: [PATCH v3 1/2] PCI/portdrv: add support for different MSI interrupts for PCIe port services

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Hi Christoph

> -----Original Message-----
> From: linux-pci-owner@vger.kernel.org [mailto:linux-pci-
> owner@vger.kernel.org] On Behalf Of Christoph Hellwig
> Sent: 21 May 2017 09:33
> To: Gabriele Paoloni
> Cc: bhelgaas@google.com; helgaas@kernel.org; Linuxarm; linux-
> pci@vger.kernel.org; lukas@wunner.de; linux-kernel@vger.kernel.org;
> mika.westerberg@linux.intel.com; hch@infradead.org; liudongdong (C)
> Subject: Re: [PATCH v3 1/2] PCI/portdrv: add support for different MSI
> interrupts for PCIe port services
> 
> > +		 *
> > +		 * pci_irq_vector() below is able to handle entry
> diff erently
> > +		 * depending on MSI vs MSI-x case
> > +		 *
> >  		 */
> 
> One more instance of this comment left :)

I thought that in your previous review you meant to say that we should
avoid 2 instances of the same comment (in this patchset I only have this 
instance as I have removed the same comment from patch 2/2...)

> 
> >  		pcie_capability_read_word(dev, PCI_EXP_FLAGS, &reg16);
> >  		entry = (reg16 & PCI_EXP_FLAGS_IRQ) >> 9;
> > @@ -100,7 +107,10 @@ static int pcie_port_enable_msix(struct pci_dev
> *dev, int *irqs, int mask)
> >  		 * MSI/MSI-X vectors assigned to the port is going to be
> used
> >  		 * for AER, where "For MSI-X, the value in this register
> >  		 * indicates which MSI-X Table entry is used to generate
> the
> > -		 * interrupt message."
> > +		 * interrupt message."  and "For MSI, the value
> > +		 * in this field indicates the offset between the base
> Message
> > +		 * Data and the interrupt message that is generated."
> > +		 *
> >  		 */
> 
> And while this is getting a little too deep into nitpicking:  we
> usually
> don't add empty lines to the end of comments.

Ok I can remove the extra line and send out patch v4...

Many thanks
Gab

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[PATCH v3 0/2] add MSI support for PCIe port services and DPC IRQ support Gabriele Paoloni <gabriele.paoloni@huawei.com> - 2017-05-18 12:40 +0200
  [PATCH v3 1/2] PCI/portdrv: add support for different MSI interrupts for PCIe port services Gabriele Paoloni <gabriele.paoloni@huawei.com> - 2017-05-18 12:50 +0200
    Re: [PATCH v3 1/2] PCI/portdrv: add support for different MSI  interrupts for PCIe port services Christoph Hellwig <hch@infradead.org> - 2017-05-21 10:40 +0200
      RE: [PATCH v3 1/2] PCI/portdrv: add support for different MSI  interrupts for PCIe port services Gabriele Paoloni <gabriele.paoloni@huawei.com> - 2017-05-21 17:10 +0200
        Re: [PATCH v3 1/2] PCI/portdrv: add support for different MSI  interrupts for PCIe port services Christoph Hellwig <hch@infradead.org> - 2017-05-22 19:50 +0200
          RE: [PATCH v3 1/2] PCI/portdrv: add support for different MSI  interrupts for PCIe port services Gabriele Paoloni <gabriele.paoloni@huawei.com> - 2017-05-23 16:30 +0200

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