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[PATCH 8/9] ARM: sun5i: r8: Merge common controllers into the common DTSI

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From Maxime Ripard <maxime.ripard@free-electrons.com>
Newsgroups linux.kernel
Subject [PATCH 8/9] ARM: sun5i: r8: Merge common controllers into the common DTSI
Date Mon, 06 Feb 2017 08:10:02 +0100
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Some controllers found in the R8 DTSI actually apply to all of the sun5i
family. Move those into the common DTSI so that all SoCs can benefit from
it.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
 arch/arm/boot/dts/sun5i-r8.dtsi | 40 +----------------------------------
 arch/arm/boot/dts/sun5i.dtsi    | 23 ++++++++++++++++++++-
 2 files changed, 23 insertions(+), 40 deletions(-)

diff --git a/arch/arm/boot/dts/sun5i-r8.dtsi b/arch/arm/boot/dts/sun5i-r8.dtsi
index 4c1141396c99..de35dbcd1191 100644
--- a/arch/arm/boot/dts/sun5i-r8.dtsi
+++ b/arch/arm/boot/dts/sun5i-r8.dtsi
@@ -45,43 +45,3 @@
 
 #include "sun5i-a13.dtsi"
 
-/ {
-	chosen {
-		framebuffer@1 {
-			compatible = "allwinner,simple-framebuffer",
-				     "simple-framebuffer";
-			allwinner,pipeline = "de_be0-lcd0-tve0";
-			clocks = <&ccu CLK_AHB_TVE>, <&ccu CLK_AHB_LCD>,
-				 <&ccu CLK_AHB_DE_BE>, <&ccu CLK_DE_BE>,
-				 <&ccu CLK_TCON_CH1>, <&ccu CLK_DRAM_DE_BE>;
-			status = "disabled";
-		};
-	};
-
-	soc@01c00000 {
-		tve0: tv-encoder@01c0a000 {
-			compatible = "allwinner,sun4i-a10-tv-encoder";
-			reg = <0x01c0a000 0x1000>;
-			clocks = <&ccu CLK_AHB_TVE>;
-			resets = <&ccu RST_TVE>;
-			status = "disabled";
-
-			port {
-				#address-cells = <1>;
-				#size-cells = <0>;
-
-				tve0_in_tcon0: endpoint@0 {
-					reg = <0>;
-					remote-endpoint = <&tcon0_out_tve0>;
-				};
-			};
-		};
-	};
-};
-
-&tcon0_out {
-	tcon0_out_tve0: endpoint@1 {
-		reg = <1>;
-		remote-endpoint = <&tve0_in_tcon0>;
-	};
-};
diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi
index 9ba0c0302183..c8e2253cac1d 100644
--- a/arch/arm/boot/dts/sun5i.dtsi
+++ b/arch/arm/boot/dts/sun5i.dtsi
@@ -187,6 +187,24 @@
 			#size-cells = <0>;
 		};
 
+		tve0: tv-encoder@01c0a000 {
+			compatible = "allwinner,sun4i-a10-tv-encoder";
+			reg = <0x01c0a000 0x1000>;
+			clocks = <&ccu CLK_AHB_TVE>;
+			resets = <&ccu RST_TVE>;
+			status = "disabled";
+
+			port {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				tve0_in_tcon0: endpoint@0 {
+					reg = <0>;
+					remote-endpoint = <&tcon0_out_tve0>;
+				};
+			};
+		};
+
 		emac: ethernet@01c0b000 {
 			compatible = "allwinner,sun4i-a10-emac";
 			reg = <0x01c0b000 0x1000>;
@@ -238,6 +256,11 @@
 					#address-cells = <1>;
 					#size-cells = <0>;
 					reg = <1>;
+
+					tcon0_out_tve0: endpoint@1 {
+						reg = <1>;
+						remote-endpoint = <&tve0_in_tcon0>;
+					};
 				};
 			};
 		};
-- 
git-series 0.8.11

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[PATCH 0/9] ARM: sun5i: Cleanup and reorganisation of the DTSI Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 08:10 +0100
  [PATCH 8/9] ARM: sun5i: r8: Merge common controllers into the common DTSI Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 08:10 +0100
    Re: [PATCH 8/9] ARM: sun5i: r8: Merge common controllers into the  common DTSI Chen-Yu Tsai <wens@csie.org> - 2017-02-06 08:30 +0100
  [PATCH 4/9] ARM: sun5i: Add UART2 pin group Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 08:10 +0100
    Re: [PATCH 4/9] ARM: sun5i: Add UART2 pin group Chen-Yu Tsai <wens@csie.org> - 2017-02-06 08:20 +0100
      Re: [PATCH 4/9] ARM: sun5i: Add UART2 pin group Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 21:20 +0100
  [PATCH 1/9] ARM: sun5i: A10s: Switch the EMAC pins indices Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 08:10 +0100
    Re: [PATCH 1/9] ARM: sun5i: A10s: Switch the EMAC pins indices Chen-Yu Tsai <wens@csie.org> - 2017-02-06 08:20 +0100
  [PATCH 2/9] ARM: sun5i: a10s: switch simple framebuffer indices Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 08:10 +0100
    Re: [PATCH 2/9] ARM: sun5i: a10s: switch simple framebuffer indices Chen-Yu Tsai <wens@csie.org> - 2017-02-06 08:20 +0100
  [PATCH 3/9] ARM: sunxi: Rename pwm0_pins to match our usual pattern Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 08:10 +0100
    Re: [PATCH 3/9] ARM: sunxi: Rename pwm0_pins to match our usual pattern Chen-Yu Tsai <wens@csie.org> - 2017-02-06 08:20 +0100
      Re: [PATCH 3/9] ARM: sunxi: Rename pwm0_pins to match our usual  pattern Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 21:20 +0100
  [PATCH 5/9] ARM: sun5i: Rename UART3 flow control pins Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 08:10 +0100
    Re: [PATCH 5/9] ARM: sun5i: Rename UART3 flow control pins Chen-Yu Tsai <wens@csie.org> - 2017-02-06 08:20 +0100
  [PATCH 6/9] ARM: sun5i: a13: Merge common controllers into the common DTSI Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 08:10 +0100
    Re: [PATCH 6/9] ARM: sun5i: a13: Merge common controllers into the  common DTSI Chen-Yu Tsai <wens@csie.org> - 2017-02-06 08:20 +0100
  [PATCH 7/9] ARM: sun5i: a10s: Merge common controllers into the common DTSI Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 08:10 +0100
  [PATCH 9/9] ARM: sun5i: gr8: Use common sun5i DTSI Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 08:10 +0100
    Re: [PATCH 9/9] ARM: sun5i: gr8: Use common sun5i DTSI Chen-Yu Tsai <wens@csie.org> - 2017-02-06 08:40 +0100
      Re: [PATCH 9/9] ARM: sun5i: gr8: Use common sun5i DTSI Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-02-06 21:20 +0100

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