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[PATCH v2 25/26] drm/rockchip: dw-mipi-dsi: add reset control

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In order to fully reset the state of the MIPI controller we must assert
this reset.

This is slightly more complicated than it could be in order to maintain
compatibility with device trees that do not specify the reset property.

Signed-off-by: John Keeping <john@metanate.com>
---
Unchanged in v2
---
 drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
index 881bb0c62ca5..f780401e8b5e 100644
--- a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
+++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
@@ -13,6 +13,7 @@
 #include <linux/module.h>
 #include <linux/of_device.h>
 #include <linux/regmap.h>
+#include <linux/reset.h>
 #include <linux/mfd/syscon.h>
 #include <drm/drm_atomic_helper.h>
 #include <drm/drm_crtc.h>
@@ -1121,6 +1122,7 @@ static int dw_mipi_dsi_bind(struct device *dev, struct device *master,
 			of_match_device(dw_mipi_dsi_dt_ids, dev);
 	const struct dw_mipi_dsi_plat_data *pdata = of_id->data;
 	struct platform_device *pdev = to_platform_device(dev);
+	struct reset_control *apb_rst;
 	struct drm_device *drm = data;
 	struct dw_mipi_dsi *dsi;
 	struct resource *res;
@@ -1159,6 +1161,34 @@ static int dw_mipi_dsi_bind(struct device *dev, struct device *master,
 		return ret;
 	}
 
+	/*
+	 * Note that the reset was not defined in the initial device tree, so
+	 * we have to be prepared for it not being found.
+	 */
+	apb_rst = devm_reset_control_get(dev, "apb");
+	if (IS_ERR(apb_rst)) {
+		if (PTR_ERR(apb_rst) == -ENODEV) {
+			apb_rst = NULL;
+		} else {
+			dev_err(dev, "Unable to get reset control: %d\n", ret);
+			return PTR_ERR(apb_rst);
+		}
+	}
+
+	if (apb_rst) {
+		ret = clk_prepare_enable(dsi->pclk);
+		if (ret) {
+			dev_err(dev, "%s: Failed to enable pclk\n", __func__);
+			return ret;
+		}
+
+		reset_control_assert(apb_rst);
+		usleep_range(10, 20);
+		reset_control_deassert(apb_rst);
+
+		clk_disable_unprepare(dsi->pclk);
+	}
+
 	ret = clk_prepare_enable(dsi->pllref_clk);
 	if (ret) {
 		dev_err(dev, "%s: Failed to enable pllref_clk\n", __func__);
-- 
2.11.0.197.gb556de5.dirty

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[PATCH v2 00/26] drm/rockchip: MIPI fixes & improvements John Keeping <john@metanate.com> - 2017-01-21 17:40 +0100
  [PATCH v2 12/26] drm/rockchip: dw-mipi-dsi: prepare panel after phy init John Keeping <john@metanate.com> - 2017-01-21 17:40 +0100
  [PATCH v2 25/26] drm/rockchip: dw-mipi-dsi: add reset control John Keeping <john@metanate.com> - 2017-01-21 17:40 +0100
    Re: [PATCH v2 25/26] drm/rockchip: dw-mipi-dsi: add reset control Chris Zhong <zyw@rock-chips.com> - 2017-01-23 07:20 +0100
  [PATCH v2 05/26] drm/rockchip: dw-mipi-dsi: fix command header writes John Keeping <john@metanate.com> - 2017-01-21 17:40 +0100
  [PATCH v2 07/26] drm/rockchip: dw-mipi-dsi: avoid out-of-bounds read on tx_buf John Keeping <john@metanate.com> - 2017-01-21 17:40 +0100
    Re: [PATCH v2 07/26] drm/rockchip: dw-mipi-dsi: avoid out-of-bounds  read on tx_buf Chris Zhong <zyw@rock-chips.com> - 2017-01-22 07:50 +0100
  [PATCH v2 18/26] drm/rockchip: dw-mipi-dsi: properly configure PHY timing John Keeping <john@metanate.com> - 2017-01-21 17:40 +0100
    Re: [PATCH v2 18/26] drm/rockchip: dw-mipi-dsi: properly configure  PHY timing Chris Zhong <zyw@rock-chips.com> - 2017-01-22 04:10 +0100
  [PATCH v2 20/26] drm/rockchip: dw-mipi-dsi: use specific poll helper John Keeping <john@metanate.com> - 2017-01-21 17:40 +0100
    Re: [PATCH v2 20/26] drm/rockchip: dw-mipi-dsi: use specific poll  helper Chris Zhong <zyw@rock-chips.com> - 2017-01-23 02:00 +0100
  [PATCH v2 08/26] drm/rockchip: dw-mipi-dsi: include bad value in error message John Keeping <john@metanate.com> - 2017-01-21 17:40 +0100
    Re: [PATCH v2 08/26] drm/rockchip: dw-mipi-dsi: include bad value in  error message Chris Zhong <zyw@rock-chips.com> - 2017-01-22 07:50 +0100
  [PATCH v2 04/26] drm/rockchip: dw-mipi-dsi: remove mode_set hook John Keeping <john@metanate.com> - 2017-01-21 17:40 +0100
    Re: [PATCH v2 04/26] drm/rockchip: dw-mipi-dsi: remove mode_set hook Chris Zhong <zyw@rock-chips.com> - 2017-01-22 07:20 +0100
  [PATCH v2 14/26] drm/rockchip: dw-mipi-dsi: fix escape clock rate John Keeping <john@metanate.com> - 2017-01-21 17:40 +0100
    Re: [PATCH v2 14/26] drm/rockchip: dw-mipi-dsi: fix escape clock rate Chris Zhong <zyw@rock-chips.com> - 2017-01-22 10:40 +0100
  [PATCH v2 17/26] drm/rockchip: dw-mipi-dsi: don't enable PHY PLL until it's configured John Keeping <john@metanate.com> - 2017-01-21 17:40 +0100
    Re: [PATCH v2 17/26] drm/rockchip: dw-mipi-dsi: don't enable PHY PLL  until it's configured Chris Zhong <zyw@rock-chips.com> - 2017-01-22 11:20 +0100
  [PATCH v2 15/26] drm/rockchip: dw-mipi-dsi: ensure PHY is reset John Keeping <john@metanate.com> - 2017-01-21 17:40 +0100
    Re: [PATCH v2 15/26] drm/rockchip: dw-mipi-dsi: ensure PHY is reset Chris Zhong <zyw@rock-chips.com> - 2017-01-22 10:40 +0100
  [PATCH v2 02/26] drm/rockchip: dw-mipi-dsi: rename commit hook to enable John Keeping <john@metanate.com> - 2017-01-21 17:40 +0100
  [PATCH v2 01/26] drm/rockchip: dw-mipi-dsi: don't configure hardware in mode_set for MIPI John Keeping <john@metanate.com> - 2017-01-21 17:40 +0100
    Re: [PATCH v2 01/26] drm/rockchip: dw-mipi-dsi: don't configure  hardware in mode_set for MIPI Chris Zhong <zyw@rock-chips.com> - 2017-01-22 05:00 +0100

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