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Groups > linux.kernel > #1498154
| From | Linus Walleij <linus.walleij@linaro.org> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH 2/8] pinctrl: aspeed-g5: Fix names of GPID2 pins |
| Date | 2016-10-10 10:00 +0200 |
| Message-ID | <sqDF7-6WT-5@gated-at.bofh.it> (permalink) |
| References | <sm21s-2jb-7@gated-at.bofh.it> <sm21s-2jb-29@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On Tue, Sep 27, 2016 at 4:50 PM, Andrew Jeffery <andrew@aj.id.au> wrote: > Fixes simple typos in the initial commit. There is no behavioural > change. > > Fixes: 56e57cb6c07f (pinctrl: Add pinctrl-aspeed-g5 driver) > Reported-by: Xo Wang <xow@google.com> > Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Patch applied for fixes. Yours, Linus Walleij
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[PATCH 0/8] pinctrl: aspeed: Fixes for core and g5, implement remaining pins Andrew Jeffery <andrew@aj.id.au> - 2016-09-27 17:00 +0200
[PATCH 1/8] pinctrl: aspeed: "Not enabled" is a significant mux state Andrew Jeffery <andrew@aj.id.au> - 2016-09-27 17:00 +0200
Re: [PATCH 1/8] pinctrl: aspeed: "Not enabled" is a significant mux state Joel Stanley <joel@jms.id.au> - 2016-09-29 03:00 +0200
[PATCH 2/8] pinctrl: aspeed-g5: Fix names of GPID2 pins Andrew Jeffery <andrew@aj.id.au> - 2016-09-27 17:00 +0200
Re: [PATCH 2/8] pinctrl: aspeed-g5: Fix names of GPID2 pins Linus Walleij <linus.walleij@linaro.org> - 2016-10-10 10:00 +0200
[PATCH 5/8] pinctrl: aspeed: Enable capture of off-SCU pinmux state Andrew Jeffery <andrew@aj.id.au> - 2016-09-27 17:00 +0200
Re: [PATCH 5/8] pinctrl: aspeed: Enable capture of off-SCU pinmux state Joel Stanley <joel@jms.id.au> - 2016-09-29 08:50 +0200
Re: [PATCH 5/8] pinctrl: aspeed: Enable capture of off-SCU pinmux state Andrew Jeffery <andrew@aj.id.au> - 2016-09-29 10:00 +0200
Re: [PATCH 7/8] pinctrl: aspeed-g4: Add mux configuration for all pins Joel Stanley <joel@jms.id.au> - 2016-09-29 03:00 +0200
Re: [PATCH 7/8] pinctrl: aspeed-g4: Add mux configuration for all pins Rob Herring <robh@kernel.org> - 2016-10-03 21:10 +0200
Re: [PATCH 7/8] pinctrl: aspeed-g4: Add mux configuration for all pins Andrew Jeffery <andrew@aj.id.au> - 2016-10-04 03:10 +0200
Re: [PATCH 8/8] pinctrl: aspeed-g5: Add mux configuration for all pins Rob Herring <robh@kernel.org> - 2016-10-10 03:00 +0200
Re: [PATCH 0/8] pinctrl: aspeed: Fixes for core and g5, implement remaining pins Linus Walleij <linus.walleij@linaro.org> - 2016-10-10 10:10 +0200
Re: [PATCH 0/8] pinctrl: aspeed: Fixes for core and g5, implement remaining pins Andrew Jeffery <andrew@aj.id.au> - 2016-10-11 01:40 +0200
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