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Re: [PATCH 7/8] pinctrl: aspeed-g4: Add mux configuration for all pins

From Andrew Jeffery <andrew@aj.id.au>
Newsgroups linux.kernel
Subject Re: [PATCH 7/8] pinctrl: aspeed-g4: Add mux configuration for all pins
Date 2016-10-04 03:10 +0200
Message-ID <somp3-3Um-5@gated-at.bofh.it> (permalink)
References <sm21s-2jb-7@gated-at.bofh.it> <sm21s-2jb-11@gated-at.bofh.it> <sogMG-rz-25@gated-at.bofh.it>
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On Mon, 2016-10-03 at 14:08 -0500, Rob Herring wrote:
> On Wed, Sep 28, 2016 at 12:20:19AM +0930, Andrew Jeffery wrote:
> > 
> > The patch introducing the g4 pinctrl driver implemented a smattering of
> > pins to flesh out the implementation of the core and provide bare-bones
> > support for some OpenPOWER platforms. Now, update the bindings document
> > to reflect the complete functionality and implement the necessary pin
> > configuration tables in the driver.
> We prefer bindings to be complete if possible where as drivers can be 
> expanded over time.

Noted.

> 
> > 
> > 
> > Cc: Timothy Pearson <tpearson@raptorengineering.com>
> > Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
> > ---
> >  Documentation/devicetree/bindings/pinctrl/pinctrl-aspeed.txt |   19 +-
> Acked-by: Rob Herring <robh@kernel.org>

Thanks,

Andrew

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Thread

[PATCH 0/8] pinctrl: aspeed: Fixes for core and g5, implement remaining pins Andrew Jeffery <andrew@aj.id.au> - 2016-09-27 17:00 +0200
  [PATCH 1/8] pinctrl: aspeed: "Not enabled" is a significant mux state Andrew Jeffery <andrew@aj.id.au> - 2016-09-27 17:00 +0200
    Re: [PATCH 1/8] pinctrl: aspeed: "Not enabled" is a significant mux state Joel Stanley <joel@jms.id.au> - 2016-09-29 03:00 +0200
  [PATCH 2/8] pinctrl: aspeed-g5: Fix names of GPID2 pins Andrew Jeffery <andrew@aj.id.au> - 2016-09-27 17:00 +0200
    Re: [PATCH 2/8] pinctrl: aspeed-g5: Fix names of GPID2 pins Linus Walleij <linus.walleij@linaro.org> - 2016-10-10 10:00 +0200
  [PATCH 5/8] pinctrl: aspeed: Enable capture of off-SCU pinmux state Andrew Jeffery <andrew@aj.id.au> - 2016-09-27 17:00 +0200
    Re: [PATCH 5/8] pinctrl: aspeed: Enable capture of off-SCU pinmux state Joel Stanley <joel@jms.id.au> - 2016-09-29 08:50 +0200
      Re: [PATCH 5/8] pinctrl: aspeed: Enable capture of off-SCU pinmux  state Andrew Jeffery <andrew@aj.id.au> - 2016-09-29 10:00 +0200
  Re: [PATCH 7/8] pinctrl: aspeed-g4: Add mux configuration for all pins Joel Stanley <joel@jms.id.au> - 2016-09-29 03:00 +0200
  Re: [PATCH 7/8] pinctrl: aspeed-g4: Add mux configuration for all  pins Rob Herring <robh@kernel.org> - 2016-10-03 21:10 +0200
    Re: [PATCH 7/8] pinctrl: aspeed-g4: Add mux configuration for all  pins Andrew Jeffery <andrew@aj.id.au> - 2016-10-04 03:10 +0200
  Re: [PATCH 8/8] pinctrl: aspeed-g5: Add mux configuration for all  pins Rob Herring <robh@kernel.org> - 2016-10-10 03:00 +0200
  Re: [PATCH 0/8] pinctrl: aspeed: Fixes for core and g5, implement  remaining pins Linus Walleij <linus.walleij@linaro.org> - 2016-10-10 10:10 +0200
    Re: [PATCH 0/8] pinctrl: aspeed: Fixes for core and g5, implement  remaining pins Andrew Jeffery <andrew@aj.id.au> - 2016-10-11 01:40 +0200

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