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Groups > linux.kernel > #1486700
| From | John Keeping <john@metanate.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH 15/27] drm/rockchip: dw-mipi-dsi: use positive check for N{H,V}SYNC |
| Date | 2016-09-19 19:30 +0200 |
| Message-ID | <sjayf-8kP-41@gated-at.bofh.it> (permalink) |
| References | <sjaox-8hd-7@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
This matches other drivers. Signed-off-by: John Keeping <john@metanate.com> --- drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c index 097b3b0af78f..7b4f4f150a0d 100644 --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c @@ -738,9 +738,9 @@ static void dw_mipi_dsi_dpi_config(struct dw_mipi_dsi *dsi) break; } - if (!(mode->flags & DRM_MODE_FLAG_PVSYNC)) + if (mode->flags & DRM_MODE_FLAG_NVSYNC) val |= VSYNC_ACTIVE_LOW; - if (!(mode->flags & DRM_MODE_FLAG_PHSYNC)) + if (mode->flags & DRM_MODE_FLAG_NHSYNC) val |= HSYNC_ACTIVE_LOW; dsi_write(dsi, DSI_DPI_VCID, DPI_VID(dsi->channel)); -- 2.10.0.278.g4f427b1.dirty
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[PATCH 00/27] drm/rockchip: MIPI fixes & improvements John Keeping <john@metanate.com> - 2016-09-19 19:30 +0200
[PATCH 07/26] drm/rockchip: dw-mipi-dsi: avoid out-of-bounds read on tx_buf John Keeping <john@metanate.com> - 2016-09-19 19:30 +0200
[PATCH 15/26] drm/rockchip: dw-mipi-dsi: ensure PHY is reset John Keeping <john@metanate.com> - 2016-09-19 19:30 +0200
[PATCH 14/26] drm/rockchip: dw-mipi-dsi: fix escape clock rate John Keeping <john@metanate.com> - 2016-09-19 19:30 +0200
[PATCH 21/27] drm/rockchip: dw-mipi-dsi: improve PLL configuration John Keeping <john@metanate.com> - 2016-09-19 19:30 +0200
[PATCH 09/26] drm/rockchip: dw-mipi-dsi: respect message flags John Keeping <john@metanate.com> - 2016-09-19 19:30 +0200
[PATCH 22/26] drm/rockchip: vop: test for P{H,V}SYNC John Keeping <john@metanate.com> - 2016-09-19 19:30 +0200
[PATCH 18/26] drm/rockchip: dw-mipi-dsi: properly configure PHY timing John Keeping <john@metanate.com> - 2016-09-19 19:30 +0200
[PATCH 11/26] drm/rockchip: dw-mipi-dsi: don't assume buffer is aligned John Keeping <john@metanate.com> - 2016-09-19 19:30 +0200
[PATCH 15/27] drm/rockchip: dw-mipi-dsi: use positive check for N{H,V}SYNC John Keeping <john@metanate.com> - 2016-09-19 19:30 +0200
[PATCH 22/27] drm/rockchip: dw-mipi-dsi: defer probe if panel is not loaded John Keeping <john@metanate.com> - 2016-09-19 19:30 +0200
[PATCH 18/27] drm/rockchip: dw-mipi-dsi: configure bias and bandgap before enable John Keeping <john@metanate.com> - 2016-09-19 19:30 +0200
[PATCH 25/26] drm/rockchip: dw-mipi-dsi: add reset control John Keeping <john@metanate.com> - 2016-09-19 19:30 +0200
[PATCH 16/26] drm/rockchip: dw-mipi-dsi: configure bias and bandgap before enable John Keeping <john@metanate.com> - 2016-09-19 19:30 +0200
Re: [PATCH 00/27] drm/rockchip: MIPI fixes & improvements John Keeping <john@metanate.com> - 2016-09-19 19:30 +0200
[PATCH 02/26] drm/rockchip: dw-mipi-dsi: pass new mode into MIPI mode set John Keeping <john@metanate.com> - 2016-09-19 19:30 +0200
[PATCH 14/27] drm/rockchip: dw-mipi-dsi: use specific poll helper John Keeping <john@metanate.com> - 2016-09-19 19:30 +0200
[PATCH 20/27] drm/rockchip: dw-mipi-dsi: properly configure PHY timing John Keeping <john@metanate.com> - 2016-09-19 19:30 +0200
[PATCH 23/26] drm/rockchip: dw-mipi-dsi: defer probe if panel is not loaded John Keeping <john@metanate.com> - 2016-09-19 19:30 +0200
[PATCH 16/27] drm/rockchip: dw-mipi-dsi: fix escape clock rate John Keeping <john@metanate.com> - 2016-09-19 19:30 +0200
[PATCH 24/26] drm/rockchip: dw-mipi-dsi: support non-burst modes John Keeping <john@metanate.com> - 2016-09-19 19:40 +0200
[PATCH 23/27] drm/rockchip: dw-mipi-dsi: support non-burst modes John Keeping <john@metanate.com> - 2016-09-19 19:40 +0200
[PATCH 24/27] drm/rockchip: vop: test for P{H,V}SYNC John Keeping <john@metanate.com> - 2016-09-19 19:40 +0200
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