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[PATCH 21/27] drm/rockchip: dw-mipi-dsi: improve PLL configuration

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The multiplication ratio for the PLL is required to be even due to the
use of a "by 2 pre-scaler".  Currently we are likely to end up with an
odd multiplier even though there is an equivalent set of parameters with
an even multiplier.

For example, using the 324MHz bit rate with a reference clock of 24MHz
we end up with M = 27, N = 2 whereas the example in the PHY databook
gives M = 54, N = 4 for this bit rate and reference clock.

By walking down through the available multiplier instead of up we are
more likely to hit an even multiplier.  With the above example we do now
get M = 54, N = 4 as given by the databook.

While doing this, change the loop limits to encode the actual limits on
the divisor, which are:

	40MHz >= (pllref / N) >= 5MHz

Signed-off-by: John Keeping <john@metanate.com>
---
 drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
index 911ddcbab00d..2b26a54972da 100644
--- a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
+++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
@@ -520,7 +520,7 @@ static int dw_mipi_dsi_get_lane_bps(struct dw_mipi_dsi *dsi,
 	pllref = DIV_ROUND_UP(clk_get_rate(dsi->pllref_clk), USEC_PER_SEC);
 	tmp = pllref;
 
-	for (i = 1; i < 6; i++) {
+	for (i = pllref / 5; i > (pllref / 40); i--) {
 		pre = pllref / i;
 		if ((tmp > (target_mbps % pre)) && (target_mbps / pre < 512)) {
 			tmp = target_mbps % pre;
-- 
2.10.0.278.g4f427b1.dirty

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[PATCH 00/27] drm/rockchip: MIPI fixes & improvements John Keeping <john@metanate.com> - 2016-09-19 19:30 +0200
  [PATCH 07/26] drm/rockchip: dw-mipi-dsi: avoid out-of-bounds read on tx_buf John Keeping <john@metanate.com> - 2016-09-19 19:30 +0200
  [PATCH 15/26] drm/rockchip: dw-mipi-dsi: ensure PHY is reset John Keeping <john@metanate.com> - 2016-09-19 19:30 +0200
  [PATCH 14/26] drm/rockchip: dw-mipi-dsi: fix escape clock rate John Keeping <john@metanate.com> - 2016-09-19 19:30 +0200
  [PATCH 21/27] drm/rockchip: dw-mipi-dsi: improve PLL configuration John Keeping <john@metanate.com> - 2016-09-19 19:30 +0200
  [PATCH 09/26] drm/rockchip: dw-mipi-dsi: respect message flags John Keeping <john@metanate.com> - 2016-09-19 19:30 +0200
  [PATCH 22/26] drm/rockchip: vop: test for P{H,V}SYNC John Keeping <john@metanate.com> - 2016-09-19 19:30 +0200
  [PATCH 18/26] drm/rockchip: dw-mipi-dsi: properly configure PHY timing John Keeping <john@metanate.com> - 2016-09-19 19:30 +0200
  [PATCH 11/26] drm/rockchip: dw-mipi-dsi: don't assume buffer is aligned John Keeping <john@metanate.com> - 2016-09-19 19:30 +0200
  [PATCH 15/27] drm/rockchip: dw-mipi-dsi: use positive check for N{H,V}SYNC John Keeping <john@metanate.com> - 2016-09-19 19:30 +0200
  [PATCH 22/27] drm/rockchip: dw-mipi-dsi: defer probe if panel is not loaded John Keeping <john@metanate.com> - 2016-09-19 19:30 +0200
  [PATCH 18/27] drm/rockchip: dw-mipi-dsi: configure bias and bandgap before enable John Keeping <john@metanate.com> - 2016-09-19 19:30 +0200
  [PATCH 25/26] drm/rockchip: dw-mipi-dsi: add reset control John Keeping <john@metanate.com> - 2016-09-19 19:30 +0200
  [PATCH 16/26] drm/rockchip: dw-mipi-dsi: configure bias and bandgap before enable John Keeping <john@metanate.com> - 2016-09-19 19:30 +0200
  Re: [PATCH 00/27] drm/rockchip: MIPI fixes & improvements John Keeping <john@metanate.com> - 2016-09-19 19:30 +0200
  [PATCH 02/26] drm/rockchip: dw-mipi-dsi: pass new mode into MIPI mode set John Keeping <john@metanate.com> - 2016-09-19 19:30 +0200
  [PATCH 14/27] drm/rockchip: dw-mipi-dsi: use specific poll helper John Keeping <john@metanate.com> - 2016-09-19 19:30 +0200
  [PATCH 20/27] drm/rockchip: dw-mipi-dsi: properly configure PHY timing John Keeping <john@metanate.com> - 2016-09-19 19:30 +0200
  [PATCH 23/26] drm/rockchip: dw-mipi-dsi: defer probe if panel is not loaded John Keeping <john@metanate.com> - 2016-09-19 19:30 +0200
  [PATCH 16/27] drm/rockchip: dw-mipi-dsi: fix escape clock rate John Keeping <john@metanate.com> - 2016-09-19 19:30 +0200
  [PATCH 24/26] drm/rockchip: dw-mipi-dsi: support non-burst modes John Keeping <john@metanate.com> - 2016-09-19 19:40 +0200
  [PATCH 23/27] drm/rockchip: dw-mipi-dsi: support non-burst modes John Keeping <john@metanate.com> - 2016-09-19 19:40 +0200
  [PATCH 24/27] drm/rockchip: vop: test for P{H,V}SYNC John Keeping <john@metanate.com> - 2016-09-19 19:40 +0200

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