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Groups > linux.kernel > #1550730
| From | Jaehoon Chung <jh80.chung@samsung.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH V2 5/5] ARM: dts: exynos5440: support the phy-pcie node for pcie |
| Date | 2017-01-04 13:40 +0100 |
| Message-ID | <sVT1g-4FT-27@gated-at.bofh.it> (permalink) |
| References | <sVT1f-4FT-13@gated-at.bofh.it> <sVT1g-4FT-29@gated-at.bofh.it> <sVT1f-4FT-13@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
Add phy-pcie node for using Exynos5440 pcie.
And use the reg-names as "elbi" and "config".
Because the getting configuratioin space address from ranges is old way.
It also is helpful to distinguish more clearly.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
---
Changelog on V2:
- Removes the child-node
- Fixes the typo
- Removes the unnecessary comments
arch/arm/boot/dts/exynos5440.dtsi | 34 ++++++++++++++++++++++------------
1 file changed, 22 insertions(+), 12 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi
index 2a2e570..feb074d 100644
--- a/arch/arm/boot/dts/exynos5440.dtsi
+++ b/arch/arm/boot/dts/exynos5440.dtsi
@@ -290,11 +290,22 @@
clock-names = "usbhost";
};
+ pcie_phy0: pcie-phy@270000 {
+ #phy-cells = <0>;
+ compatible = "samsung,exynos5440-pcie-phy";
+ reg = <0x270000 0x1000>, <0x271000 0x40>;
+ };
+
+ pcie_phy1: pcie-phy@272000 {
+ #phy-cells = <0>;
+ compatible = "samsung,exynos5440-pcie-phy";
+ reg = <0x272000 0x1000>, <0x271040 0x40>;
+ };
+
pcie_0: pcie@290000 {
compatible = "samsung,exynos5440-pcie", "snps,dw-pcie";
- reg = <0x290000 0x1000
- 0x270000 0x1000
- 0x271000 0x40>;
+ reg = <0x290000 0x1000>, <0x40000000 0x1000>;
+ reg-names = "elbi", "config";
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
@@ -303,9 +314,9 @@
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
- ranges = <0x00000800 0 0x40000000 0x40000000 0 0x00001000 /* configuration space */
- 0x81000000 0 0 0x40001000 0 0x00010000 /* downstream I/O */
- 0x82000000 0 0x40011000 0x40011000 0 0x1ffef000>; /* non-prefetchable memory */
+ phys = <&pcie_phy0>;
+ ranges = <0x81000000 0 0 0x40001000 0 0x00010000
+ 0x82000000 0 0x40011000 0x40011000 0 0x1ffef000>;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0x0 0 &gic 53>;
@@ -315,9 +326,8 @@
pcie_1: pcie@2a0000 {
compatible = "samsung,exynos5440-pcie", "snps,dw-pcie";
- reg = <0x2a0000 0x1000
- 0x272000 0x1000
- 0x271040 0x40>;
+ reg = <0x2a0000 0x1000>, <0x60000000 0x1000>;
+ reg-names = "elbi", "config";
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
@@ -326,9 +336,9 @@
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
- ranges = <0x00000800 0 0x60000000 0x60000000 0 0x00001000 /* configuration space */
- 0x81000000 0 0 0x60001000 0 0x00010000 /* downstream I/O */
- 0x82000000 0 0x60011000 0x60011000 0 0x1ffef000>; /* non-prefetchable memory */
+ phys = <&pcie_phy1>;
+ ranges = <0x81000000 0 0 0x60001000 0 0x00010000
+ 0x82000000 0 0x60011000 0x60011000 0 0x1ffef000>;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0x0 0 &gic 56>;
--
2.10.2
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[PATCH V2 0/5] PCI: exynos: use the PHY generic framework Jaehoon Chung <jh80.chung@samsung.com> - 2017-01-04 13:40 +0100
[PATCH V2 5/5] ARM: dts: exynos5440: support the phy-pcie node for pcie Jaehoon Chung <jh80.chung@samsung.com> - 2017-01-04 13:40 +0100
Re: [PATCH V2 5/5] ARM: dts: exynos5440: support the phy-pcie node for pcie Krzysztof Kozlowski <krzk@kernel.org> - 2017-01-04 19:10 +0100
Re: [PATCH V2 5/5] ARM: dts: exynos5440: support the phy-pcie node for pcie "Jingoo Han" <jingoohan1@gmail.com> - 2017-01-04 19:10 +0100
Re: [PATCH V2 5/5] ARM: dts: exynos5440: support the phy-pcie node for pcie Jaehoon Chung <jh80.chung@samsung.com> - 2017-01-05 03:30 +0100
Re: [PATCH V2 5/5] ARM: dts: exynos5440: support the phy-pcie node for pcie "pankaj.dubey" <pankaj.dubey@samsung.com> - 2017-01-05 10:10 +0100
[PATCH V2 2/5] phy: phy-exynos-pcie: Add support for Exynos PCIe phy Jaehoon Chung <jh80.chung@samsung.com> - 2017-01-04 13:40 +0100
Re: [PATCH V2 2/5] phy: phy-exynos-pcie: Add support for Exynos PCIe phy Krzysztof Kozlowski <krzk@kernel.org> - 2017-01-04 19:00 +0100
Re: [PATCH V2 2/5] phy: phy-exynos-pcie: Add support for Exynos PCIe phy Jaehoon Chung <jh80.chung@samsung.com> - 2017-01-05 03:30 +0100
Re: [PATCH V2 2/5] phy: phy-exynos-pcie: Add support for Exynos PCIe phy "Jingoo Han" <jingoohan1@gmail.com> - 2017-01-04 21:30 +0100
Re: [PATCH V2 2/5] phy: phy-exynos-pcie: Add support for Exynos PCIe phy "pankaj.dubey" <pankaj.dubey@samsung.com> - 2017-01-05 07:20 +0100
Re: [PATCH V2 2/5] phy: phy-exynos-pcie: Add support for Exynos PCIe phy Alim Akhtar <alim.akhtar@samsung.com> - 2017-01-09 14:40 +0100
Re: [PATCH V2 2/5] phy: phy-exynos-pcie: Add support for Exynos PCIe phy Vivek Gautam <vivek.gautam@codeaurora.org> - 2017-01-10 07:10 +0100
Re: [PATCH V2 2/5] phy: phy-exynos-pcie: Add support for Exynos PCIe phy Jaehoon Chung <jh80.chung@samsung.com> - 2017-01-10 07:20 +0100
Re: [PATCH V2 2/5] phy: phy-exynos-pcie: Add support for Exynos PCIe phy Kishon Vijay Abraham I <kishon@ti.com> - 2017-01-16 09:40 +0100
Re: [PATCH V2 2/5] phy: phy-exynos-pcie: Add support for Exynos PCIe phy Jaehoon Chung <jh80.chung@samsung.com> - 2017-01-16 12:10 +0100
[PATCH V2 1/5] Documetation: samsung-phy: add the exynos-pcie-phy binding Jaehoon Chung <jh80.chung@samsung.com> - 2017-01-04 13:40 +0100
Re: [PATCH V2 1/5] Documetation: samsung-phy: add the exynos-pcie-phy binding Rob Herring <robh@kernel.org> - 2017-01-04 16:20 +0100
Re: [PATCH V2 1/5] Documetation: samsung-phy: add the exynos-pcie-phy binding Alim Akhtar <alim.akhtar@samsung.com> - 2017-01-05 05:30 +0100
Re: [PATCH V2 1/5] Documetation: samsung-phy: add the exynos-pcie-phy binding "pankaj.dubey" <pankaj.dubey@samsung.com> - 2017-01-05 07:10 +0100
[PATCH V2 4/5] PCI: exynos: support the using PHY generic framework Jaehoon Chung <jh80.chung@samsung.com> - 2017-01-04 13:40 +0100
Re: [PATCH V2 4/5] PCI: exynos: support the using PHY generic framework Krzysztof Kozlowski <krzk@kernel.org> - 2017-01-04 19:00 +0100
Re: [PATCH V2 4/5] PCI: exynos: support the using PHY generic framework Jaehoon Chung <jh80.chung@samsung.com> - 2017-01-05 03:40 +0100
Re: [PATCH V2 4/5] PCI: exynos: support the using PHY generic framework "Jingoo Han" <jingoohan1@gmail.com> - 2017-01-04 21:00 +0100
Re: [PATCH V2 4/5] PCI: exynos: support the using PHY generic framework "pankaj.dubey" <pankaj.dubey@samsung.com> - 2017-01-05 10:10 +0100
Re: [PATCH V2 4/5] PCI: exynos: support the using PHY generic framework Alim Akhtar <alim.akhtar@samsung.com> - 2017-01-09 14:50 +0100
Re: [PATCH V2 0/5] PCI: exynos: use the PHY generic framework Bjorn Helgaas <helgaas@kernel.org> - 2017-01-12 22:10 +0100
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