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Groups > linux.kernel > #1461324
| From | Christophe Leroy <christophe.leroy@c-s.fr> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH 3/6] powerpc/8xx: use r3 to scratch CR in ITLBmiss |
| Date | 2016-08-12 19:00 +0200 |
| Message-ID | <s5nYm-4bK-15@gated-at.bofh.it> (permalink) |
| References | <s5nYl-4bK-5@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> --- arch/powerpc/kernel/head_8xx.S | 21 +++++++++------------ 1 file changed, 9 insertions(+), 12 deletions(-) diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S index 43ddaae..708fd43 100644 --- a/arch/powerpc/kernel/head_8xx.S +++ b/arch/powerpc/kernel/head_8xx.S @@ -322,7 +322,7 @@ SystemCall: #endif InstructionTLBMiss: -#ifdef CONFIG_8xx_CPU6 +#if defined(CONFIG_8xx_CPU6) || defined(CONFIG_MODULES) || defined (CONFIG_DEBUG_PAGEALLOC) mtspr SPRN_SPRG_SCRATCH2, r3 #endif EXCEPTION_PROLOG_0 @@ -330,23 +330,20 @@ InstructionTLBMiss: /* If we are faulting a kernel address, we have to use the * kernel page tables. */ + mfspr r10, SPRN_SRR0 /* Get effective address of fault */ + INVALIDATE_ADJACENT_PAGES_CPU15(r11, r10) #if defined(CONFIG_MODULES) || defined (CONFIG_DEBUG_PAGEALLOC) /* Only modules will cause ITLB Misses as we always * pin the first 8MB of kernel memory */ - mfspr r11, SPRN_SRR0 /* Get effective address of fault */ - INVALIDATE_ADJACENT_PAGES_CPU15(r10, r11) - mfcr r10 - IS_KERNEL(r11, r11) + mfcr r3 + IS_KERNEL(r11, r10) +#endif mfspr r11, SPRN_M_TW /* Get level 1 table */ +#if defined(CONFIG_MODULES) || defined (CONFIG_DEBUG_PAGEALLOC) BRANCH_UNLESS_KERNEL(3f) lis r11, (swapper_pg_dir-PAGE_OFFSET)@ha 3: - mtcr r10 - mfspr r10, SPRN_SRR0 /* Get effective address of fault */ -#else - mfspr r10, SPRN_SRR0 /* Get effective address of fault */ - INVALIDATE_ADJACENT_PAGES_CPU15(r11, r10) - mfspr r11, SPRN_M_TW /* Get level 1 table base address */ + mtcr r3 #endif /* Insert level 1 index */ rlwimi r11, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) << 1, 29 @@ -378,7 +375,7 @@ InstructionTLBMiss: MTSPR_CPU6(SPRN_MI_RPN, r10, r3) /* Update TLB entry */ /* Restore registers */ -#ifdef CONFIG_8xx_CPU6 +#if defined(CONFIG_8xx_CPU6) || defined(CONFIG_MODULES) || defined (CONFIG_DEBUG_PAGEALLOC) mfspr r3, SPRN_SPRG_SCRATCH2 #endif EXCEPTION_EPILOG_0 -- 2.1.0
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[PATCH 0/6] powerpc/8xx: implementation of huge pages Christophe Leroy <christophe.leroy@c-s.fr> - 2016-08-12 19:00 +0200
[PATCH 2/6] powerpc: fix usage of _PAGE_RO in hugepage Christophe Leroy <christophe.leroy@c-s.fr> - 2016-08-12 19:00 +0200
[PATCH 1/6] powerpc: port 64 bits pgtable_cache to 32 bits Christophe Leroy <christophe.leroy@c-s.fr> - 2016-08-12 19:00 +0200
Re: [PATCH 1/6] powerpc: port 64 bits pgtable_cache to 32 bits "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com> - 2016-08-14 16:20 +0200
Re: [PATCH 1/6] powerpc: port 64 bits pgtable_cache to 32 bits christophe leroy <christophe.leroy@c-s.fr> - 2016-08-14 21:00 +0200
Re: [PATCH 1/6] powerpc: port 64 bits pgtable_cache to 32 bits "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com> - 2016-08-15 12:30 +0200
[PATCH 4/6] powerpc/8xx: Move additional DTLBMiss handlers out of exception area Christophe Leroy <christophe.leroy@c-s.fr> - 2016-08-12 19:00 +0200
[PATCH 5/6] powerpc/8xx: make user addr DTLB miss the short path Christophe Leroy <christophe.leroy@c-s.fr> - 2016-08-12 19:00 +0200
[PATCH 3/6] powerpc/8xx: use r3 to scratch CR in ITLBmiss Christophe Leroy <christophe.leroy@c-s.fr> - 2016-08-12 19:00 +0200
[PATCH 6/6] powerpc/8xx: implementation of huge pages Christophe Leroy <christophe.leroy@c-s.fr> - 2016-08-12 19:00 +0200
Re: [PATCH 6/6] powerpc/8xx: implementation of huge pages "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com> - 2016-08-14 16:30 +0200
Re: [PATCH 6/6] powerpc/8xx: implementation of huge pages christophe leroy <christophe.leroy@c-s.fr> - 2016-08-14 19:40 +0200
Re: [PATCH 6/6] powerpc/8xx: implementation of huge pages "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com> - 2016-08-15 12:40 +0200
Re: [PATCH 0/6] powerpc/8xx: implementation of huge pages "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com> - 2016-08-14 16:30 +0200
Re: [PATCH 0/6] powerpc/8xx: implementation of huge pages christophe leroy <christophe.leroy@c-s.fr> - 2016-08-14 19:40 +0200
Re: [PATCH 0/6] powerpc/8xx: implementation of huge pages "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com> - 2016-08-15 12:40 +0200
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