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Groups > linux.kernel > #1396800
| From | Hubert Chrzaniuk <hubert.chrzaniuk@intel.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH] perf/x86/intel/uncore: Fix CHA registers configuration procedure for Knights Landing platform |
| Date | 2016-05-09 10:00 +0200 |
| Message-ID | <rwOgG-II-19@gated-at.bofh.it> (permalink) |
| References | <rw3hN-3Ma-5@gated-at.bofh.it> <rwOgF-II-1@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
From: hchrzani <hubert.chrzaniuk@intel.com>
CHA events in Knights Landing platform require programming filter registers properly.
Remote node, local node and NonNearMemCachable bits should be set to 1 at all times.
Fixes: 77af003 ('perf/x86/intel/uncore: Add Knights Landing uncore PMU support')
Signed-off-by: Hubert Chrzaniuk <hubert.chrzaniuk@intel.com>
Signed-off-by: Lawrence F Meadows <lawrence.f.meadows@intel.com>
---
arch/x86/events/intel/uncore_snbep.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/uncore_snbep.c
index ab2bcaa..b262586 100644
--- a/arch/x86/events/intel/uncore_snbep.c
+++ b/arch/x86/events/intel/uncore_snbep.c
@@ -219,6 +219,9 @@
#define KNL_CHA_MSR_PMON_BOX_FILTER_TID 0x1ff
#define KNL_CHA_MSR_PMON_BOX_FILTER_STATE (7 << 18)
#define KNL_CHA_MSR_PMON_BOX_FILTER_OP (0xfffffe2aULL << 32)
+#define KNL_CHA_MSR_PMON_BOX_FILTER_REMOTE_NODE (0x1ULL << 32)
+#define KNL_CHA_MSR_PMON_BOX_FILTER_LOCAL_NODE (0x1ULL << 33)
+#define KNL_CHA_MSR_PMON_BOX_FILTER_NNC (0x1ULL << 37)
/* KNL EDC/MC UCLK */
#define KNL_UCLK_MSR_PMON_CTR0_LOW 0x400
@@ -1902,6 +1905,10 @@ static int knl_cha_hw_config(struct intel_uncore_box *box,
reg1->reg = HSWEP_C0_MSR_PMON_BOX_FILTER0 +
KNL_CHA_MSR_OFFSET * box->pmu->pmu_idx;
reg1->config = event->attr.config1 & knl_cha_filter_mask(idx);
+
+ reg1->config |= KNL_CHA_MSR_PMON_BOX_FILTER_REMOTE_NODE;
+ reg1->config |= KNL_CHA_MSR_PMON_BOX_FILTER_LOCAL_NODE;
+ reg1->config |= KNL_CHA_MSR_PMON_BOX_FILTER_NNC;
reg1->idx = idx;
}
return 0;
--
1.8.3.1
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[PATCH] perf/x86/intel/uncore: Fix CHA registers configuration procedure for Knights Landing platform hchrzani <hubert.chrzaniuk@intel.com> - 2016-05-06 11:00 +0200
Re: [PATCH] perf/x86/intel/uncore: Fix CHA registers configuration procedure for Knights Landing platform Thomas Gleixner <tglx@linutronix.de> - 2016-05-06 12:00 +0200
[PATCH] perf/x86/intel/uncore: Fix CHA registers configuration procedure for Knights Landing platform hchrzani <hubert.chrzaniuk@intel.com> - 2016-05-06 15:30 +0200
Re: [PATCH] perf/x86/intel/uncore: Fix CHA registers configuration procedure for Knights Landing platform Ingo Molnar <mingo@kernel.org> - 2016-05-07 07:50 +0200
[PATCH v3] perf/x86/intel/uncore: Fix CHA registers configuration Hubert Chrzaniuk <hubert.chrzaniuk@intel.com> - 2016-05-09 10:00 +0200
[PATCH] perf/x86/intel/uncore: Fix CHA registers configuration procedure for Knights Landing platform Hubert Chrzaniuk <hubert.chrzaniuk@intel.com> - 2016-05-09 10:00 +0200
[tip:perf/core] perf/x86/intel/uncore: Fix CHA registers configuration procedure for Knights Landing platform tip-bot for hchrzani <tipbot@zytor.com> - 2016-05-12 12:40 +0200
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