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Groups > linux.kernel > #1396799
| From | Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH 4.5 24/88] clk: qcom: msm8960: Fix ce3_src register offset |
| Date | 2016-05-09 10:00 +0200 |
| Message-ID | <rwOgG-II-11@gated-at.bofh.it> (permalink) |
| References | <rwNNE-7J-5@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
4.5-stable review patch. If anyone has any objections, please let me know.
------------------
From: Stephen Boyd <sboyd@codeaurora.org>
commit 0f75e1a370fd843c9e508fc1ccf0662833034827 upstream.
The offset seems to have been copied from the sata clk. Fix it so
that enabling the crypto engine source clk works.
Tested-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Fixes: 5f775498bdc4 ("clk: qcom: Fully support apq8064 global clock control")
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
drivers/clk/qcom/gcc-msm8960.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/clk/qcom/gcc-msm8960.c
+++ b/drivers/clk/qcom/gcc-msm8960.c
@@ -2753,7 +2753,7 @@ static struct clk_rcg ce3_src = {
},
.freq_tbl = clk_tbl_ce3,
.clkr = {
- .enable_reg = 0x2c08,
+ .enable_reg = 0x36c0,
.enable_mask = BIT(7),
.hw.init = &(struct clk_init_data){
.name = "ce3_src",
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[PATCH 4.5 24/88] clk: qcom: msm8960: Fix ce3_src register offset Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-05-09 10:00 +0200
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