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[PATCH V4 2/3] soc/tegra: pmc: Correct type of variable for tegra_pmc_readl()

From Laxman Dewangan <ldewangan@nvidia.com>
Newsgroups linux.kernel
Subject [PATCH V4 2/3] soc/tegra: pmc: Correct type of variable for tegra_pmc_readl()
Date 2016-05-06 13:00 +0200
Message-ID <rvLEe-3qs-9@gated-at.bofh.it> (permalink)
References <rvLEe-3qs-1@gated-at.bofh.it>
Organization linux.* mail to news gateway

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The function tegra_pmc_readl() returns the u32 type data and hence
change the data type of variable where this data is stored to u32
type.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>

---
Changes from V1:
-This is new in series as per discussion on V1 series to use u32 for
tegra_pmc_readl.

Changes from V2:
- Make unsigned long to u32 for some missed variable from V1.

Changes from V3:
- Revert back the value to ulong where time calcualtion is done.
---
 drivers/soc/tegra/pmc.c | 16 +++++++++-------
 1 file changed, 9 insertions(+), 7 deletions(-)

diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c
index 2c3f1f9..09c2b97 100644
--- a/drivers/soc/tegra/pmc.c
+++ b/drivers/soc/tegra/pmc.c
@@ -875,10 +875,10 @@ static int tegra_io_rail_prepare(unsigned int id, unsigned long *request,
 	return 0;
 }
 
-static int tegra_io_rail_poll(unsigned long offset, unsigned long mask,
-			      unsigned long val, unsigned long timeout)
+static int tegra_io_rail_poll(unsigned long offset, u32 mask,
+			      u32 val, unsigned long timeout)
 {
-	unsigned long value;
+	u32 value;
 
 	timeout = jiffies + msecs_to_jiffies(timeout);
 
@@ -900,8 +900,9 @@ static void tegra_io_rail_unprepare(void)
 
 int tegra_io_rail_power_on(unsigned int id)
 {
-	unsigned long request, status, value;
-	unsigned int bit, mask;
+	unsigned long request, status;
+	unsigned int bit;
+	u32 value, mask;
 	int err;
 
 	mutex_lock(&pmc->powergates_lock);
@@ -935,8 +936,9 @@ EXPORT_SYMBOL(tegra_io_rail_power_on);
 
 int tegra_io_rail_power_off(unsigned int id)
 {
-	unsigned long request, status, value;
-	unsigned int bit, mask;
+	unsigned long request, status;
+	unsigned int bit;
+	u32 value, mask;
 	int err;
 
 	mutex_lock(&pmc->powergates_lock);
-- 
2.1.4

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Thread

[PATCH V4 0/3] soc/tegra: Add support for IO pads power and voltage control Laxman Dewangan <ldewangan@nvidia.com> - 2016-05-06 13:00 +0200
  [PATCH V4 3/3] soc/tegra: pmc: Add support for IO pads power state and voltage Laxman Dewangan <ldewangan@nvidia.com> - 2016-05-06 13:00 +0200
    Re: [PATCH V4 3/3] soc/tegra: pmc: Add support for IO pads power  state and voltage Jon Hunter <jonathanh@nvidia.com> - 2016-05-06 16:40 +0200
      Re: [PATCH V4 3/3] soc/tegra: pmc: Add support for IO pads power  state and voltage Laxman Dewangan <ldewangan@nvidia.com> - 2016-05-06 17:50 +0200
        Re: [PATCH V4 3/3] soc/tegra: pmc: Add support for IO pads power  state and voltage Jon Hunter <jonathanh@nvidia.com> - 2016-05-08 14:20 +0200
          Re: [PATCH V4 3/3] soc/tegra: pmc: Add support for IO pads power  state and voltage Laxman Dewangan <ldewangan@nvidia.com> - 2016-05-11 15:50 +0200
            Re: [PATCH V4 3/3] soc/tegra: pmc: Add support for IO pads power  state and voltage Jon Hunter <jonathanh@nvidia.com> - 2016-05-11 17:40 +0200
              Re: [PATCH V4 3/3] soc/tegra: pmc: Add support for IO pads power  state and voltage Laxman Dewangan <ldewangan@nvidia.com> - 2016-05-11 19:40 +0200
                Re: [PATCH V4 3/3] soc/tegra: pmc: Add support for IO pads power  state and voltage Jon Hunter <jonathanh@nvidia.com> - 2016-05-11 22:00 +0200
  [PATCH V4 2/3] soc/tegra: pmc: Correct type of variable for tegra_pmc_readl() Laxman Dewangan <ldewangan@nvidia.com> - 2016-05-06 13:00 +0200
    Re: [PATCH V4 2/3] soc/tegra: pmc: Correct type of variable for  tegra_pmc_readl() Jon Hunter <jonathanh@nvidia.com> - 2016-05-06 16:20 +0200
  [PATCH V4 1/3] soc/tegra: pmc: Use BIT macro for register field definition Laxman Dewangan <ldewangan@nvidia.com> - 2016-05-06 13:00 +0200
    Re: [PATCH V4 1/3] soc/tegra: pmc: Use BIT macro for register field  definition Jon Hunter <jonathanh@nvidia.com> - 2016-05-06 16:20 +0200

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