Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]
Groups > linux.kernel > #1393124
| From | tip-bot for Aravind Gopalakrishnan <tipbot@zytor.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [tip:ras/core] x86/mce: Grade uncorrected errors for SMCA-enabled systems |
| Date | 2016-05-03 09:50 +0200 |
| Message-ID | <ruDfI-3LT-19@gated-at.bofh.it> (permalink) |
| References | <ruDfI-3LT-21@gated-at.bofh.it> <rtClI-7N0-15@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
Commit-ID: 6bda529ec42e1cd4dde1c3d0a1a18000ffd3d419
Gitweb: http://git.kernel.org/tip/6bda529ec42e1cd4dde1c3d0a1a18000ffd3d419
Author: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>
AuthorDate: Sat, 30 Apr 2016 14:33:52 +0200
Committer: Ingo Molnar <mingo@kernel.org>
CommitDate: Tue, 3 May 2016 08:24:15 +0200
x86/mce: Grade uncorrected errors for SMCA-enabled systems
For upcoming processors with Scalable MCA feature, we need to check the
"succor" CPUID bit and the TCC bit in the MCx_STATUS register in order
to grade an MCE's severity.
Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>
Signed-off-by: Yazen Ghannam <Yazen.Ghannam@amd.com>
[ Simplified code flow, shortened comments. ]
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Aravind Gopalakrishnan <aravindksg.lkml@gmail.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Tony Luck <tony.luck@intel.com>
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/1459886686-13977-3-git-send-email-Yazen.Ghannam@amd.com
Link: http://lkml.kernel.org/r/1462019637-16474-3-git-send-email-bp@alien8.de
Signed-off-by: Ingo Molnar <mingo@kernel.org>
---
arch/x86/kernel/cpu/mcheck/mce-severity.c | 30 ++++++++++++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/arch/x86/kernel/cpu/mcheck/mce-severity.c b/arch/x86/kernel/cpu/mcheck/mce-severity.c
index 5119766..631356c 100644
--- a/arch/x86/kernel/cpu/mcheck/mce-severity.c
+++ b/arch/x86/kernel/cpu/mcheck/mce-severity.c
@@ -204,6 +204,33 @@ static int error_context(struct mce *m)
return IN_KERNEL;
}
+static int mce_severity_amd_smca(struct mce *m, int err_ctx)
+{
+ u32 addr = MSR_AMD64_SMCA_MCx_CONFIG(m->bank);
+ u32 low, high;
+
+ /*
+ * We need to look at the following bits:
+ * - "succor" bit (data poisoning support), and
+ * - TCC bit (Task Context Corrupt)
+ * in MCi_STATUS to determine error severity.
+ */
+ if (!mce_flags.succor)
+ return MCE_PANIC_SEVERITY;
+
+ if (rdmsr_safe(addr, &low, &high))
+ return MCE_PANIC_SEVERITY;
+
+ /* TCC (Task context corrupt). If set and if IN_KERNEL, panic. */
+ if ((low & MCI_CONFIG_MCAX) &&
+ (m->status & MCI_STATUS_TCC) &&
+ (err_ctx == IN_KERNEL))
+ return MCE_PANIC_SEVERITY;
+
+ /* ...otherwise invoke hwpoison handler. */
+ return MCE_AR_SEVERITY;
+}
+
/*
* See AMD Error Scope Hierarchy table in a newer BKDG. For example
* 49125_15h_Models_30h-3Fh_BKDG.pdf, section "RAS Features"
@@ -225,6 +252,9 @@ static int mce_severity_amd(struct mce *m, int tolerant, char **msg, bool is_exc
* to at least kill process to prolong system operation.
*/
if (mce_flags.overflow_recov) {
+ if (mce_flags.smca)
+ return mce_severity_amd_smca(m, ctx);
+
/* software can try to contain */
if (!(m->mcgstatus & MCG_STATUS_RIPV) && (ctx == IN_KERNEL))
return MCE_PANIC_SEVERITY;
Back to linux.kernel | Previous | Next — Previous in thread | Next in thread | Find similar | Unroll thread
[PATCH 0/7] tip/ras/core: Second pile Borislav Petkov <bp@alien8.de> - 2016-04-30 14:40 +0200
[PATCH 6/7] x86/mce: Look in genpool instead of mcelog for pending error records Borislav Petkov <bp@alien8.de> - 2016-04-30 14:40 +0200
[tip:ras/core] x86/mce: Look in genpool instead of mcelog for pending error records tip-bot for Tony Luck <tipbot@zytor.com> - 2016-05-03 10:00 +0200
[PATCH 2/7] x86/mce: Grade uncorrected errors for SMCA-enabled systems Borislav Petkov <bp@alien8.de> - 2016-04-30 14:40 +0200
[tip:ras/core] x86/mce: Grade uncorrected errors for SMCA-enabled systems tip-bot for Aravind Gopalakrishnan <tipbot@zytor.com> - 2016-05-03 09:50 +0200
[PATCH 1/7] x86/mce: Log MCEs after a warm rest on AMD, fam 0x17 and later Borislav Petkov <bp@alien8.de> - 2016-04-30 14:40 +0200
[tip:ras/core] x86/mce: Log MCEs after a warm rest on AMD, Fam17h and later tip-bot for Aravind Gopalakrishnan <tipbot@zytor.com> - 2016-05-03 09:50 +0200
[PATCH 3/7] x86/mce: Carve out writes to MCx_STATUS and MCx_CTL Borislav Petkov <bp@alien8.de> - 2016-04-30 14:40 +0200
[tip:ras/core] x86/mce: Carve out writes to MCx_STATUS and MCx_CTL tip-bot for Aravind Gopalakrishnan <tipbot@zytor.com> - 2016-05-03 09:50 +0200
csiph-web