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Groups > linux.kernel > #1391618

[PATCH 3/7] x86/mce: Carve out writes to MCx_STATUS and MCx_CTL

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From: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>

We need to do this after __mcheck_cpu_init_vendor() as for
ScalableMCA processors, there are going to be new MSR write handlers
if the feature is detected using CPUID bit (which happens in
__mcheck_cpu_init_vendor()).

No functional change is introduced here.

Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>
Cc: Aravind Gopalakrishnan <aravindksg.lkml@gmail.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: linux-edac <linux-edac@vger.kernel.org>
Cc: x86-ml <x86@kernel.org>
Link: http://lkml.kernel.org/r/1459886686-13977-4-git-send-email-Yazen.Ghannam@amd.com
Signed-off-by: Yazen Ghannam <Yazen.Ghannam@amd.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
---
 arch/x86/kernel/cpu/mcheck/mce.c | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 43f8b49ef570..6bffb26e05e0 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -1420,7 +1420,6 @@ static void __mcheck_cpu_init_generic(void)
 	enum mcp_flags m_fl = 0;
 	mce_banks_t all_banks;
 	u64 cap;
-	int i;
 
 	if (!mca_cfg.bootlog)
 		m_fl = MCP_DONTLOG;
@@ -1436,6 +1435,11 @@ static void __mcheck_cpu_init_generic(void)
 	rdmsrl(MSR_IA32_MCG_CAP, cap);
 	if (cap & MCG_CTL_P)
 		wrmsr(MSR_IA32_MCG_CTL, 0xffffffff, 0xffffffff);
+}
+
+static void __mcheck_cpu_init_clear_banks(void)
+{
+	int i;
 
 	for (i = 0; i < mca_cfg.banks; i++) {
 		struct mce_bank *b = &mce_banks[i];
@@ -1717,6 +1721,7 @@ void mcheck_cpu_init(struct cpuinfo_x86 *c)
 
 	__mcheck_cpu_init_generic();
 	__mcheck_cpu_init_vendor(c);
+	__mcheck_cpu_init_clear_banks();
 	__mcheck_cpu_init_timer();
 }
 
@@ -2121,6 +2126,7 @@ static void mce_syscore_resume(void)
 {
 	__mcheck_cpu_init_generic();
 	__mcheck_cpu_init_vendor(raw_cpu_ptr(&cpu_info));
+	__mcheck_cpu_init_clear_banks();
 }
 
 static struct syscore_ops mce_syscore_ops = {
@@ -2138,6 +2144,7 @@ static void mce_cpu_restart(void *data)
 	if (!mce_available(raw_cpu_ptr(&cpu_info)))
 		return;
 	__mcheck_cpu_init_generic();
+	__mcheck_cpu_init_clear_banks();
 	__mcheck_cpu_init_timer();
 }
 
-- 
2.7.3

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[PATCH 0/7] tip/ras/core: Second pile Borislav Petkov <bp@alien8.de> - 2016-04-30 14:40 +0200
  [PATCH 6/7] x86/mce: Look in genpool instead of mcelog for pending error records Borislav Petkov <bp@alien8.de> - 2016-04-30 14:40 +0200
    [tip:ras/core] x86/mce: Look in genpool instead of mcelog for  pending error records tip-bot for Tony Luck <tipbot@zytor.com> - 2016-05-03 10:00 +0200
  [PATCH 2/7] x86/mce: Grade uncorrected errors for SMCA-enabled systems Borislav Petkov <bp@alien8.de> - 2016-04-30 14:40 +0200
    [tip:ras/core] x86/mce: Grade uncorrected errors for SMCA-enabled  systems tip-bot for Aravind Gopalakrishnan <tipbot@zytor.com> - 2016-05-03 09:50 +0200
  [PATCH 1/7] x86/mce: Log MCEs after a warm rest on AMD, fam 0x17 and later Borislav Petkov <bp@alien8.de> - 2016-04-30 14:40 +0200
    [tip:ras/core] x86/mce: Log MCEs after a warm rest on AMD, Fam17h  and later tip-bot for Aravind Gopalakrishnan <tipbot@zytor.com> - 2016-05-03 09:50 +0200
  [PATCH 3/7] x86/mce: Carve out writes to MCx_STATUS and MCx_CTL Borislav Petkov <bp@alien8.de> - 2016-04-30 14:40 +0200
    [tip:ras/core] x86/mce: Carve out writes to MCx_STATUS and MCx_CTL tip-bot for Aravind Gopalakrishnan <tipbot@zytor.com> - 2016-05-03 09:50 +0200

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