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Groups > linux.kernel > #1393118
| From | tip-bot for Aravind Gopalakrishnan <tipbot@zytor.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [tip:ras/core] x86/mce: Carve out writes to MCx_STATUS and MCx_CTL |
| Date | 2016-05-03 09:50 +0200 |
| Message-ID | <ruDfH-3LT-5@gated-at.bofh.it> (permalink) |
| References | <rtClJ-7N0-25@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
Commit-ID: bb91f8c0176b072aeb6b84cfd7e04084025121e0
Gitweb: http://git.kernel.org/tip/bb91f8c0176b072aeb6b84cfd7e04084025121e0
Author: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>
AuthorDate: Sat, 30 Apr 2016 14:33:53 +0200
Committer: Ingo Molnar <mingo@kernel.org>
CommitDate: Tue, 3 May 2016 08:24:16 +0200
x86/mce: Carve out writes to MCx_STATUS and MCx_CTL
We need to do this after __mcheck_cpu_init_vendor() as for
ScalableMCA processors, there are going to be new MSR write handlers
if the feature is detected using CPUID bit (which happens in
__mcheck_cpu_init_vendor()).
No functional change is introduced here.
Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>
Signed-off-by: Yazen Ghannam <Yazen.Ghannam@amd.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Aravind Gopalakrishnan <aravindksg.lkml@gmail.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Tony Luck <tony.luck@intel.com>
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/1462019637-16474-4-git-send-email-bp@alien8.de
Signed-off-by: Ingo Molnar <mingo@kernel.org>
---
arch/x86/kernel/cpu/mcheck/mce.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 43f8b49..6bffb26 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -1420,7 +1420,6 @@ static void __mcheck_cpu_init_generic(void)
enum mcp_flags m_fl = 0;
mce_banks_t all_banks;
u64 cap;
- int i;
if (!mca_cfg.bootlog)
m_fl = MCP_DONTLOG;
@@ -1436,6 +1435,11 @@ static void __mcheck_cpu_init_generic(void)
rdmsrl(MSR_IA32_MCG_CAP, cap);
if (cap & MCG_CTL_P)
wrmsr(MSR_IA32_MCG_CTL, 0xffffffff, 0xffffffff);
+}
+
+static void __mcheck_cpu_init_clear_banks(void)
+{
+ int i;
for (i = 0; i < mca_cfg.banks; i++) {
struct mce_bank *b = &mce_banks[i];
@@ -1717,6 +1721,7 @@ void mcheck_cpu_init(struct cpuinfo_x86 *c)
__mcheck_cpu_init_generic();
__mcheck_cpu_init_vendor(c);
+ __mcheck_cpu_init_clear_banks();
__mcheck_cpu_init_timer();
}
@@ -2121,6 +2126,7 @@ static void mce_syscore_resume(void)
{
__mcheck_cpu_init_generic();
__mcheck_cpu_init_vendor(raw_cpu_ptr(&cpu_info));
+ __mcheck_cpu_init_clear_banks();
}
static struct syscore_ops mce_syscore_ops = {
@@ -2138,6 +2144,7 @@ static void mce_cpu_restart(void *data)
if (!mce_available(raw_cpu_ptr(&cpu_info)))
return;
__mcheck_cpu_init_generic();
+ __mcheck_cpu_init_clear_banks();
__mcheck_cpu_init_timer();
}
Back to linux.kernel | Previous | Next — Previous in thread | Find similar | Unroll thread
[PATCH 0/7] tip/ras/core: Second pile Borislav Petkov <bp@alien8.de> - 2016-04-30 14:40 +0200
[PATCH 6/7] x86/mce: Look in genpool instead of mcelog for pending error records Borislav Petkov <bp@alien8.de> - 2016-04-30 14:40 +0200
[tip:ras/core] x86/mce: Look in genpool instead of mcelog for pending error records tip-bot for Tony Luck <tipbot@zytor.com> - 2016-05-03 10:00 +0200
[PATCH 2/7] x86/mce: Grade uncorrected errors for SMCA-enabled systems Borislav Petkov <bp@alien8.de> - 2016-04-30 14:40 +0200
[tip:ras/core] x86/mce: Grade uncorrected errors for SMCA-enabled systems tip-bot for Aravind Gopalakrishnan <tipbot@zytor.com> - 2016-05-03 09:50 +0200
[PATCH 1/7] x86/mce: Log MCEs after a warm rest on AMD, fam 0x17 and later Borislav Petkov <bp@alien8.de> - 2016-04-30 14:40 +0200
[tip:ras/core] x86/mce: Log MCEs after a warm rest on AMD, Fam17h and later tip-bot for Aravind Gopalakrishnan <tipbot@zytor.com> - 2016-05-03 09:50 +0200
[PATCH 3/7] x86/mce: Carve out writes to MCx_STATUS and MCx_CTL Borislav Petkov <bp@alien8.de> - 2016-04-30 14:40 +0200
[tip:ras/core] x86/mce: Carve out writes to MCx_STATUS and MCx_CTL tip-bot for Aravind Gopalakrishnan <tipbot@zytor.com> - 2016-05-03 09:50 +0200
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