Re: [PATCH 6/7] pinctrl: tegra: Add DT binding for io pads control

From	Jon Hunter <jonathanh@nvidia.com>
Newsgroups	linux.kernel
Subject	Re: [PATCH 6/7] pinctrl: tegra: Add DT binding for io pads control
Date	2016-04-15 16:20 +0200
Message-ID	<rocLg-4gd-11@gated-at.bofh.it> (permalink)
References	<rn8gF-10N-7@gated-at.bofh.it> <rn8gG-10N-35@gated-at.bofh.it>
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On 12/04/16 15:56, Laxman Dewangan wrote:
> NVIDIA Tegra210 supports the IO pads which can operate at 1.8V
> or 3.3V I/O voltage levels. Also IO pads can be configured for
> power down state if it is not in used. SW needs to configure the
> voltage level of IO pads based on IO rail voltage and its power
> state based on platform usage.
> 
> Add DT binding document for detailing the DT properties for
> configuring IO pads voltage levels and its power state.
> 
> Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>

[snip]

> +Required subnode-properties:
> +==========================
> +- pins : An array of strings. Each string contains the name of an IO pads. Valid
> +	 values for these names are listed below.
> +
> +Optional subnode-properties:
> +==========================
> +-nvidia,io-rail-voltage:	Integer. The voltage level of IO pads. The
> +				valid values are 1.8V and 3.3V. Macros are
> +				defined for these voltage levels in
> +				<dt-bindings/pinctrl/pinctrl-tegra210-io-pad.h>
> +					Use TEGRA210_IO_RAIL_1800000UV for 1.8V
> +					Use TEGRA210_IO_RAIL_3300000UV for 3.3V
> +
> +-nvidia,io-pad-deep-power-down: Integer, representing the deep power down state
> +				of the IO pads. If this is enable then IO pads
> +				will be in power down state and interface is not
> +				enabled for any transaction. This is power
> +				saving mode of the IO pads. The macros are
> +				defined for enable/disable in
> +				<dt-bindings/pinctrl/pinctrl-tegra210-io-pad.h>
> +				  TEGRA210_IO_PAD_DEEP_POWER_DOWN_DISABLE for
> +					disable.
> +				  TEGRA210_IO_PAD_DEEP_POWER_DOWN_ENABLE for
> +					enable.
> +Valid values for pin are:
> +	audio, audio-hv, cam, csia, csib, csic, csid, csie, csif,
> +	dbg, debug-nonao, dmic, dp, dsi, dsib, dsic, dsid, emmc, emmc2,
> +	gpio, hdmi, hsic, lvds, mipi-bias, pex-bias, pex-clk1, pex-clk2,
> +	pex-ctrl, sdmmc1, sdmmc3, spi, spi-hv, uart, usb-bias, usb0,
> +	usb1, usb2, usb3.

Thinking about this some more, the above are not IO pads but supply
pads, AFAICT. And these supply pads, are supplying the voltage to
various IO pads. I am not sure if these should be named vddio_xxx. The
'pins' properties says these are IO pads, but this does not seem correct.

We also need to think about how these supply pads are linked to the
actual IO pads. Or at least it seems they should be some how ...

Cheers
Jon

Thread

[PATCH 0/7] pinctrl: soc/tegra: Add support to configure IO rail voltage and pad power states Laxman Dewangan <ldewangan@nvidia.com> - 2016-04-12 17:20 +0200
  [PATCH 2/7] soc/tegra: pmc: Add new Tegra210 IO rails Laxman Dewangan <ldewangan@nvidia.com> - 2016-04-12 17:20 +0200
    Re: [PATCH 2/7] soc/tegra: pmc: Add new Tegra210 IO rails Thierry Reding <thierry.reding@gmail.com> - 2016-04-12 17:30 +0200
      Re: [PATCH 2/7] soc/tegra: pmc: Add new Tegra210 IO rails Laxman Dewangan <ldewangan@nvidia.com> - 2016-04-12 19:20 +0200
        Re: [PATCH 2/7] soc/tegra: pmc: Add new Tegra210 IO rails Laxman Dewangan <ldewangan@nvidia.com> - 2016-04-12 20:10 +0200
        Re: [PATCH 2/7] soc/tegra: pmc: Add new Tegra210 IO rails Jon Hunter <jonathanh@nvidia.com> - 2016-04-12 20:10 +0200
  [PATCH 6/7] pinctrl: tegra: Add DT binding for io pads control Laxman Dewangan <ldewangan@nvidia.com> - 2016-04-12 17:20 +0200
    Re: [PATCH 6/7] pinctrl: tegra: Add DT binding for io pads control Jon Hunter <jonathanh@nvidia.com> - 2016-04-13 11:10 +0200
      Re: [PATCH 6/7] pinctrl: tegra: Add DT binding for io pads control Laxman Dewangan <ldewangan@nvidia.com> - 2016-04-13 11:20 +0200
        Re: [PATCH 6/7] pinctrl: tegra: Add DT binding for io pads control Jon Hunter <jonathanh@nvidia.com> - 2016-04-13 11:40 +0200
    Re: [PATCH 6/7] pinctrl: tegra: Add DT binding for io pads control Jon Hunter <jonathanh@nvidia.com> - 2016-04-15 16:20 +0200
      Re: [PATCH 6/7] pinctrl: tegra: Add DT binding for io pads control Laxman Dewangan <ldewangan@nvidia.com> - 2016-04-15 16:30 +0200
        Re: [PATCH 6/7] pinctrl: tegra: Add DT binding for io pads control Jon Hunter <jonathanh@nvidia.com> - 2016-04-15 17:20 +0200
          Re: [PATCH 6/7] pinctrl: tegra: Add DT binding for io pads control Laxman Dewangan <ldewangan@nvidia.com> - 2016-04-15 17:30 +0200
            Re: [PATCH 6/7] pinctrl: tegra: Add DT binding for io pads control Jon Hunter <jonathanh@nvidia.com> - 2016-04-15 17:50 +0200
              Re: [PATCH 6/7] pinctrl: tegra: Add DT binding for io pads control Laxman Dewangan <ldewangan@nvidia.com> - 2016-04-15 19:00 +0200
                Re: [PATCH 6/7] pinctrl: tegra: Add DT binding for io pads control Jon Hunter <jonathanh@nvidia.com> - 2016-04-15 19:50 +0200
                Re: [PATCH 6/7] pinctrl: tegra: Add DT binding for io pads control Laxman Dewangan <ldewangan@nvidia.com> - 2016-04-15 20:10 +0200
                Re: [PATCH 6/7] pinctrl: tegra: Add DT binding for io pads control Jon Hunter <jonathanh@nvidia.com> - 2016-04-15 20:40 +0200
                Re: [PATCH 6/7] pinctrl: tegra: Add DT binding for io pads control Laxman Dewangan <ldewangan@nvidia.com> - 2016-04-15 21:00 +0200
    Re: [PATCH 6/7] pinctrl: tegra: Add DT binding for io pads control Stephen Warren <swarren@wwwdotorg.org> - 2016-04-15 18:40 +0200
      Re: [PATCH 6/7] pinctrl: tegra: Add DT binding for io pads control Laxman Dewangan <ldewangan@nvidia.com> - 2016-04-15 18:50 +0200
  [PATCH 7/7] pinctrl: tegra: Add driver to configure voltage and power state of io pads Laxman Dewangan <ldewangan@nvidia.com> - 2016-04-12 17:20 +0200
    Re: [PATCH 7/7] pinctrl: tegra: Add driver to configure voltage and  power state of io pads Linus Walleij <linus.walleij@linaro.org> - 2016-04-15 10:10 +0200
      Re: [PATCH 7/7] pinctrl: tegra: Add driver to configure voltage and  power state of io pads Laxman Dewangan <ldewangan@nvidia.com> - 2016-04-15 11:00 +0200
        Re: [PATCH 7/7] pinctrl: tegra: Add driver to configure voltage and  power state of io pads Linus Walleij <linus.walleij@linaro.org> - 2016-04-15 11:30 +0200
          Re: [PATCH 7/7] pinctrl: tegra: Add driver to configure voltage and  power state of io pads Laxman Dewangan <ldewangan@nvidia.com> - 2016-04-15 12:10 +0200
            Re: [PATCH 7/7] pinctrl: tegra: Add driver to configure voltage and  power state of io pads Linus Walleij <linus.walleij@linaro.org> - 2016-04-15 13:20 +0200
              Re: [PATCH 7/7] pinctrl: tegra: Add driver to configure voltage and  power state of io pads Laxman Dewangan <ldewangan@nvidia.com> - 2016-04-15 14:00 +0200
                Re: [PATCH 7/7] pinctrl: tegra: Add driver to configure voltage and  power state of io pads Linus Walleij <linus.walleij@linaro.org> - 2016-04-15 16:10 +0200
                Re: [PATCH 7/7] pinctrl: tegra: Add driver to configure voltage and  power state of io pads Laxman Dewangan <ldewangan@nvidia.com> - 2016-04-15 16:20 +0200
                Re: [PATCH 7/7] pinctrl: tegra: Add driver to configure voltage and  power state of io pads Laxman Dewangan <ldewangan@nvidia.com> - 2016-04-19 12:10 +0200
                Re: [PATCH 7/7] pinctrl: tegra: Add driver to configure voltage and  power state of io pads Laxman Dewangan <ldewangan@nvidia.com> - 2016-04-26 15:50 +0200
                Re: [PATCH 7/7] pinctrl: tegra: Add driver to configure voltage and  power state of io pads Stephen Warren <swarren@wwwdotorg.org> - 2016-04-26 17:40 +0200
        Re: [PATCH 7/7] pinctrl: tegra: Add driver to configure voltage and  power state of io pads Stephen Warren <swarren@wwwdotorg.org> - 2016-04-15 18:40 +0200
  [PATCH 1/7] soc/tegra: pmc: Use BIT macro for register field definition Laxman Dewangan <ldewangan@nvidia.com> - 2016-04-12 17:20 +0200
    Re: [PATCH 1/7] soc/tegra: pmc: Use BIT macro for register field  definition Thierry Reding <thierry.reding@gmail.com> - 2016-04-12 17:30 +0200
      Re: [PATCH 1/7] soc/tegra: pmc: Use BIT macro for register field  definition Laxman Dewangan <ldewangan@nvidia.com> - 2016-04-12 19:10 +0200
      Re: [PATCH 1/7] soc/tegra: pmc: Use BIT macro for register field definition Linus Walleij <linus.walleij@linaro.org> - 2016-04-15 09:50 +0200

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