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[PATCH v3 18/23] powerpc: add inline functions for cache related instructions

From Christophe Leroy <christophe.leroy@c-s.fr>
Newsgroups linux.kernel
Subject [PATCH v3 18/23] powerpc: add inline functions for cache related instructions
Date 2015-11-17 15:10 +0100
Message-ID <qvP7l-64d-53@gated-at.bofh.it> (permalink)
References <qvP7j-64d-7@gated-at.bofh.it>
Organization linux.* mail to news gateway

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This patch adds inline functions to use dcbz, dcbi, dcbf, dcbst
from C functions

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
---
v2: new
v3: no change

 arch/powerpc/include/asm/cache.h | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/arch/powerpc/include/asm/cache.h b/arch/powerpc/include/asm/cache.h
index 5f8229e..ffbafbf 100644
--- a/arch/powerpc/include/asm/cache.h
+++ b/arch/powerpc/include/asm/cache.h
@@ -69,6 +69,25 @@ extern void _set_L3CR(unsigned long);
 #define _set_L3CR(val)	do { } while(0)
 #endif
 
+static inline void dcbz(void *addr)
+{
+	__asm__ __volatile__ ("dcbz 0, %0" : : "r"(addr) : "memory");
+}
+
+static inline void dcbi(void *addr)
+{
+	__asm__ __volatile__ ("dcbi 0, %0" : : "r"(addr) : "memory");
+}
+
+static inline void dcbf(void *addr)
+{
+	__asm__ __volatile__ ("dcbf 0, %0" : : "r"(addr) : "memory");
+}
+
+static inline void dcbst(void *addr)
+{
+	__asm__ __volatile__ ("dcbst 0, %0" : : "r"(addr) : "memory");
+}
 #endif /* !__ASSEMBLY__ */
 #endif /* __KERNEL__ */
 #endif /* _ASM_POWERPC_CACHE_H */
-- 
2.1.0

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[PATCH v3 00/23] powerpc/8xx: Use large pages for RAM and IMMR and other improvments Christophe Leroy <christophe.leroy@c-s.fr> - 2015-11-17 15:10 +0100
  [PATCH v3 12/23] powerpc32: remove ioremap_base Christophe Leroy <christophe.leroy@c-s.fr> - 2015-11-17 15:10 +0100
  [PATCH v3 18/23] powerpc: add inline functions for cache related  instructions Christophe Leroy <christophe.leroy@c-s.fr> - 2015-11-17 15:10 +0100
  [PATCH v3 09/23] powerpc/8xx: CONFIG_PIN_TLB unneeded for  CONFIG_PPC_EARLY_DEBUG_CPM Christophe Leroy <christophe.leroy@c-s.fr> - 2015-11-17 15:10 +0100
  [PATCH v3 07/23] powerpc/8xx: Fix vaddr for IMMR early remap Christophe Leroy <christophe.leroy@c-s.fr> - 2015-11-17 15:10 +0100
    Re: [PATCH v3 07/23] powerpc/8xx: Fix vaddr for IMMR early remap kbuild test robot <lkp@intel.com> - 2015-11-17 16:50 +0100
    Re: [PATCH v3 07/23] powerpc/8xx: Fix vaddr for IMMR early remap kbuild test robot <lkp@intel.com> - 2015-11-17 17:50 +0100
  [PATCH v3 03/23] powerpc: Update documentation for noltlbs kernel parameter Christophe Leroy <christophe.leroy@c-s.fr> - 2015-11-17 15:10 +0100
  [PATCH v3 08/23] powerpc/8xx: Map IMMR area with 512k page at a fixed  address Christophe Leroy <christophe.leroy@c-s.fr> - 2015-11-17 15:10 +0100
  [PATCH v3 17/23] powerpc/8xx: rewrite flush_instruction_cache() in C Christophe Leroy <christophe.leroy@c-s.fr> - 2015-11-17 15:10 +0100
  [PATCH v3 19/23] powerpc32: Remove clear_pages() and define  clear_page() inline Christophe Leroy <christophe.leroy@c-s.fr> - 2015-11-17 15:20 +0100
  [PATCH v3 13/23] powerpc/8xx: Add missing SPRN defines into reg_8xx.h Christophe Leroy <christophe.leroy@c-s.fr> - 2015-11-17 15:20 +0100
  [PATCH v3 20/23] powerpc32: move xxxxx_dcache_range() functions  inline Christophe Leroy <christophe.leroy@c-s.fr> - 2015-11-17 15:20 +0100
  [PATCH v3 21/23] powerpc: Simplify test in __dma_sync() Christophe Leroy <christophe.leroy@c-s.fr> - 2015-11-17 15:20 +0100
  [PATCH v3 01/23] powerpc/8xx: Save r3 all the time in DTLB miss handler Christophe Leroy <christophe.leroy@c-s.fr> - 2015-11-17 15:20 +0100
  [PATCH v3 15/23] powerpc/8xx: remove special handling of CPU6 errata  in set_dec() Christophe Leroy <christophe.leroy@c-s.fr> - 2015-11-17 15:20 +0100
  [PATCH v3 06/23] powerpc32: refactor x_mapped_by_bats() and x_mapped_by_tlbcam() together Christophe Leroy <christophe.leroy@c-s.fr> - 2015-11-17 15:20 +0100
  [PATCH v3 10/23] powerpc/8xx: map more RAM at startup when needed Christophe Leroy <christophe.leroy@c-s.fr> - 2015-11-17 15:20 +0100

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