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Re: [PATCH v7 11/17] Documentation: phy: add document for rockchip dp phy

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On 10/28/2015 07:08 AM, Heiko Stuebner wrote:
> Am Samstag, 24. Oktober 2015, 11:06:37 schrieb Yakir Yang:
>> Add dt binding documentation for rockchip display port PHY.
>>
>> Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
>> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
>> ---
>> Changes in v7: None
>> Changes in v6: None
>> Changes in v5:
>> - Split binding doc's from driver changes. (Rob)
>> - Update the rockchip,grf explain in document, and correct the clock required
>>    elemets in document. (Rob & Heiko)
>>
>> Changes in v4: None
>> Changes in v3: None
>> Changes in v2: None
>>
>>   .../devicetree/bindings/phy/rockchip-dp-phy.txt    | 22 ++++++++++++++++++++++
>>   1 file changed, 22 insertions(+)
>>   create mode 100644 Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt
>>
>> diff --git a/Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt b/Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt
>> new file mode 100644
>> index 0000000..505194e
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt
>> @@ -0,0 +1,22 @@
>> +Rockchip Soc Seroes Display Port PHY
>> +------------------------------------
>> +
>> +Required properties:
>> +- compatible : should be one of the following supported values:
>> +	 - "rockchip.rk3288-dp-phy"
>> +- clocks: from common clock binding: handle to dp clock.
>> +	of memory mapped region.
>> +- clock-names: from common clock binding:
>> +	Required elements: "24m"
>> +- rockchip,grf: phandle to the syscon managing the "general register files"
>> +- #phy-cells : from the generic PHY bindings, must be 0;
>> +
>> +Example:
>> +
>> +edp_phy: edp-phy@ff770274 {
> one small thing, I found while playing more ... the node should not have
> an address, as it also does not have register property. So just name it
> 	edp_phy: edp-phy {
> 		...
> 	};
>
> There is only one anyway on the rk3288.
>
> With that change the Reviewed-by still applies :-)

Okay,

- Yakir

>
>> +	compatible = "rockchip,rk3288-dp-phy";
>> +	rockchip,grf = <&grf>;
>> +	clocks = <&cru SCLK_EDP_24M>;
>> +	clock-names = "24m";
>> +	#phy-cells = <0>;
>> +};
>>
>
>
>


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Thread

[PATCH v7 0/17] Add Analogix Core Display Port Driver Yakir Yang <ykk@rock-chips.com> - 2015-10-23 13:30 +0200
  [PATCH v7 04/17] drm: bridge: analogix/dp: remove duplicate configuration of link rate and link count Yakir Yang <ykk@rock-chips.com> - 2015-10-23 13:40 +0200
  [PATCH v7 05/17] drm: bridge: analogix/dp: dynamic parse sync_pol & interlace & dynamic_range Yakir Yang <ykk@rock-chips.com> - 2015-10-23 13:40 +0200
  [PATCH v7 03/17] drm: bridge: analogix/dp: fix some obvious code style Yakir Yang <ykk@rock-chips.com> - 2015-10-23 13:40 +0200
  [PATCH v7 01/17] drm: exynos: dp: convert to drm bridge mode Yakir Yang <ykk@rock-chips.com> - 2015-10-23 13:40 +0200
  [PATCH v7 15/17] drm: bridge: analogix/dp: try force hpd after plug in lookup failed Yakir Yang <ykk@rock-chips.com> - 2015-10-24 05:10 +0200
  [PATCH v7 14/17] drm: bridge: analogix/dp: add max link rate and lane count limit for RK3288 Yakir Yang <ykk@rock-chips.com> - 2015-10-24 05:10 +0200
  [PATCH v7 09/17] Documentation: drm/bridge: add document for analogix_dp Yakir Yang <ykk@rock-chips.com> - 2015-10-24 05:10 +0200
    Re: [PATCH v7 09/17] Documentation: drm/bridge: add document for analogix_dp Heiko Stuebner <heiko@sntech.de> - 2015-10-27 22:20 +0100
      Re: [PATCH v7 09/17] Documentation: drm/bridge: add document for  analogix_dp Yakir Yang <ykk@rock-chips.com> - 2015-10-28 03:10 +0100
  [PATCH v7 11/17] Documentation: phy: add document for rockchip dp phy Yakir Yang <ykk@rock-chips.com> - 2015-10-24 05:10 +0200
    [PATCH v7 13/17] drm: bridge: analogix/dp: add some rk3288 special registers setting Yakir Yang <ykk@rock-chips.com> - 2015-10-24 05:10 +0200
    [PATCH v7 12/17] drm: rockchip: vop: add bpc and color mode setting Yakir Yang <ykk@rock-chips.com> - 2015-10-24 05:10 +0200
    Re: [PATCH v7 11/17] Documentation: phy: add document for rockchip dp phy Heiko Stuebner <heiko@sntech.de> - 2015-10-27 22:30 +0100
      Re: [PATCH v7 11/17] Documentation: phy: add document for rockchip dp  phy Yakir Yang <ykk@rock-chips.com> - 2015-10-28 03:30 +0100
    Re: [PATCH v7 11/17] Documentation: phy: add document for rockchip dp phy Heiko Stuebner <heiko@sntech.de> - 2015-10-28 00:10 +0100
      Re: [PATCH v7 11/17] Documentation: phy: add document for rockchip dp  phy Yakir Yang <ykk@rock-chips.com> - 2015-10-28 03:30 +0100
  [PATCH v7 06/17] Documentation: drm/bridge: add document for analogix_dp Yakir Yang <ykk@rock-chips.com> - 2015-10-24 05:10 +0200
    [PATCH v7 07/17] ARM: dts: exynos/dp: remove some properties that deprecated by analogix_dp driver Yakir Yang <ykk@rock-chips.com> - 2015-10-24 05:10 +0200
    [PATCH v7 08/17] drm: rockchip: dp: add rockchip platform dp driver Yakir Yang <ykk@rock-chips.com> - 2015-10-24 05:10 +0200
    [PATCH v7 10/17] phy: Add driver for rockchip Display Port PHY Yakir Yang <ykk@rock-chips.com> - 2015-10-24 05:10 +0200
      Re: [PATCH v7 10/17] phy: Add driver for rockchip Display Port PHY Heiko Stuebner <heiko@sntech.de> - 2015-10-27 22:30 +0100
        Re: [PATCH v7 10/17] phy: Add driver for rockchip Display Port PHY Yakir Yang <ykk@rock-chips.com> - 2015-10-28 02:50 +0100
        Re: [PATCH v7 10/17] phy: Add driver for rockchip Display Port PHY Yakir Yang <ykk@rock-chips.com> - 2015-10-28 03:00 +0100
    Re: [PATCH v7 06/17] Documentation: drm/bridge: add document for analogix_dp Heiko Stuebner <heiko@sntech.de> - 2015-10-27 22:10 +0100
      Re: [PATCH v7 06/17] Documentation: drm/bridge: add document for  analogix_dp Yakir Yang <ykk@rock-chips.com> - 2015-10-28 03:10 +0100
  [PATCH v7 16/17] drm: bridge: analogix/dp: move hpd detect to connector detect function Yakir Yang <ykk@rock-chips.com> - 2015-10-24 05:30 +0200
    [PATCH v7 17/17] drm: bridge: analogix/dp: add edid modes parse in get_modes method Yakir Yang <ykk@rock-chips.com> - 2015-10-24 05:30 +0200

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