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Re: [PATCH v7 10/17] phy: Add driver for rockchip Display Port PHY

From Yakir Yang <ykk@rock-chips.com>
Newsgroups linux.kernel
Subject Re: [PATCH v7 10/17] phy: Add driver for rockchip Display Port PHY
Date 2015-10-28 02:50 +0100
Message-ID <qoo2e-4uc-19@gated-at.bofh.it> (permalink)
References <qmIHM-8pv-7@gated-at.bofh.it> <qmXnr-4qY-9@gated-at.bofh.it> <qmXnr-4qY-15@gated-at.bofh.it> <qojYE-1TG-59@gated-at.bofh.it>
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On 10/28/2015 05:23 AM, Heiko Stuebner wrote:
> Am Samstag, 24. Oktober 2015, 11:06:04 schrieb Yakir Yang:
>> Add phy driver for the Rockchip DisplayPort PHY module. This
>> is required to get DisplayPort working in Rockchip SoCs.
>>
>> Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
>> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
>> ---
>> diff --git a/drivers/phy/phy-rockchip-dp.c b/drivers/phy/phy-rockchip-dp.c
>> new file mode 100644
>> index 0000000..4af19af
>> --- /dev/null
>> +++ b/drivers/phy/phy-rockchip-dp.c
>> @@ -0,0 +1,153 @@
>> +/*
>> + * Rockchip DP PHY driver
>> + *
>> + * Copyright (C) 2015 FuZhou Rockchip Co., Ltd.
>> + * Author: Yakir Yang <ykk@@rock-chips.com>
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License as published by
>> + * the Free Software Foundation; either version 2 of the License.
>> + */
>> +
>> +#include <linux/io.h>
>> +#include <linux/kernel.h>
>> +#include <linux/module.h>
>> +#include <linux/of.h>
>> +#include <linux/of_address.h>
>> +#include <linux/clk.h>
>> +#include <linux/phy/phy.h>
>> +#include <linux/regmap.h>
>> +#include <linux/mfd/syscon.h>
>> +#include <linux/platform_device.h>
>> +
>> +#define GRF_SOC_CON12                   0x0274
>> +#define GRF_EDP_REF_CLK_SEL_INTER	BIT(4)
>> +#define GRF_EDP_PHY_SIDDQ_WRITE_EN      BIT(21)
>> +#define GRF_EDP_PHY_SIDDQ_ON            0
>> +#define GRF_EDP_PHY_SIDDQ_OFF           BIT(5)
> mixed spacers (tabs and spaces), please use either tabs if you want to
> align stuff or a single space.
>
> Also you're mixing the handling here, for SIDDQ you're defining both the
> actual bit as well as the write-enable bit, but for CLK_SEL_INTR you're
> hard-coding the 16-bit shift down in the code.
>
> You could also just use/copy the HIWORD_MASK macro we use for example
> in the clock controller.

Great, thanks.

- Yakir

>
>> +
>> +struct rockchip_dp_phy {
>> +	struct device  *dev;
>> +	struct regmap  *grf;
>> +	struct clk     *phy_24m;
>> +};
>> +
>> +static int rockchip_set_phy_state(struct phy *phy, bool enable)
>> +{
>> +	struct rockchip_dp_phy *dp = phy_get_drvdata(phy);
>> +	int ret;
>> +
>> +	if (enable) {
>> +		ret = regmap_write(dp->grf, GRF_SOC_CON12,
>> +				   GRF_EDP_PHY_SIDDQ_WRITE_EN |
>> +				   GRF_EDP_PHY_SIDDQ_ON);
>> +		if (ret < 0) {
>> +			dev_err(dp->dev, "Can't enable PHY power %d\n", ret);
>> +			return ret;
>> +		}
>> +
>> +		ret = clk_prepare_enable(dp->phy_24m);
>> +
> unnecessary empty line after clk_prepare_enable
>
>
> with these things fixed,
> Reviewed-by: Heiko Stuebner <heiko@sntech.de>
>
>
> Cheers,
> Heiko
>
>
>


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Thread

[PATCH v7 0/17] Add Analogix Core Display Port Driver Yakir Yang <ykk@rock-chips.com> - 2015-10-23 13:30 +0200
  [PATCH v7 04/17] drm: bridge: analogix/dp: remove duplicate configuration of link rate and link count Yakir Yang <ykk@rock-chips.com> - 2015-10-23 13:40 +0200
  [PATCH v7 05/17] drm: bridge: analogix/dp: dynamic parse sync_pol & interlace & dynamic_range Yakir Yang <ykk@rock-chips.com> - 2015-10-23 13:40 +0200
  [PATCH v7 03/17] drm: bridge: analogix/dp: fix some obvious code style Yakir Yang <ykk@rock-chips.com> - 2015-10-23 13:40 +0200
  [PATCH v7 01/17] drm: exynos: dp: convert to drm bridge mode Yakir Yang <ykk@rock-chips.com> - 2015-10-23 13:40 +0200
  [PATCH v7 15/17] drm: bridge: analogix/dp: try force hpd after plug in lookup failed Yakir Yang <ykk@rock-chips.com> - 2015-10-24 05:10 +0200
  [PATCH v7 14/17] drm: bridge: analogix/dp: add max link rate and lane count limit for RK3288 Yakir Yang <ykk@rock-chips.com> - 2015-10-24 05:10 +0200
  [PATCH v7 09/17] Documentation: drm/bridge: add document for analogix_dp Yakir Yang <ykk@rock-chips.com> - 2015-10-24 05:10 +0200
    Re: [PATCH v7 09/17] Documentation: drm/bridge: add document for analogix_dp Heiko Stuebner <heiko@sntech.de> - 2015-10-27 22:20 +0100
      Re: [PATCH v7 09/17] Documentation: drm/bridge: add document for  analogix_dp Yakir Yang <ykk@rock-chips.com> - 2015-10-28 03:10 +0100
  [PATCH v7 11/17] Documentation: phy: add document for rockchip dp phy Yakir Yang <ykk@rock-chips.com> - 2015-10-24 05:10 +0200
    [PATCH v7 13/17] drm: bridge: analogix/dp: add some rk3288 special registers setting Yakir Yang <ykk@rock-chips.com> - 2015-10-24 05:10 +0200
    [PATCH v7 12/17] drm: rockchip: vop: add bpc and color mode setting Yakir Yang <ykk@rock-chips.com> - 2015-10-24 05:10 +0200
    Re: [PATCH v7 11/17] Documentation: phy: add document for rockchip dp phy Heiko Stuebner <heiko@sntech.de> - 2015-10-27 22:30 +0100
      Re: [PATCH v7 11/17] Documentation: phy: add document for rockchip dp  phy Yakir Yang <ykk@rock-chips.com> - 2015-10-28 03:30 +0100
    Re: [PATCH v7 11/17] Documentation: phy: add document for rockchip dp phy Heiko Stuebner <heiko@sntech.de> - 2015-10-28 00:10 +0100
      Re: [PATCH v7 11/17] Documentation: phy: add document for rockchip dp  phy Yakir Yang <ykk@rock-chips.com> - 2015-10-28 03:30 +0100
  [PATCH v7 06/17] Documentation: drm/bridge: add document for analogix_dp Yakir Yang <ykk@rock-chips.com> - 2015-10-24 05:10 +0200
    [PATCH v7 07/17] ARM: dts: exynos/dp: remove some properties that deprecated by analogix_dp driver Yakir Yang <ykk@rock-chips.com> - 2015-10-24 05:10 +0200
    [PATCH v7 08/17] drm: rockchip: dp: add rockchip platform dp driver Yakir Yang <ykk@rock-chips.com> - 2015-10-24 05:10 +0200
    [PATCH v7 10/17] phy: Add driver for rockchip Display Port PHY Yakir Yang <ykk@rock-chips.com> - 2015-10-24 05:10 +0200
      Re: [PATCH v7 10/17] phy: Add driver for rockchip Display Port PHY Heiko Stuebner <heiko@sntech.de> - 2015-10-27 22:30 +0100
        Re: [PATCH v7 10/17] phy: Add driver for rockchip Display Port PHY Yakir Yang <ykk@rock-chips.com> - 2015-10-28 02:50 +0100
        Re: [PATCH v7 10/17] phy: Add driver for rockchip Display Port PHY Yakir Yang <ykk@rock-chips.com> - 2015-10-28 03:00 +0100
    Re: [PATCH v7 06/17] Documentation: drm/bridge: add document for analogix_dp Heiko Stuebner <heiko@sntech.de> - 2015-10-27 22:10 +0100
      Re: [PATCH v7 06/17] Documentation: drm/bridge: add document for  analogix_dp Yakir Yang <ykk@rock-chips.com> - 2015-10-28 03:10 +0100
  [PATCH v7 16/17] drm: bridge: analogix/dp: move hpd detect to connector detect function Yakir Yang <ykk@rock-chips.com> - 2015-10-24 05:30 +0200
    [PATCH v7 17/17] drm: bridge: analogix/dp: add edid modes parse in get_modes method Yakir Yang <ykk@rock-chips.com> - 2015-10-24 05:30 +0200

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