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| Path | csiph.com!eternal-september.org!feeder.eternal-september.org!aioe.org!bofh.it!news.nic.it!robomod |
|---|---|
| From | Catalin Marinas <catalin.marinas@arm.com> |
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH 2/5] irqchip/gic-v3: Make gic_enable_sre an inline function |
| Date | Thu, 08 Oct 2015 18:00:01 +0200 |
| Message-ID | <qhlLP-81t-1@gated-at.bofh.it> (permalink) |
| References | <qfbxf-od-5@gated-at.bofh.it> <qfbxf-od-3@gated-at.bofh.it> |
| X-Original-To | Marc Zyngier <marc.zyngier@arm.com> |
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| User-Agent | Mutt/1.5.23 (2014-03-12) |
| Sender | robomod@news.nic.it |
| List-ID | <linux-kernel.vger.kernel.org> |
| X-Mailing-List | linux-kernel@vger.kernel.org |
| Approved | robomod@news.nic.it |
| Lines | 28 |
| Organization | linux.* mail to news gateway |
| X-Original-Cc | Thomas Gleixner <tglx@linutronix.de>, Jason Cooper <jason@lakedaemon.net>, Will Deacon <will.deacon@arm.com>, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org |
| X-Original-Date | Thu, 8 Oct 2015 16:54:04 +0100 |
| X-Original-Message-ID | <20151008155404.GN17192@e104818-lin.cambridge.arm.com> |
| X-Original-References | <1443803874-9566-1-git-send-email-marc.zyngier@arm.com> <1443803874-9566-3-git-send-email-marc.zyngier@arm.com> |
| X-Original-Sender | linux-kernel-owner@vger.kernel.org |
| Xref | csiph.com linux.kernel:1242556 |
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On Fri, Oct 02, 2015 at 05:37:51PM +0100, Marc Zyngier wrote:
> +static inline bool gic_enable_sre(void)
> +{
> + u64 val;
> +
> + asm volatile("mrs_s %0, " __stringify(ICC_SRE_EL1) : "=r" (val));
> + if (val & ICC_SRE_EL1_SRE)
> + return true;
> +
> + val |= ICC_SRE_EL1_SRE;
> + asm volatile("msr_s " __stringify(ICC_SRE_EL1) ", %0" : : "r" (val));
> + isb();
> + asm volatile("mrs_s %0, " __stringify(ICC_SRE_EL1) : "=r" (val));
> +
> + return !!(val & ICC_SRE_EL1_SRE);
> +}
I don't think !! is needed ;). Apparently, from ISO C99: "When any
scalar value is converted to _Bool, the result is 0 if the value
compares equal to 0; otherwise, the result is 1."
--
Catalin
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Re: [PATCH 2/5] irqchip/gic-v3: Make gic_enable_sre an inline function Catalin Marinas <catalin.marinas@arm.com> - 2015-10-08 18:00 +0200 Re: [PATCH 2/5] irqchip/gic-v3: Make gic_enable_sre an inline function Marc Zyngier <marc.zyngier@arm.com> - 2015-10-08 18:10 +0200
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