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Groups > linux.kernel > #1281732
| From | Qais Yousef <qais.yousef@imgtec.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH v3 13/19] irqchip/mips-gic: Add device hierarchy domain |
| Date | 2015-12-02 13:30 +0100 |
| Message-ID | <qBeHO-76w-43@gated-at.bofh.it> (permalink) |
| References | <qBeHM-76w-3@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
Now the root gic_irq_domain is split into device and IPI domains.
This form provides a better representation of how the root domain is split into
2. One for devices and one for IPIs.
Signed-off-by: Qais Yousef <qais.yousef@imgtec.com>
---
drivers/irqchip/irq-mips-gic.c | 103 +++++++++++++++++++++++++++++++++--------
1 file changed, 83 insertions(+), 20 deletions(-)
diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c
index a4e5b17f56f1..41ccc84c68ba 100644
--- a/drivers/irqchip/irq-mips-gic.c
+++ b/drivers/irqchip/irq-mips-gic.c
@@ -45,6 +45,7 @@ static void __iomem *gic_base;
static struct gic_pcpu_mask pcpu_masks[NR_CPUS];
static DEFINE_SPINLOCK(gic_lock);
static struct irq_domain *gic_irq_domain;
+static struct irq_domain *gic_dev_domain;
static struct irq_domain *gic_ipi_domain;
static int gic_shared_intrs;
static int gic_vpes;
@@ -780,25 +781,6 @@ static int gic_irq_domain_map(struct irq_domain *d, unsigned int virq,
return gic_shared_irq_domain_map(d, virq, hw, 0);
}
-static int gic_irq_domain_xlate(struct irq_domain *d, struct device_node *ctrlr,
- const u32 *intspec, unsigned int intsize,
- irq_hw_number_t *out_hwirq,
- unsigned int *out_type)
-{
- if (intsize != 3)
- return -EINVAL;
-
- if (intspec[0] == GIC_SHARED)
- *out_hwirq = GIC_SHARED_TO_HWIRQ(intspec[1]);
- else if (intspec[0] == GIC_LOCAL)
- *out_hwirq = GIC_LOCAL_TO_HWIRQ(intspec[1]);
- else
- return -EINVAL;
- *out_type = intspec[2] & IRQ_TYPE_SENSE_MASK;
-
- return 0;
-}
-
static int gic_irq_domain_alloc(struct irq_domain *d, unsigned int virq,
unsigned int nr_irqs, void *arg)
{
@@ -868,11 +850,86 @@ void gic_irq_domain_free(struct irq_domain *d, unsigned int virq,
bitmap_set(ipi_resrv, base_hwirq, nr_irqs);
}
+int gic_irq_domain_match(struct irq_domain *d, struct device_node *node,
+ enum irq_domain_bus_token bus_token)
+{
+ /* this domain should'nt be accessed directly */
+ return 0;
+}
+
static const struct irq_domain_ops gic_irq_domain_ops = {
.map = gic_irq_domain_map,
- .xlate = gic_irq_domain_xlate,
.alloc = gic_irq_domain_alloc,
.free = gic_irq_domain_free,
+ .match = gic_irq_domain_match,
+};
+
+static int gic_dev_domain_xlate(struct irq_domain *d, struct device_node *ctrlr,
+ const u32 *intspec, unsigned int intsize,
+ irq_hw_number_t *out_hwirq,
+ unsigned int *out_type)
+{
+ if (intsize != 3)
+ return -EINVAL;
+
+ if (intspec[0] == GIC_SHARED)
+ *out_hwirq = GIC_SHARED_TO_HWIRQ(intspec[1]);
+ else if (intspec[0] == GIC_LOCAL)
+ *out_hwirq = GIC_LOCAL_TO_HWIRQ(intspec[1]);
+ else
+ return -EINVAL;
+ *out_type = intspec[2] & IRQ_TYPE_SENSE_MASK;
+
+ return 0;
+}
+
+static int gic_dev_domain_alloc(struct irq_domain *d, unsigned int virq,
+ unsigned int nr_irqs, void *arg)
+{
+ struct irq_fwspec *fwspec = arg;
+ struct gic_irq_spec spec = {
+ .type = GIC_DEVICE,
+ .hwirq = fwspec->param[1],
+ };
+ int i, ret;
+ bool is_shared = fwspec->param[0] == GIC_SHARED;
+
+ if (is_shared) {
+ ret = irq_domain_alloc_irqs_parent(d, virq, nr_irqs, &spec);
+ if (ret)
+ return ret;
+ }
+
+ for (i = 0; i < nr_irqs; i++) {
+ irq_hw_number_t hwirq;
+
+ if (is_shared)
+ hwirq = GIC_SHARED_TO_HWIRQ(spec.hwirq + i);
+ else
+ hwirq = GIC_LOCAL_TO_HWIRQ(spec.hwirq + i);
+
+ ret = irq_domain_set_hwirq_and_chip(d, virq + i,
+ hwirq,
+ &gic_level_irq_controller,
+ NULL);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+
+void gic_dev_domain_free(struct irq_domain *d, unsigned int virq,
+ unsigned int nr_irqs)
+{
+ /* no real allocation is done for dev irqs, so no need to free anything */
+ return;
+}
+
+static struct irq_domain_ops gic_dev_domain_ops = {
+ .xlate = gic_dev_domain_xlate,
+ .alloc = gic_dev_domain_alloc,
+ .free = gic_dev_domain_free,
};
static int gic_ipi_domain_xlate(struct irq_domain *d, struct device_node *ctrlr,
@@ -1011,6 +1068,12 @@ static void __init __gic_init(unsigned long gic_base_addr,
if (!gic_irq_domain)
panic("Failed to add GIC IRQ domain");
+ gic_dev_domain = irq_domain_add_hierarchy(gic_irq_domain, 0,
+ GIC_NUM_LOCAL_INTRS + gic_shared_intrs,
+ node, &gic_dev_domain_ops, NULL);
+ if (!gic_dev_domain)
+ panic("Failed to add GIC DEV domain");
+
gic_ipi_domain = irq_domain_add_hierarchy(gic_irq_domain,
IRQ_DOMAIN_FLAG_IPI_PER_CPU,
GIC_NUM_LOCAL_INTRS + gic_shared_intrs,
--
2.1.0
--
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[PATCH v3 00/19] Implement generic IPI support mechanism Qais Yousef <qais.yousef@imgtec.com> - 2015-12-02 13:30 +0100
[PATCH v3 01/19] genirq: Add new IRQ_DOMAIN_FLAGS_IPI Qais Yousef <qais.yousef@imgtec.com> - 2015-12-02 13:30 +0100
[PATCH v3 04/19] genirq: Add struct ipi_mapping and its helper functions Qais Yousef <qais.yousef@imgtec.com> - 2015-12-02 13:30 +0100
[PATCH v3 08/19] genirq: Add a new generic IPI reservation code to irq core Qais Yousef <qais.yousef@imgtec.com> - 2015-12-02 13:30 +0100
[PATCH v3 11/19] genirq: Implement ipi_send_{mask, single}() Qais Yousef <qais.yousef@imgtec.com> - 2015-12-02 13:30 +0100
[PATCH v3 09/19] genirq: Add a new function to get IPI reverse mapping Qais Yousef <qais.yousef@imgtec.com> - 2015-12-02 13:30 +0100
[PATCH v3 17/19] MIPS: Make smp CMP, CPS and MT use the new generic IPI functions Qais Yousef <qais.yousef@imgtec.com> - 2015-12-02 13:30 +0100
[PATCH v3 18/19] MIPS: Delete smp-gic.c Qais Yousef <qais.yousef@imgtec.com> - 2015-12-02 13:30 +0100
[PATCH v3 03/19] genirq: Add GENERIC_IRQ_IPI Kconfig symbol Qais Yousef <qais.yousef@imgtec.com> - 2015-12-02 13:30 +0100
[PATCH v3 02/19] genirq: Add DOMAIN_BUS_IPI Qais Yousef <qais.yousef@imgtec.com> - 2015-12-02 13:30 +0100
[PATCH v3 05/19] genirq: Add ipi_offset to irq_common_data Qais Yousef <qais.yousef@imgtec.com> - 2015-12-02 13:30 +0100
[PATCH v3 13/19] irqchip/mips-gic: Add device hierarchy domain Qais Yousef <qais.yousef@imgtec.com> - 2015-12-02 13:30 +0100
[PATCH v3 19/19] irqchip/mips-gic: Add new DT property to reserve IPIs Qais Yousef <qais.yousef@imgtec.com> - 2015-12-02 13:30 +0100
[PATCH v3 07/19] genirq: Make irq_domain_alloc_descs() non static Qais Yousef <qais.yousef@imgtec.com> - 2015-12-02 13:30 +0100
[PATCH v3 10/19] genirq: Add a new irq_send_ipi() to irq_chip Qais Yousef <qais.yousef@imgtec.com> - 2015-12-02 13:30 +0100
[PATCH v3 16/19] MIPS: Add generic SMP IPI support Qais Yousef <qais.yousef@imgtec.com> - 2015-12-02 13:30 +0100
[PATCH v3 06/19] genirq: Add an extra comment about the use of affinity in irq_common_data Qais Yousef <qais.yousef@imgtec.com> - 2015-12-02 13:30 +0100
[PATCH v3 12/19] irqchip/mips-gic: Add a IPI hierarchy domain Qais Yousef <qais.yousef@imgtec.com> - 2015-12-02 13:30 +0100
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