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Groups > linux.kernel > #1281725
| From | Qais Yousef <qais.yousef@imgtec.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH v3 17/19] MIPS: Make smp CMP, CPS and MT use the new generic IPI functions |
| Date | 2015-12-02 13:30 +0100 |
| Message-ID | <qBeHN-76w-33@gated-at.bofh.it> (permalink) |
| References | <qBeHM-76w-3@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
This commit does several things to avoid breaking bisectability.
1- Remove IPI init code from irqchip/mips-gic
2- Implement the new irqchip->send_ipi() in irqchip/mips-gic
3- Select GENERIC_IRQ_IPI Kconfig symbol for MIPS_GIC
4- Change MIPS SMP to use the generic IPI implementation
Only the SMP variants that use GIC were converted as it's the only irqchip that
will have the support for generic IPI for now.
Signed-off-by: Qais Yousef <qais.yousef@imgtec.com>
---
arch/mips/include/asm/smp-ops.h | 5 ++-
arch/mips/kernel/smp-cmp.c | 4 +-
arch/mips/kernel/smp-cps.c | 4 +-
arch/mips/kernel/smp-mt.c | 2 +-
drivers/irqchip/Kconfig | 1 +
drivers/irqchip/irq-mips-gic.c | 86 +++-------------------------------------
include/linux/irqchip/mips-gic.h | 3 --
7 files changed, 14 insertions(+), 91 deletions(-)
diff --git a/arch/mips/include/asm/smp-ops.h b/arch/mips/include/asm/smp-ops.h
index 6ba1fb8b11e2..db7c322f057f 100644
--- a/arch/mips/include/asm/smp-ops.h
+++ b/arch/mips/include/asm/smp-ops.h
@@ -44,8 +44,9 @@ static inline void plat_smp_setup(void)
mp_ops->smp_setup();
}
-extern void gic_send_ipi_single(int cpu, unsigned int action);
-extern void gic_send_ipi_mask(const struct cpumask *mask, unsigned int action);
+extern void mips_smp_send_ipi_single(int cpu, unsigned int action);
+extern void mips_smp_send_ipi_mask(const struct cpumask *mask,
+ unsigned int action);
#else /* !CONFIG_SMP */
diff --git a/arch/mips/kernel/smp-cmp.c b/arch/mips/kernel/smp-cmp.c
index d5e0f949dc48..76923349b4fe 100644
--- a/arch/mips/kernel/smp-cmp.c
+++ b/arch/mips/kernel/smp-cmp.c
@@ -149,8 +149,8 @@ void __init cmp_prepare_cpus(unsigned int max_cpus)
}
struct plat_smp_ops cmp_smp_ops = {
- .send_ipi_single = gic_send_ipi_single,
- .send_ipi_mask = gic_send_ipi_mask,
+ .send_ipi_single = mips_smp_send_ipi_single,
+ .send_ipi_mask = mips_smp_send_ipi_mask,
.init_secondary = cmp_init_secondary,
.smp_finish = cmp_smp_finish,
.boot_secondary = cmp_boot_secondary,
diff --git a/arch/mips/kernel/smp-cps.c b/arch/mips/kernel/smp-cps.c
index c88937745b4e..69d811e72f2b 100644
--- a/arch/mips/kernel/smp-cps.c
+++ b/arch/mips/kernel/smp-cps.c
@@ -444,8 +444,8 @@ static struct plat_smp_ops cps_smp_ops = {
.boot_secondary = cps_boot_secondary,
.init_secondary = cps_init_secondary,
.smp_finish = cps_smp_finish,
- .send_ipi_single = gic_send_ipi_single,
- .send_ipi_mask = gic_send_ipi_mask,
+ .send_ipi_single = mips_smp_send_ipi_single,
+ .send_ipi_mask = mips_smp_send_ipi_mask,
#ifdef CONFIG_HOTPLUG_CPU
.cpu_disable = cps_cpu_disable,
.cpu_die = cps_cpu_die,
diff --git a/arch/mips/kernel/smp-mt.c b/arch/mips/kernel/smp-mt.c
index 86311a164ef1..4f9570a57e8d 100644
--- a/arch/mips/kernel/smp-mt.c
+++ b/arch/mips/kernel/smp-mt.c
@@ -121,7 +121,7 @@ static void vsmp_send_ipi_single(int cpu, unsigned int action)
#ifdef CONFIG_MIPS_GIC
if (gic_present) {
- gic_send_ipi_single(cpu, action);
+ mips_smp_send_ipi_single(cpu, action);
return;
}
#endif
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index e1dcfdffd2c7..590bc55f28da 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -168,6 +168,7 @@ config KEYSTONE_IRQ
config MIPS_GIC
bool
+ select GENERIC_IRQ_IPI
select IRQ_DOMAIN_HIERARCHY
select MIPS_CM
diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c
index 2b1b48665612..77200da9d8d3 100644
--- a/drivers/irqchip/irq-mips-gic.c
+++ b/drivers/irqchip/irq-mips-gic.c
@@ -278,9 +278,11 @@ static void gic_bind_eic_interrupt(int irq, int set)
GIC_VPE_EIC_SS(irq), set);
}
-void gic_send_ipi(unsigned int intr)
+static void gic_send_ipi(struct irq_data *d, unsigned int cpu)
{
- gic_write(GIC_REG(SHARED, GIC_SH_WEDGE), GIC_SH_WEDGE_SET(intr));
+ irq_hw_number_t hwirq = GIC_HWIRQ_TO_SHARED(irqd_to_hwirq(d));
+
+ gic_write(GIC_REG(SHARED, GIC_SH_WEDGE), GIC_SH_WEDGE_SET(hwirq));
}
int gic_get_c0_compare_int(void)
@@ -482,6 +484,7 @@ static struct irq_chip gic_edge_irq_controller = {
#ifdef CONFIG_SMP
.irq_set_affinity = gic_set_affinity,
#endif
+ .ipi_send_single = gic_send_ipi,
};
static void gic_handle_local_int(bool chained)
@@ -575,83 +578,6 @@ static void gic_irq_dispatch(struct irq_desc *desc)
gic_handle_shared_int(true);
}
-#ifdef CONFIG_MIPS_GIC_IPI
-static int gic_resched_int_base;
-static int gic_call_int_base;
-
-unsigned int plat_ipi_resched_int_xlate(unsigned int cpu)
-{
- return gic_resched_int_base + cpu;
-}
-
-unsigned int plat_ipi_call_int_xlate(unsigned int cpu)
-{
- return gic_call_int_base + cpu;
-}
-
-static irqreturn_t ipi_resched_interrupt(int irq, void *dev_id)
-{
- scheduler_ipi();
-
- return IRQ_HANDLED;
-}
-
-static irqreturn_t ipi_call_interrupt(int irq, void *dev_id)
-{
- generic_smp_call_function_interrupt();
-
- return IRQ_HANDLED;
-}
-
-static struct irqaction irq_resched = {
- .handler = ipi_resched_interrupt,
- .flags = IRQF_PERCPU,
- .name = "IPI resched"
-};
-
-static struct irqaction irq_call = {
- .handler = ipi_call_interrupt,
- .flags = IRQF_PERCPU,
- .name = "IPI call"
-};
-
-static __init void gic_ipi_init_one(unsigned int intr, int cpu,
- struct irqaction *action)
-{
- int virq = irq_create_mapping(gic_irq_domain,
- GIC_SHARED_TO_HWIRQ(intr));
- int i;
-
- gic_map_to_vpe(intr, mips_cm_vp_id(cpu));
- for (i = 0; i < NR_CPUS; i++)
- clear_bit(intr, pcpu_masks[i].pcpu_mask);
- set_bit(intr, pcpu_masks[cpu].pcpu_mask);
-
- irq_set_irq_type(virq, IRQ_TYPE_EDGE_RISING);
-
- irq_set_handler(virq, handle_percpu_irq);
- setup_irq(virq, action);
-}
-
-static __init void gic_ipi_init(void)
-{
- int i;
-
- /* Use last 2 * NR_CPUS interrupts as IPIs */
- gic_resched_int_base = gic_shared_intrs - nr_cpu_ids;
- gic_call_int_base = gic_resched_int_base - nr_cpu_ids;
-
- for (i = 0; i < nr_cpu_ids; i++) {
- gic_ipi_init_one(gic_call_int_base + i, i, &irq_call);
- gic_ipi_init_one(gic_resched_int_base + i, i, &irq_resched);
- }
-}
-#else
-static inline void gic_ipi_init(void)
-{
-}
-#endif
-
static void __init gic_basic_init(void)
{
unsigned int i;
@@ -1090,8 +1016,6 @@ static void __init __gic_init(unsigned long gic_base_addr,
bitmap_set(ipi_resrv, gic_shared_intrs - 2 * gic_vpes, 2 * gic_vpes);
gic_basic_init();
-
- gic_ipi_init();
}
void __init gic_init(unsigned long gic_base_addr,
diff --git a/include/linux/irqchip/mips-gic.h b/include/linux/irqchip/mips-gic.h
index 4e6861605050..321278767506 100644
--- a/include/linux/irqchip/mips-gic.h
+++ b/include/linux/irqchip/mips-gic.h
@@ -258,9 +258,6 @@ extern void gic_write_compare(cycle_t cnt);
extern void gic_write_cpu_compare(cycle_t cnt, int cpu);
extern void gic_start_count(void);
extern void gic_stop_count(void);
-extern void gic_send_ipi(unsigned int intr);
-extern unsigned int plat_ipi_call_int_xlate(unsigned int);
-extern unsigned int plat_ipi_resched_int_xlate(unsigned int);
extern int gic_get_c0_compare_int(void);
extern int gic_get_c0_perfcount_int(void);
extern int gic_get_c0_fdc_int(void);
--
2.1.0
--
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[PATCH v3 00/19] Implement generic IPI support mechanism Qais Yousef <qais.yousef@imgtec.com> - 2015-12-02 13:30 +0100
[PATCH v3 01/19] genirq: Add new IRQ_DOMAIN_FLAGS_IPI Qais Yousef <qais.yousef@imgtec.com> - 2015-12-02 13:30 +0100
[PATCH v3 04/19] genirq: Add struct ipi_mapping and its helper functions Qais Yousef <qais.yousef@imgtec.com> - 2015-12-02 13:30 +0100
[PATCH v3 08/19] genirq: Add a new generic IPI reservation code to irq core Qais Yousef <qais.yousef@imgtec.com> - 2015-12-02 13:30 +0100
[PATCH v3 11/19] genirq: Implement ipi_send_{mask, single}() Qais Yousef <qais.yousef@imgtec.com> - 2015-12-02 13:30 +0100
[PATCH v3 09/19] genirq: Add a new function to get IPI reverse mapping Qais Yousef <qais.yousef@imgtec.com> - 2015-12-02 13:30 +0100
[PATCH v3 17/19] MIPS: Make smp CMP, CPS and MT use the new generic IPI functions Qais Yousef <qais.yousef@imgtec.com> - 2015-12-02 13:30 +0100
[PATCH v3 18/19] MIPS: Delete smp-gic.c Qais Yousef <qais.yousef@imgtec.com> - 2015-12-02 13:30 +0100
[PATCH v3 03/19] genirq: Add GENERIC_IRQ_IPI Kconfig symbol Qais Yousef <qais.yousef@imgtec.com> - 2015-12-02 13:30 +0100
[PATCH v3 02/19] genirq: Add DOMAIN_BUS_IPI Qais Yousef <qais.yousef@imgtec.com> - 2015-12-02 13:30 +0100
[PATCH v3 05/19] genirq: Add ipi_offset to irq_common_data Qais Yousef <qais.yousef@imgtec.com> - 2015-12-02 13:30 +0100
[PATCH v3 13/19] irqchip/mips-gic: Add device hierarchy domain Qais Yousef <qais.yousef@imgtec.com> - 2015-12-02 13:30 +0100
[PATCH v3 19/19] irqchip/mips-gic: Add new DT property to reserve IPIs Qais Yousef <qais.yousef@imgtec.com> - 2015-12-02 13:30 +0100
[PATCH v3 07/19] genirq: Make irq_domain_alloc_descs() non static Qais Yousef <qais.yousef@imgtec.com> - 2015-12-02 13:30 +0100
[PATCH v3 10/19] genirq: Add a new irq_send_ipi() to irq_chip Qais Yousef <qais.yousef@imgtec.com> - 2015-12-02 13:30 +0100
[PATCH v3 16/19] MIPS: Add generic SMP IPI support Qais Yousef <qais.yousef@imgtec.com> - 2015-12-02 13:30 +0100
[PATCH v3 06/19] genirq: Add an extra comment about the use of affinity in irq_common_data Qais Yousef <qais.yousef@imgtec.com> - 2015-12-02 13:30 +0100
[PATCH v3 12/19] irqchip/mips-gic: Add a IPI hierarchy domain Qais Yousef <qais.yousef@imgtec.com> - 2015-12-02 13:30 +0100
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