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Groups > comp.arch > #2012 > unrolled thread

History of byte addressing

Started byJohn Levine <johnl@iecc.com>
First post2011-06-02 19:36 +0000
Last post2011-07-04 07:54 -0700
Articles 20 on this page of 92 — 24 participants

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  History of byte addressing John Levine <johnl@iecc.com> - 2011-06-02 19:36 +0000
    Re: History of byte addressing nmm1@cam.ac.uk - 2011-06-02 20:38 +0100
      Re: History of byte addressing Quadibloc <jsavard@ecn.ab.ca> - 2011-06-03 08:05 -0700
    Re: History of byte addressing Alex McDonald <blog@rivadpm.com> - 2011-06-03 05:26 -0700
      Re: History of byte addressing Anne & Lynn Wheeler <lynn@garlic.com> - 2011-06-03 09:48 -0400
    Re: History of byte addressing Quadibloc <jsavard@ecn.ab.ca> - 2011-06-03 07:49 -0700
      Re: History of byte addressing Quadibloc <jsavard@ecn.ab.ca> - 2011-06-03 10:56 -0700
    Re: History of byte addressing "Andy \"Krazy\" Glew" <andy@SPAM.comp-arch.net> - 2011-06-04 10:59 -0700
      Re: History of byte addressing Quadibloc <jsavard@ecn.ab.ca> - 2011-06-04 15:01 -0700
        Re: History of byte addressing nmm1@cam.ac.uk - 2011-06-04 22:53 +0100
          Re: History of byte addressing Quadibloc <jsavard@ecn.ab.ca> - 2011-06-05 10:40 -0700
      Re: History of byte addressing John Levine <johnl@iecc.com> - 2011-06-05 06:10 +0000
        Re: History of byte addressing Robert Myers <rbmyersusa@gmail.com> - 2011-06-05 10:00 -0700
          Re: History of byte addressing Robert Myers <rbmyersusa@gmail.com> - 2011-06-05 10:04 -0700
            Re: History of byte addressing Quadibloc <jsavard@ecn.ab.ca> - 2011-06-05 10:36 -0700
              Re: History of byte addressing "Paul A. Clayton" <paaronclayton@gmail.com> - 2011-06-05 11:00 -0700
                Re: History of byte addressing Morten Reistad <first@last.name> - 2011-06-05 21:42 +0200
                  Re: History of byte addressing anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2011-06-06 17:03 +0000
                    Re: History of byte addressing Andrew Reilly <areilly---@bigpond.net.au> - 2011-06-06 23:55 +0000
                      Re: History of byte addressing Quadibloc <jsavard@ecn.ab.ca> - 2011-06-06 18:26 -0700
                        Re: History of byte addressing Andrew Reilly <areilly---@bigpond.net.au> - 2011-06-07 05:08 +0000
                          Re: History of byte addressing Quadibloc <jsavard@ecn.ab.ca> - 2011-06-07 03:26 -0700
                        Re: History of byte addressing Roberto Waltman <usenet@rwaltman.com> - 2011-07-05 20:00 -0400
                          Re: History of byte addressing jsavard@excxn.aNOSPAMb.cdn.invalid (John Savard) - 2011-07-06 00:15 +0000
                Re: History of byte addressing George Neuner <gneuner2@comcast.net> - 2011-06-05 16:18 -0400
                Re: History of byte addressing Quadibloc <jsavard@ecn.ab.ca> - 2011-06-05 22:10 -0700
                Re: History of byte addressing torbenm@diku.dk (Torben Ægidius Mogensen) - 2011-06-07 10:50 +0200
                  Re: History of byte addressing "Skybuck Flying" <Windows7IsOK@DreamPC2006.com> - 2011-06-07 16:02 +0200
                Re: History of byte addressing "Skybuck Flying" <Windows7IsOK@DreamPC2006.com> - 2011-06-07 15:51 +0200
              Re: History of byte addressing Louis Krupp <lkrupp@nospam.indra.com.invalid> - 2011-06-05 13:43 -0600
                Re: History of byte addressing Quadibloc <jsavard@ecn.ab.ca> - 2011-06-05 22:12 -0700
                  Re: History of byte addressing EricP <ThatWouldBeTelling@thevillage.com> - 2011-06-06 02:04 -0400
                    Re: History of byte addressing Stephen Fuld <SFuld@alumni.cmu.edu.invalid> - 2011-06-05 23:49 -0700
                      Re: History of byte addressing EricP <ThatWouldBeTelling@thevillage.com> - 2011-06-06 13:34 -0400
                        Re: History of byte addressing Stephen Fuld <SFuld@alumni.cmu.edu.invalid> - 2011-06-06 10:49 -0700
                          Re: History of byte addressing "Andy \"Krazy\" Glew" <andy@SPAM.comp-arch.net> - 2011-06-06 22:42 -0700
                            Re: History of byte addressing Anne & Lynn Wheeler <lynn@garlic.com> - 2011-06-07 07:37 -0400
                            Re: History of byte addressing Stephen Fuld <SFuld@alumni.cmu.edu.invalid> - 2011-06-07 08:22 -0700
                              Re: History of byte addressing "Andy \"Krazy\" Glew" <andy@SPAM.comp-arch.net> - 2011-06-11 09:56 -0700
                                Re: History of byte addressing EricP <ThatWouldBeTelling@thevillage.com> - 2011-06-11 14:59 -0400
                                  Re: History of byte addressing Louis Krupp <lkrupp@nospam.indra.com.invalid> - 2011-06-11 18:52 -0600
                                    Re: History of byte addressing "Andy \"Krazy\" Glew" <andy@SPAM.comp-arch.net> - 2011-06-12 12:40 -0700
                              Re: History of byte addressing Anne & Lynn Wheeler <lynn@garlic.com> - 2011-06-11 15:05 -0400
                        Re: History of byte addressing Louis Krupp <lkrupp@nospam.indra.com.invalid> - 2011-06-06 13:10 -0600
                        Re: History of byte addressing George Neuner <gneuner2@comcast.net> - 2011-06-06 16:41 -0400
                        Re: History of byte addressing Quadibloc <jsavard@ecn.ab.ca> - 2011-06-06 18:13 -0700
                          Re: History of byte addressing Louis Krupp <lkrupp@nospam.indra.com.invalid> - 2011-06-06 23:50 -0600
                            Re: History of byte addressing Jim Haynes <jhaynes@alumni.uark.edu> - 2011-06-07 10:01 -0500
                              Re: History of byte addressing Louis Krupp <lkrupp@nospam.indra.com.invalid> - 2011-06-07 13:09 -0600
                                Re: History of byte addressing Louis Krupp <lkrupp@nospam.indra.com.invalid> - 2011-06-07 14:03 -0600
                  Re: History of byte addressing Louis Krupp <lkrupp@nospam.indra.com.invalid> - 2011-06-06 05:16 -0600
          Re: History of byte addressing Quadibloc <jsavard@ecn.ab.ca> - 2011-06-05 10:44 -0700
          Re: History of byte addressing John Levine <johnl@iecc.com> - 2011-06-06 05:00 +0000
            Re: History of byte addressing Quadibloc <jsavard@ecn.ab.ca> - 2011-06-05 22:11 -0700
              Re: History of byte addressing nmm1@cam.ac.uk - 2011-06-06 08:00 +0100
                Re: History of byte addressing Quadibloc <jsavard@ecn.ab.ca> - 2011-06-06 18:16 -0700
              Re: History of byte addressing Michael S <already5chosen@yahoo.com> - 2011-06-06 01:01 -0700
                Re: History of byte addressing nmm1@cam.ac.uk - 2011-06-06 08:30 +0100
                  Re: History of byte addressing Terje Mathisen <"terje.mathisen at tmsw.no"> - 2011-06-06 10:34 +0200
                    Re: History of byte addressing Michael S <already5chosen@yahoo.com> - 2011-06-06 03:29 -0700
                      Re: History of byte addressing Terje Mathisen <"terje.mathisen at tmsw.no"> - 2011-06-06 15:21 +0200
                  Re: History of byte addressing Michael S <already5chosen@yahoo.com> - 2011-06-06 03:23 -0700
                    Re: History of byte addressing MitchAlsup <MitchAlsup@aol.com> - 2011-06-07 08:01 -0700
                  Re: alignment, was History of byte addressing John Levine <johnl@iecc.com> - 2011-06-06 18:33 +0000
                    Re: alignment, was History of byte addressing nmm1@cam.ac.uk - 2011-06-06 19:30 +0100
                      Re: alignment, was History of byte addressing Anne & Lynn Wheeler <lynn@garlic.com> - 2011-06-06 15:32 -0400
                Re: History of byte addressing Quadibloc <jsavard@ecn.ab.ca> - 2011-06-06 18:11 -0700
            Re: History of byte addressing Robert Myers <rbmyersusa@gmail.com> - 2011-06-06 06:48 -0700
              Re: History of byte addressing jsavard@excxn.aNOSPAMb.cdn.invalid (John Savard) - 2011-07-03 16:13 +0000
          Re: History of byte addressing Quadibloc <jsavard@ecn.ab.ca> - 2011-07-03 09:10 -0700
    Re: History of byte addressing "Skybuck Flying" <Windows7IsOK@DreamPC2006.com> - 2011-06-07 16:23 +0200
      Re: History of byte addressing Stephen Fuld <SFuld@alumni.cmu.edu.invalid> - 2011-06-07 08:26 -0700
    Re: History of byte addressing "Skybuck Flying" <Windows7IsOK@DreamPC2006.com> - 2011-06-07 16:25 +0200
      Re: History of byte addressing "Skybuck Flying" <Windows7IsOK@DreamPC2006.com> - 2011-06-07 16:45 +0200
        Re: History of byte addressing "Skybuck Flying" <Windows7IsOK@DreamPC2006.com> - 2011-06-07 16:48 +0200
        Re: History of byte addressing "Skybuck Flying" <Windows7IsOK@DreamPC2006.com> - 2011-06-07 16:59 +0200
          Re: History of byte addressing "Skybuck Flying" <Windows7IsOK@DreamPC2006.com> - 2011-06-07 17:05 +0200
    Re: History of byte addressing Quadibloc <jsavard@ecn.ab.ca> - 2011-06-18 15:43 -0700
    Re: History of byte addressing Quadibloc <jsavard@ecn.ab.ca> - 2011-07-04 03:14 -0700
      Re: History of byte addressing Quadibloc <jsavard@ecn.ab.ca> - 2011-07-04 03:40 -0700
        Re: History of byte addressing Quadibloc <jsavard@ecn.ab.ca> - 2011-07-04 04:28 -0700
          Re: History of byte addressing nmm1@cam.ac.uk - 2011-07-04 13:38 +0100
            Re: History of byte addressing Quadibloc <jsavard@ecn.ab.ca> - 2011-07-04 06:47 -0700
              Re: History of byte addressing nmm1@cam.ac.uk - 2011-07-04 14:16 +0100
          Re: History of byte addressing Bill Findlay <yaldnif.w@blueyonder.co.uk> - 2011-07-04 15:53 +0100
        Re: History of byte addressing Bill Findlay <yaldnif.w@blueyonder.co.uk> - 2011-07-04 15:36 +0100
          Re: History of byte addressing Quadibloc <jsavard@ecn.ab.ca> - 2011-07-04 07:50 -0700
            Re: History of byte addressing John Levine <johnl@iecc.com> - 2011-07-04 19:46 +0000
              Re: History of byte addressing Quadibloc <jsavard@ecn.ab.ca> - 2011-07-04 15:29 -0700
                Re: History of byte addressing Bill Findlay <yaldnif.w@blueyonder.co.uk> - 2011-07-05 00:02 +0100
        Re: History of byte addressing Bill Findlay <yaldnif.w@blueyonder.co.uk> - 2011-07-04 15:47 +0100
          Re: History of byte addressing Quadibloc <jsavard@ecn.ab.ca> - 2011-07-04 07:54 -0700

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#2012 — History of byte addressing

FromJohn Levine <johnl@iecc.com>
Date2011-06-02 19:36 +0000
SubjectHistory of byte addressing
Message-ID<is8ons$jiv$1@gal.iecc.com>
These days people think that it's practically a law of nature that computer
memory is composed of 8-bit bytes that can be addressed individually, or
in power-of-two groups up to whatever the machine's register size is.

Back in the heroic era (the 1950s), computers were either word
addressed, with kludges to extract smaller fields, or else by
character, usually with instructions to handle strings of characters,
but not to handle fixed sized groups of them.

The first machine I know of with modern byte addressing was the IBM
System/360.  Did they invent it, or did someone else do it first?
The 7030 Stretch had 64 bit words with a complicated addressing
architecture of word, halfword or bit, with variable sized bytes,
so the 360's addressing is more or less a simplified version of
Stretch.

Regards,
John Levine, johnl@iecc.com, Primary Perpetrator of "The Internet for Dummies",
Please consider the environment before reading this e-mail. http://jl.ly

PS: You don't have to tell me that there are still machines that
aren't byte addressed.  But these days they're all DSPs or embedded or
otherwise special purpose.

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#2013

Fromnmm1@cam.ac.uk
Date2011-06-02 20:38 +0100
Message-ID<is8orn$p0i$1@gosset.csi.cam.ac.uk>
In reply to#2012
In article <is8ons$jiv$1@gal.iecc.com>, John Levine  <johnl@iecc.com> wrote:
>
>These days people think that it's practically a law of nature that computer
>memory is composed of 8-bit bytes that can be addressed individually, or
>in power-of-two groups up to whatever the machine's register size is.
>
>Back in the heroic era (the 1950s), computers were either word
>addressed, with kludges to extract smaller fields, or else by
>character, usually with instructions to handle strings of characters,
>but not to handle fixed sized groups of them.
>
>The first machine I know of with modern byte addressing was the IBM
>System/360.  Did they invent it, or did someone else do it first?
>The 7030 Stretch had 64 bit words with a complicated addressing
>architecture of word, halfword or bit, with variable sized bytes,
>so the 360's addressing is more or less a simplified version of
>Stretch.

Hmm.  I think I can go earlier.  The earlier designs that I know
of tended to be able to address multiple sizes, according to type,
and address N referred to the aligned object number N.  If I recall,
the sizes on the first machine I used (a Mercury Meteor) were 12,
24 and 48, but I would not be surprised if the same thing had been
done for ones based on 8-bit smallest units.

That's not byte addressing in the modern sense, but I believe was
its predecessor.


Regards,
Nick Maclaren.

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#2024

FromQuadibloc <jsavard@ecn.ab.ca>
Date2011-06-03 08:05 -0700
Message-ID<a6f64bcd-deaa-4c65-ac40-16f5f581b46b@b42g2000yqi.googlegroups.com>
In reply to#2013
On Jun 2, 1:38 pm, n...@cam.ac.uk wrote:

> Hmm.  I think I can go earlier.  The earlier designs that I know
> of tended to be able to address multiple sizes, according to type,
> and address N referred to the aligned object number N.  If I recall,
> the sizes on the first machine I used (a Mercury Meteor) were 12,
> 24 and 48, but I would not be surprised if the same thing had been
> done for ones based on 8-bit smallest units.
>
> That's not byte addressing in the modern sense, but I believe was
> its predecessor.

This is interesting. I couldn't find any information on a Ferranti
Mercury Meteor computer. The Mercury Meteor was a car, and the
Ferranti Meteor was an airplane. The _original_ Ferranti Mercury
computer was a vacuum-tube machine which was one of the earliest
computers with a core memory.

In fact, it is perhaps the answer to a question I asked on USENET some
time ago - it had a very small core memory, consisting of 1,024
"words" of 10 bits each, with parity. The machine's actual word length
was 40 bits, and it normally only did floating-point arithmetic
(floating point additions were 180 microseconds), but it could do
index arithmetic in a single cycle of 60 microseconds.

The drum contained 4K words of 40 bits, so it was really the main
memory of the machine, with the small core memory - although data was
transferred between it and the drum manually - operating somewhat like
a cache so as to have the machine run at core memory speeds even
though the core memory wasn't really big enough, containing 256 words
of data, to contain reasonable amounts of program and data.

John Savard

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#2019

FromAlex McDonald <blog@rivadpm.com>
Date2011-06-03 05:26 -0700
Message-ID<c5816f6d-8ccb-4629-ad7f-84770c220a25@v31g2000vbs.googlegroups.com>
In reply to#2012
On Jun 2, 8:36 pm, John Levine <jo...@iecc.com> wrote:
> These days people think that it's practically a law of nature that computer
> memory is composed of 8-bit bytes that can be addressed individually, or
> in power-of-two groups up to whatever the machine's register size is.
>
> Back in the heroic era (the 1950s), computers were either word
> addressed, with kludges to extract smaller fields, or else by
> character, usually with instructions to handle strings of characters,
> but not to handle fixed sized groups of them.
>
> The first machine I know of with modern byte addressing was the IBM
> System/360.  Did they invent it, or did someone else do it first?
> The 7030 Stretch had 64 bit words with a complicated addressing
> architecture of word, halfword or bit, with variable sized bytes,
> so the 360's addressing is more or less a simplified version of
> Stretch.
>
> Regards,
> John Levine, jo...@iecc.com, Primary Perpetrator of "The Internet for Dummies",
> Please consider the environment before reading this e-mail.http://jl.ly
>
> PS: You don't have to tell me that there are still machines that
> aren't byte addressed.  But these days they're all DSPs or embedded or
> otherwise special purpose.

Perhaps (and I must admit to speculating here) BCD, EBCDIC and the
80column punch card played a part when used in column mode. Some early
IBM machines used row mode (1 row for two 36bit words, giving the 72
data columns that became just about a standard in column mode too),
but lots of punchholes per row or column gave the cards less than an
ideal stiffness.  I only vaguely remember machines with row mode
binary cards.

The commonly adopted maximum punch was 3 in a column, one in 3 of rows
12, 11, 0, one or two for 1-9 (the 8 or 9 was the 3rd punch) giving a
6bit BCD encoding. EBCDIC extended that to more holes/column with
backward compatibility with 6bit BCD (hence the discontinuous nature
of the A-Z encodings), but that was a later development (1977??) and
used 4 punches for the extended bits; 5 for some really obscure
encodings. I do remember that hand keypunches were difficult to use
beyond 3 punches per column.

Perhaps 8bits was the maximum encodable without causing backward
compatibility problems and having too many holes in a card? Perhaps.

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#2021

FromAnne & Lynn Wheeler <lynn@garlic.com>
Date2011-06-03 09:48 -0400
Message-ID<m3fwnrrpoa.fsf@garlic.com>
In reply to#2019
Alex McDonald <blog@rivadpm.com> writes:
> Perhaps (and I must admit to speculating here) BCD, EBCDIC and the
> 80column punch card played a part when used in column mode. Some early
> IBM machines used row mode (1 row for two 36bit words, giving the 72
> data columns that became just about a standard in column mode too),
> but lots of punchholes per row or column gave the cards less than an
> ideal stiffness.  I only vaguely remember machines with row mode
> binary cards.
>
> The commonly adopted maximum punch was 3 in a column, one in 3 of rows
> 12, 11, 0, one or two for 1-9 (the 8 or 9 was the 3rd punch) giving a
> 6bit BCD encoding. EBCDIC extended that to more holes/column with
> backward compatibility with 6bit BCD (hence the discontinuous nature
> of the A-Z encodings), but that was a later development (1977??) and
> used 4 punches for the extended bits; 5 for some really obscure
> encodings. I do remember that hand keypunches were difficult to use
> beyond 3 punches per column.
>
> Perhaps 8bits was the maximum encodable without causing backward
> compatibility problems and having too many holes in a card? Perhaps.

punch card 80 columns and 12 rows; 360 (announced 1964, with 8bit
"bytes" rather than 6bit "bytes) extended 6-bit BCD to (single) 8-bit
EBCDIC punch card encoding (eliminating column binary encoding).

my 1st programming job at univ. was porting 1401 MPIO (card->tape &
tape->printer/punch; where 1401 acted as front end for 709; that
normally ran tape->tape) to 360/30; the 360/30 had 1401 hardware
emulation mode (that would directly run MPIO) ... so it apparently was
univ. was just gettting familiarity with 360 as part of planned
transition to replace 709/1401 with 360/67. I got to design&implement my
own monitor, device drivers, interrupt handler, storage management,
error recovery, multitasking (concurrent card->tape while
tape->printer/punch), etc.

input cards could either be (6-bit) BCD or column binary. ... basically
"column binary" was two six-bit "bytes" per column rather than 6-bit
BCD.  I would read "BCD" ... if got an error (reader would generate
error if there were any columns with punch hole combinations not
valid/defined for BCD) reread as column binary ... before doing
feed-selectstacker. on 360, the two six-bit bytes would be stored in two
eight-bit bytes (80 column binary card would occupy 160bytes). bytes
would then be written to 7-track tape (6bit byte plus parity).
going tape->punch ... had to recognized whether to punch 80byte BCD or
160byte column binary.

i have done a Q&D conversion of IOS3270 "green card" to html
http://www.garlic.com/~lynn/gcard.html

lists for newer generation reader/punch I/O command codes, but mostly
same for old 360 2540 reader/punch
http://www.garlic.com/~lynn/gcard.html#23

read-only: 11D0F010  ; "D" =0 ebcdic, =1 "card image", aka column binary

and for (old) 7-track tape
http://www.garlic.com/~lynn/gcard.html#25

-- 
virtualization experience starting Jan1968, online at home since Mar1970

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#2023

FromQuadibloc <jsavard@ecn.ab.ca>
Date2011-06-03 07:49 -0700
Message-ID<51605612-2426-4fa8-9fa0-65510dad9004@d28g2000yqf.googlegroups.com>
In reply to#2012
On Jun 2, 1:36 pm, John Levine <jo...@iecc.com> wrote:

> The first machine I know of with modern byte addressing was the IBM
> System/360.  Did they invent it, or did someone else do it first?

That's a good question.

To paint a general picture of what computer architectures were like
before the 360, which no doubt you already know:

The very earliest machines with core memory tended to have a 40-bit
word. That just seemed like a good width for integer arithmetic.

Later, most machines processed 6-bit characters, because an uppercase-
only character set seemed fully adequate to what computers were used
for. Computers performed calculations on numbers, and a six-bit
character set was fully adequate for annotating the output. After all,
uppercase-only was good enough for punched-card machines.

Some computers could, and did, handle lowercase before the STRETCH
came along. But they used a six-bit code with a shift character...
because what they had as a terminal was a Flexowriter.

Some computers did have a 24-bit word length before the IBM 360 came
along. Such computers could have used character addresses. But that
would mean wasting _two whole bits_ of the address when fetching
words! So, as far as I know, computers built around a 24-bit word
weren't as wasteful as that.

There *were* computers that addressed memory as a series of 6-bit
characters. The IBM 705 and the IBM 1401 can be taken as examples of
that. But those computers had, in effect, a *word length* of 6 bits -
they were commercial computers, which then meant that numbers were
decimal and variable length, and usually directly composed of
printable characters. (This is also the way some early microcomputer
database packages worked in that they didn't support binary data types
- i.e. dBase II.)

There were scientific decimal computers in those days - the UNIVAC
LARC, the IBM NORC, the IBM 7074, the IBM 1620 - they used packed
decimal in a fixed word length. Like the binary computers, what they
addressed was words.

There might be instructions to assist fishing a single character out
of a word instead of resorting to masking and shifting, but addressing
was by the word if computers had words. That's because there weren't
address bits to waste in instruction words - another innovation in the
IBM 360 was base registers.

Some computers didn't include all the bits needed for an address to
refer to the entire maximum memory capacity of the computer in an
instruction. A common way to deal with this was what the PDP-8 did:
the PDP-4/7/9/15 architecture, the Honeywell 516 and 316, and the
Hewlett-Packard 2116 and its family also did this. There was a short
address in the word, with one bit that indicated whether the address
referenced page zero or the current page. So bits from the program
counter were just tacked on to the address - no time-consuming
addition, involving the need to carry, was performed unless it
absolutely had to be (i.e. indexed addressing, to access an array
element).

To allow programs to access data other than on the current page or
page zero, such machines normally also included indirect addressing -
even the tiny PDP-8 did so.

The IBM 360 was designed to combine operation like a typical
scientific computer, such as the IBM 7090, with operation like a
typical commercial computer, like the IBM 1401.

The 1401 used 7-bit characters, because each 6-bit data character had
an additional bit to indicate where variable-length numbers began and
ended. (I'm not claiming it was set on both the first and last digit.
It was set on one of them, I don't remember which and see no point in
looking it up.)

The IBM 705, on the other hand, did use pure 6-bit characters.

The IBM 7090 had a 36-bit word. Addressing words and characters with
six characters per word on a binary computer would be awkward.

However, IBM did make the AN/FSQ-31 and AN/FSQ-32 computers for the
military with a 48-bit word length. (They had a feature which allowed
a 48-bit word to be optionally treated as two 24-bit integers, on
which arithmetic was performed in parallel. This was the ancestor of
MMX!)

But it was decided that it would be more efficient to convert from
character data to packed decimal data. Adding the ability to use
lowercase would perhaps open the computer to new applications - people
were enjoying the ability to handle lowercase on the STRETCH,
presumably.

So I really think that the IBM 360 was first. Even if some obscure
computer preceded it, it was the IBM 360 that was the influential one,
making byte addressing *on a word-oriented machine* - character
addressing on commercial machines existed, as noted - possible. The
use of base registers meant that it was no big deal that an address
field referred to 1,024 words of 32-bits rather than 4,096 of them -
something other machines simply weren't designed around.

And the PDP-11 copied IBM's philosophy of byte addressing, and the
rest is history.

John Savard

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#2027

FromQuadibloc <jsavard@ecn.ab.ca>
Date2011-06-03 10:56 -0700
Message-ID<e549d319-ed7e-44b4-bcb4-cdd0c95196fe@35g2000prp.googlegroups.com>
In reply to#2023
On Jun 3, 8:49 am, Quadibloc <jsav...@ecn.ab.ca> wrote:

> However, IBM did make the AN/FSQ-31 and AN/FSQ-32 computers for the
> military with a 48-bit word length.

As I was trying to imply, but should have said explicitly, this meant
that a computer which used character addresses could have had a 48-bit
word which contained eight 6-bit characters, four 12-bit quarterwords,
and two 24-bit halfwords... just like the 360, only smaller.

But no one did that... the CDC 1604 did have a 48-bit word and 24-bit
instructions, but its addresses were still those of 48-bit words, not
those of 24-bit instructions.

However, this idea inspired me to find a new way to achieve a
relatively practical and simple computer design which could
efficiently handle floating-point numbers of the "ideal" 36-bit single-
precision length, the "all that is necessary" 60-bit double-precision
length, and the "just like a pocket calculator" 48-bit intermediate-
precision length...

http://www.quadibloc.com/arch/per03.htm

48-bit numbers are handled naturally; 36-bit and 60-bit ones are
handled by wasting only 1/16th of the memory... without the address
calculation being _too_ insanely complicated (as on the *previous*
page). But alignment is observed, and, as a bonus, standard 64-bit
wide memory parts (in sets of three, two of which have eight extra ECC
bits if ECC is desired) can be used for memory!

John Savard

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#2030

From"Andy \"Krazy\" Glew" <andy@SPAM.comp-arch.net>
Date2011-06-04 10:59 -0700
Message-ID<4DEA7297.7000800@SPAM.comp-arch.net>
In reply to#2012
On 6/2/2011 12:36 PM, John Levine wrote:
> These days people think that it's practically a law of nature that computer
> memory is composed of 8-bit bytes that can be addressed individually, or
> in power-of-two groups up to whatever the machine's register size is.
>
> Back in the heroic era (the 1950s), computers were either word
> addressed, with kludges to extract smaller fields, or else by
> character, usually with instructions to handle strings of characters,
> but not to handle fixed sized groups of them.
>
> The first machine I know of with modern byte addressing was the IBM
> System/360.  Did they invent it, or did someone else do it first?
> The 7030 Stretch had 64 bit words with a complicated addressing
> architecture of word, halfword or bit, with variable sized bytes,
> so the 360's addressing is more or less a simplified version of
> Stretch.
>
> Regards,
> John Levine, johnl@iecc.com, Primary Perpetrator of "The Internet for Dummies",
> Please consider the environment before reading this e-mail. http://jl.ly
>
> PS: You don't have to tell me that there are still machines that
> aren't byte addressed.  But these days they're all DSPs or embedded or
> otherwise special purpose.

I vaguely remember something in Blaauw and Brooks "Computer 
Architecture" talking about how several different families of computers 
all evolved, at different tiimes, to byte addressed, power of 2 sized.

Sorry - I briefly looked  for the quote in the book on my shelf, but I 
don't feel like going through the whole book.  I'm getting spoiled by 
electronically searchable books, it's tough to go back to paper.

Mentioning this because it may be relevant - B&B may have an example of 
what you want in their "zoo" of different computers.

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#2031

FromQuadibloc <jsavard@ecn.ab.ca>
Date2011-06-04 15:01 -0700
Message-ID<a0389f4a-d22f-49ee-8333-d1b36059255d@l26g2000yqm.googlegroups.com>
In reply to#2030
On Jun 4, 11:59 am, "Andy \"Krazy\" Glew" <a...@SPAM.comp-arch.net>
wrote:

> I vaguely remember something in Blaauw and Brooks "Computer
> Architecture" talking about how several different families of computers
> all evolved, at different tiimes, to byte addressed, power of 2 sized.

But the big question is whether there were any such computers before
the IBM 360, announced on April 7, 1964.

The Honeywell 116, for example, had a 16-bit word, but it used word
addresses, and the same is true of the early HP minis like the 2114.

*After* the 360, we encounter the PDP-11 and the HP 3000 and the Data
General Nova and the Interdata and the Microdata and the Nanodata and
the General Automation minis.

As I noted, the 360 didn't imitate any other computer - it didn't have
bit addressing like the STRETCH, so it didn't really need a pure power-
of-two design, and the architecture with its elegance largely came
about because of a decision to do arithmetic on packed decimal numbers
(and, thus, to have 8-bit characters) rather than directly on decimal
numbers in character form (which would have presumably led to a
computer which was an AN/FSQ-31 with the ability to do IBM 705/7080-
style arithmetic).

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#2032

Fromnmm1@cam.ac.uk
Date2011-06-04 22:53 +0100
Message-ID<ise9gd$dnj$1@gosset.csi.cam.ac.uk>
In reply to#2031
In article <a0389f4a-d22f-49ee-8333-d1b36059255d@l26g2000yqm.googlegroups.com>,
Quadibloc  <jsavard@ecn.ab.ca> wrote:
>On Jun 4, 11:59=A0am, "Andy \"Krazy\" Glew" <a...@SPAM.comp-arch.net>
>wrote:
>
>> I vaguely remember something in Blaauw and Brooks "Computer
>> Architecture" talking about how several different families of computers
>> all evolved, at different tiimes, to byte addressed, power of 2 sized.
>
>But the big question is whether there were any such computers before
>the IBM 360, announced on April 7, 1964.

Yes.  Though the remark makes me wonder how much evidence there
is that any of them did so other than to be similar to the then
dominating architecture.

Part of the confusion is because the dominance of the System/360
and /370 coincided with 24-bit addressing starting to run out of
headroom.  So anything based on that would have had to change,
and 32 bits was one obvious choice.

There were also issues with Fortran code that broke the type
rules, and did not work on architectures where the same address
considered as single and double precision did not refer to the
same location.  I believe that was a large reason that natural
size unit addressing went out of fashion.


Regards,
Nick Maclaren.

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#2039

FromQuadibloc <jsavard@ecn.ab.ca>
Date2011-06-05 10:40 -0700
Message-ID<c671df41-2b33-4843-b43b-35477fb646cd@x10g2000yqj.googlegroups.com>
In reply to#2032
On Jun 4, 3:53 pm, n...@cam.ac.uk wrote:

> There were also issues with Fortran code that broke the type
> rules, and did not work on architectures where the same address
> considered as single and double precision did not refer to the
> same location.  I believe that was a large reason that natural
> size unit addressing went out of fashion.

I wasn't aware that it was ever _in_ fashion.

Before the 360, computers used word addresses... but in conventional
computers, those addresses referred to one and only one size of word,
whether it was 18 bits or 36 bits or 24 bits or 12 bits. Double-
precision numbers got addressed by their first word (unless the
machine read them from the high address down, so on a very few
machines, the last word might be used - this was much more common in
addressing strings and decimal numbers on character machines).

And since the word size was the memory bus size, and if they built a
bigger computer, it would have a different instruction set, there
wouldn't be alignment restrictions.

John Savard

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#2034

FromJohn Levine <johnl@iecc.com>
Date2011-06-05 06:10 +0000
Message-ID<isf6kv$16uk$1@gal.iecc.com>
In reply to#2030
>I vaguely remember something in Blaauw and Brooks "Computer
>Architecture" talking about how several different families of
>computers all evolved, at different tiimes, to byte addressed, power
>of 2 sized.

I flipped through my copy and didn't find anything, but there's a lot
to flip through, since it's arranged by family rather than
chronologically.  It's in Google Books, so you can try some greppage
there.  They just show snippets but they give you the page numbers.  I
am currently 3000 miles away from my copy of the book, so I can't do
much now.  It does find a page where they say that Stretch was the first
8-bit byte machine.

I also looked through the two IBM history books by Pugh et al, and to the
extent they mention the addressing at all, they say it was invented for
the 360 as part of handling both word and character addressing.

R's,
John


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#2036

FromRobert Myers <rbmyersusa@gmail.com>
Date2011-06-05 10:00 -0700
Message-ID<752ee724-f894-4881-b4d3-033b72a7d7d3@u26g2000vby.googlegroups.com>
In reply to#2034
On Jun 5, 2:10 am, John Levine <jo...@iecc.com> wrote:

>
> I also looked through the two IBM history books by Pugh et al, and to the
> extent they mention the addressing at all, they say it was invented for
> the 360 as part of handling both word and character addressing.
>

My history of the subject:

Goodbye IBM == Goodbye incomprehensible alignment error messages.  I
suppose I should be grateful the arithmetic wasn't all decimal.

Robert.

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#2037

FromRobert Myers <rbmyersusa@gmail.com>
Date2011-06-05 10:04 -0700
Message-ID<248b8b45-50f6-4cd6-b98a-2b57629b3390@c26g2000vbq.googlegroups.com>
In reply to#2036
On Jun 5, 1:00 pm, Robert Myers <rbmyers...@gmail.com> wrote:
> On Jun 5, 2:10 am, John Levine <jo...@iecc.com> wrote:
>
>
>
> > I also looked through the two IBM history books by Pugh et al, and to the
> > extent they mention the addressing at all, they say it was invented for
> > the 360 as part of handling both word and character addressing.
>
> My history of the subject:
>
> Goodbye IBM == Goodbye incomprehensible alignment error messages.  I
> suppose I should be grateful the arithmetic wasn't all decimal.
>
And, in that long distant past when IT personnel were in short supply,
diverting so much energy into arguments about endian-ness could well
have cost the US the Cold War.

Robert.

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#2038

FromQuadibloc <jsavard@ecn.ab.ca>
Date2011-06-05 10:36 -0700
Message-ID<18608bba-ef46-4abb-9eed-d94089feb2ce@d28g2000yqf.googlegroups.com>
In reply to#2037
On Jun 5, 11:04 am, Robert Myers <rbmyers...@gmail.com> wrote:

> And, in that long distant past when IT personnel were in short supply,
> diverting so much energy into arguments about endian-ness could well
> have cost the US the Cold War.

But before the PDP-11 came along, the only time you had little-
endianness was on machines like the Honeywell 316, where it was only a
time-saving step for double-precision integers... never carried
through consistently.

Because being big-endian was the *obvious* right way to design a
computer - write the numbers in the computer's memory the same way you
see them on a piece of paper! So that people can program in assembly
language without going insane.

The idea that no one really has to program in assembler... well, C
wasn't invented yet.

John Savard

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#2041

From"Paul A. Clayton" <paaronclayton@gmail.com>
Date2011-06-05 11:00 -0700
Message-ID<42477501-047c-4e2e-9697-a6275ad39af3@s14g2000vbi.googlegroups.com>
In reply to#2038
On Jun 5, 1:36 pm, Quadibloc <jsav...@ecn.ab.ca> wrote:
[snip]
> Because being big-endian was the *obvious* right way to design a
> computer - write the numbers in the computer's memory the same way you
> see them on a piece of paper! So that people can program in assembly
> language without going insane.

While on the subject of endian choice, when and why was endian
nature of bits consistently made little-endian?

It seems to me that one would desire the endian nature of
'bytes' to be the same as that of bits, but bits are (at least
now) consistently little-endian while the byte-endian is
more diverse.

(I generally favor big-endian representation because the high
order bits are 'more significant'; but little-endian representation
certainly better fits variable-length addition and could provide
more frequent early out of equal comparison when the low order bits
are more variable--which I suspect is a common case.  It also seems
that string libraries could have benefited from endian awareness
for sorting--at least before unicode.)

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#2043

FromMorten Reistad <first@last.name>
Date2011-06-05 21:42 +0200
Message-ID<4debe460$3@news.broadpark.no>
In reply to#2041
In article <42477501-047c-4e2e-9697-a6275ad39af3@s14g2000vbi.googlegroups.com>,
Paul A. Clayton <paaronclayton@gmail.com> wrote:
>On Jun 5, 1:36 pm, Quadibloc <jsav...@ecn.ab.ca> wrote:
>[snip]
>> Because being big-endian was the *obvious* right way to design a
>> computer - write the numbers in the computer's memory the same way you
>> see them on a piece of paper! So that people can program in assembly
>> language without going insane.
>
>While on the subject of endian choice, when and why was endian
>nature of bits consistently made little-endian?

Wintel clinched it around 1992, when the killer micros took over
everywhere.

The 1980 had a bi-endian prologue. The mainframes were big endian, 
and so was Prime, Sun and initially MIPS. But the little endianness
kept creeping in; to MIPS (or SPIM), PDP11s and VAXen, and others. 

>It seems to me that one would desire the endian nature of
>'bytes' to be the same as that of bits, but bits are (at least
>now) consistently little-endian while the byte-endian is
>more diverse.
>
>(I generally favor big-endian representation because the high
>order bits are 'more significant'; but little-endian representation
>certainly better fits variable-length addition and could provide
>more frequent early out of equal comparison when the low order bits
>are more variable--which I suspect is a common case.  It also seems
>that string libraries could have benefited from endian awareness
>for sorting--at least before unicode.)

We probably have ended up little endian for good. One little, but
quite insignifican battle lost among a lot of gain.

-- mrr

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#2061

Fromanton@mips.complang.tuwien.ac.at (Anton Ertl)
Date2011-06-06 17:03 +0000
Message-ID<2011Jun6.190346@mips.complang.tuwien.ac.at>
In reply to#2043
Morten Reistad <first@last.name> writes:
>In article <42477501-047c-4e2e-9697-a6275ad39af3@s14g2000vbi.googlegroups.com>,
>Paul A. Clayton <paaronclayton@gmail.com> wrote:
>>While on the subject of endian choice, when and why was endian
>>nature of bits consistently made little-endian?

It wasn't.  IBM and Motorola still document the most significant bit
in PPC manuals as being bit 0.

Motorola was inconsistent in the 68000 (and probably in the 6800),
where byte 0 was most significant, but bit 0 was least significant.

They continued this in the 88000 architecture, and only switched to
the IBM way when they adopted IBM's Power architecture.

In many architectures this does not play a role, because they have no
instructions that deal with numbered bits, but AFAIK the 68k and 88k
have such instructions, and there this inconsistency can occasionally
be inconvenient.

>The 1980 had a bi-endian prologue. The mainframes were big endian, 
>and so was Prime, Sun and initially MIPS. But the little endianness
>kept creeping in; to MIPS (or SPIM), PDP11s and VAXen, and others. 

MIPS, like a number of other RISC CPUs, is bi-endian.  In most systems
(from MIPS and SGI), MIPS is used as a big-endian CPU; in systems from
DEC, it was used as little-endian CPU.  Not sure what is used in the
typical NAS boxes and routers that contain MIPS CPUs today, but if I
had to guess, I would go for big-endian.

Back to history: you completely forgot about the successful micros
before the 1980 (in addition to those before 1985, like the 68000):
8080 and Z80 are little-endian, and so is the 6502.  The latter case
is interesting, because it was a descendent of the big-endian 6800
(which got much less mindshare than the 6502, the heart of the Apple
IIs, Commodore, Atari, and Acorn home computers).

- anton
-- 
M. Anton Ertl                    Some things have to be seen to be believed
anton@mips.complang.tuwien.ac.at Most things have to be believed to be seen
http://www.complang.tuwien.ac.at/anton/home.html

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#2068

FromAndrew Reilly <areilly---@bigpond.net.au>
Date2011-06-06 23:55 +0000
Message-ID<9557n9Fvb0U1@mid.individual.net>
In reply to#2061
On Mon, 06 Jun 2011 17:03:46 +0000, Anton Ertl wrote:

> Motorola was inconsistent in the 68000 (and probably in the 6800), where
> byte 0 was most significant, but bit 0 was least significant.

The Motorola 56000 (1986 or so) numbers the bits in registers and as 
accessed by the various instructions that do so (sensibly IMO) according 
to their mathematical significance.  Address endianness doesn't arise 
because there are no sequential-address load store operations.  (It is a 
word addressed processor.)  I've coded byte-packing of strings on it both 
ways, and vaguely remember little-endian being slightly simpler/more 
efficient.

I've never found the "easier for human assembly language programmers to 
read" argument to be particularly convincing, but then I cut my 
programming teath on a Z80, reading 16-bit values "backwards" in hex 
dumps.  Of course any time a number is *intended* to be read as a number, 
a program makes it appear however you want it.  Not having the 
mathematical bit significance correlation with bit-address extend neatly 
into byte/word addresses (in big-endian machines) has always seemed 
broken to me, from an aesthetic perspective, but I don't recall it ever 
actually getting in the way of anything.

Cheers,

-- 
Andrew

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#2072

FromQuadibloc <jsavard@ecn.ab.ca>
Date2011-06-06 18:26 -0700
Message-ID<20bf77ea-7979-4b44-bd2d-91c8dda50a1b@s9g2000yqm.googlegroups.com>
In reply to#2068
On Jun 6, 5:55 pm, Andrew Reilly <areilly...@bigpond.net.au> wrote:
> Not having the
> mathematical bit significance correlation with bit-address extend neatly
> into byte/word addresses (in big-endian machines) has always seemed
> broken to me, from an aesthetic perspective, but I don't recall it ever
> actually getting in the way of anything.

If one's idea of a "beginner's introduction to computers" would be a
book that uses assembly language on the IBM 1401 or the IBM 705 as a
way to illustrate how it is that a mere machine can do calculations...
*then* being big-endian makes a lot of sense.

Because there you would see illustrations with the name of "JOE
PROGRAMMER" and his salary "125050" written character by character in
little boxes. And, naturally, 125050 stands for $1250.50, not some
other amount.

Thus, the idea is that the memory of a computer is a lot of little
cells, into each of which one printable character is written. And a
string of digits is something the computer can perform arithmetic
on... *directly* - at least in the case of those old IBM business-
oriented computers.

And then _advanced_ concepts like computers using *packed* decimal or
even (shudder) binary can get introduced, once the mind-frame that
accepts the idea of a computer has been established.

But trying to explain a *little-endian* computer... now, that would
just be _too_ confusing, because now it breaks the paradigm of
"writing text and numbers in the computer's memory, like you would on
a piece of paper", instead of just bending it - "the computer uses
shorthand for numbers, and counts with sixteen fingers".

Unless, of course, you are a native speaker of Hebrew or Arabic. In
that case, it's little-endian computing that is natural.

John Savard

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