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Processor ISAs

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  Processor ISAs "Bill Cunningham" <billcun-remove-@suddenlink.net> - 2016-03-24 13:58 -0500
    Re: Processor ISAs "Alexei A. Frounze" <alexfrunews@gmail.com> - 2016-03-24 13:50 -0700
      Re: Processor ISAs "Bill Cunningham" <billcun-remove-@suddenlink.net> - 2016-03-24 17:31 -0500
    Re: Processor ISAs Rod Pemberton <NoHaveNotOne@bcczxcfre.cmm> - 2016-03-24 19:17 -0400
    Re: Processor ISAs "Benjamin David Lunt" <zfysz@fysnet.net> - 2016-03-24 17:50 -0700
      Re: Processor ISAs "Bill Cunningham" <billcun-remove-@suddenlink.net> - 2016-03-25 13:21 -0500
    Re: Processor ISAs "wolfgang kern" <nowhere@never.at> - 2016-03-25 08:24 +0100
      Re: Processor ISAs Herbert Kleebauer <klee@unibwm.de> - 2016-03-25 12:43 +0100
    Re: Processor ISAs Lucretia <laguest9000@googlemail.com> - 2016-03-28 06:45 -0700
      Re: Processor ISAs Lucretia <laguest9000@googlemail.com> - 2016-03-28 06:54 -0700
        Re: Processor ISAs "wolfgang kern" <nowhere@never.at> - 2016-03-28 22:40 +0200
          Re: Processor ISAs Lucretia <laguest9000@googlemail.com> - 2016-03-29 13:00 -0700
            Re: Processor ISAs "wolfgang kern" <nowhere@never.at> - 2016-03-30 11:17 +0200
        Re: Processor ISAs James Harris <james.harris.1@gmail.com> - 2016-04-01 10:15 +0100
          Re: Processor ISAs "wolfgang kern" <nowhere@never.at> - 2016-04-01 13:16 +0200
            Re: Processor ISAs James Harris <james.harris.1@gmail.com> - 2016-04-01 22:48 +0100
              OT: processor binary- or pin-compatibility, was [Re: Processor ISAs] Rod Pemberton <NoHaveNotOne@bcczxcfre.cmm> - 2016-04-01 21:22 -0400
                Re: OT: processor binary- or pin-compatibility, was [Re: Processor ISAs] Rod Pemberton <NoHaveNotOne@bcczxcfre.cmm> - 2016-04-01 21:26 -0400
                Re: OT: processor binary- or pin-compatibility, was [Re: Processor ISAs] Bob Eager <news0006@eager.cx> - 2016-04-02 08:46 +0000
                  Re: OT: processor binary- or pin-compatibility, was [Re: Processor Bogus@Embarq.com (Steve) - 2016-04-03 12:31 +0000
                    Re: OT: processor binary- or pin-compatibility, was [Re: Processor Morten Reistad <first@last.name.invalid> - 2016-04-03 14:44 +0200
                    Re: OT: processor binary- or pin-compatibility, was [Re: Processor Bob Eager <news0006@eager.cx> - 2016-04-03 18:53 +0000
                      Re: OT: processor binary- or pin-compatibility, was [Re: Processor Bogus@Embarq.com (Steve) - 2016-04-03 20:07 +0000
                        Re: OT: processor binary- or pin-compatibility, was [Re: Processor Bob Eager <news0006@eager.cx> - 2016-04-03 21:18 +0000
                          Re: OT: processor binary- or pin-compatibility, was [Re: Processor "J. Clarke" <j.clarke.873638@gmail.com> - 2016-04-03 20:20 -0400
                      Re: OT: processor binary- or pin-compatibility, was [Re: Processor "J. Clarke" <j.clarke.873638@gmail.com> - 2016-04-03 20:17 -0400
                      Re: OT: processor binary- or pin-compatibility, was [Re: Processor pechter@pechter.dyndns.org (William Pechter) - 2016-04-04 15:53 +0000
                Re: processor binary- or pin-compatibility, was [Re: Processor ISAs] "Charles Richmond" <numerist@aquaporin4.com> - 2016-04-04 17:24 -0500
                  Re: processor binary- or pin-compatibility, was [Re: Processor ISAs] Bob Eager <news0006@eager.cx> - 2016-04-04 23:08 +0000
                  Re: processor binary- or pin-compatibility, was [Re: Processor ISAs] Bogus@Embarq.com (Steve) - 2016-04-05 17:43 +0000
                    Re: processor binary- or pin-compatibility, was [Re: Processor ISAs] Ahem A Rivet's Shot <steveo@eircom.net> - 2016-04-05 19:15 +0100
              Re: Processor ISAs "wolfgang kern" <nowhere@never.at> - 2016-04-02 10:59 +0200

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#9306 — Processor ISAs

    Would anyone happen to know which would have the simplest ISA? I don't 
right off. Say old DEC stuff. Processors and Intel 8 bit architectures? And 
of course the Z80. If various bit sizes of DEC processors had simple 
instruction sets. Similar to RISIC. Maybe they would be more powerful land 
less to learn.

Bill

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#9307

On Thursday, March 24, 2016 at 10:58:23 AM UTC-7, Bill Cunningham wrote:
> Would anyone happen to know which would have the simplest ISA? I don't 
> right off. Say old DEC stuff. Processors and Intel 8 bit architectures? And 
> of course the Z80. If various bit sizes of DEC processors had simple 
> instruction sets. Similar to RISIC. Maybe they would be more powerful land 
> less to learn.
> 
> Bill

Take a look at MIPS. It is very regular and quite programmer friendly.
There are plenty materials on it online as it's an architecture often
chosen for teaching (not to mention, a MIPS chip is likely to be
inside your router or car). There are MIPS emulators that can be used
as a teaching/learning aid.
While 8/16-bit CPUs are simple in principle, they aren't very programmer
friendly because you need to construct, say, 32-bit operations out of
8-bit ones and most of operations involve the accumulator register
necessitating you to move things around so the accumulator is available.
They also typically lack multiplication and division (and floating point)
and have some other quirks.

Alex

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#9308

"Alexei A. Frounze" <alexfrunews@gmail.com> wrote in message 
news:d51c9a09-d063-4517-9c1a-d84f6d4f801b@googlegroups.com...
> On Thursday, March 24, 2016 at 10:58:23 AM UTC-7, Bill Cunningham wrote:
>> Would anyone happen to know which would have the simplest ISA? I don't
>> right off. Say old DEC stuff. Processors and Intel 8 bit architectures? 
>> And
>> of course the Z80. If various bit sizes of DEC processors had simple
>> instruction sets. Similar to RISIC. Maybe they would be more powerful 
>> land
>> less to learn.
>>
>> Bill
>
> Take a look at MIPS. It is very regular and quite programmer friendly.
> There are plenty materials on it online as it's an architecture often
> chosen for teaching (not to mention, a MIPS chip is likely to be
> inside your router or car). There are MIPS emulators that can be used
> as a teaching/learning aid.
> While 8/16-bit CPUs are simple in principle, they aren't very programmer
> friendly because you need to construct, say, 32-bit operations out of
> 8-bit ones and most of operations involve the accumulator register
> necessitating you to move things around so the accumulator is available.
> They also typically lack multiplication and division (and floating point)
> and have some other quirks.

    OK thanks much Alex. Teaching is the key. I have heard of the term MIPS 
but never checked into it. I have been looking at Z80 instructions and they 
seem simple. EAX and RAX, forget it :)

Bill

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#9309

On Thu, 24 Mar 2016 13:58:19 -0500
"Bill Cunningham" <billcun-remove-@suddenlink.net> wrote:

>     Would anyone happen to know which would have the simplest ISA?
> I don't right off. Say old DEC stuff. Processors and Intel 8 bit
> architectures? And of course the Z80. If various bit sizes of DEC
> processors had simple instruction sets. Similar to RISC. Maybe they
> would be more powerful land less to learn.

Your post might also be a post for comp.arch or alt.folklore.computers.
comp.arch will discuss the architecture design, and a.f.c. will discuss
anything related to old computers, most likely the instruction sets
in this case and stories from the past.

The 68000 was used for teaching programming in schools throughout
the 1990's.  It's 32-bit.  IIRC, it doesn't have an MMU like the
later 68040 or a modern 80x86, and IIRC the instruction set is
orthogonal.  It was used in the second generation home PC's, such
as Amiga 1000, Atari STs, and earlier Macintoshes.  You can look
it and all other microprocessors up on Wikipedia or Google.

I "cut my teeth" on the 6510 (6502 variant) in the Commodore C64
in the 1980's.  I picked up the general purpose 80x86 instructions
of the 80486 and later rather easily in the early 2000's, but they
were originally designed in the 1970's too.  So, there was not much
difference in terms of basic operations.

I also learned some Z80 in magazines, also way back in the 1980's.
Today, I don't recall the Z80 instructions other than it seemed
simple, like the 6502.  The Z80 was great for projects because it
didn't need additional circuitry to drive the DRAM chips of the
era.  So, it was widely written about and used for hobby projects,
much like the Parallax Stamp a decade ago, or the Raspberry Pi or
Arduino today.

The basic 6502 instructions are easy, but the 6502 is somewhat of a
load-store architecture and only has a few registers.  It has many
memory addressing modes for each instruction to compensate for the
lack of registers, i.e., mostly memory use. You'll need a copy of the
manual for the chart with the memory modes to keep them straight.
It has only one accumulator, meaning you're restricted to do most
math through that register.  It uses zero page (low 256 bytes) as a
temporary register file or small stack.  I.e., it's constrained,
but simple.

The basic general purpose instructions of the 8086 through 80486
and later are similar in functionality to the 6502, but you have
eight general purpose registers, all of which can do general integer
arithmetic.  So, it's more orthogonal.  Still, there are some
instructions which only work with specific registers, being CISC.
The 16-bit instruction set has a bunch of limited memory addressing
modes, and other limitations, like early 8-bit processors.  The
32-bit instruction set is much more orthogonal and uniform, but
it not as clean as a RISC design.

I never programmed the DEC's in assembly, but only used C.
I only used a Timex Sinclair 1000 once at a friend's house.


Rod Pemberton

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#9310

"Bill Cunningham" <billcun-remove-@suddenlink.net> wrote in message 
news:nd19lt$3h5$1@dont-email.me...
>    Would anyone happen to know which would have the simplest ISA? I don't 
> right off. Say old DEC stuff. Processors and Intel 8 bit architectures? 
> And of course the Z80. If various bit sizes of DEC processors had simple 
> instruction sets. Similar to RISIC. Maybe they would be more powerful land 
> less to learn.

Hi Bill, everyone.

May I asked what your reasoning is?

Are you wanting to program smaller devices? Make your own devices?
Do you want to stay with the assembly language for that processor,
or can you use C?

I have only programmed, low level, for the x86 and ATTINY stuff.
However, very little low level for the ATTINY since you can use
the C language to program for it.

I have made USB devices via the ATTINY.
  http://www.fysnet.net/attiny2313.htm

Their name does say something though, they are tiny.  Not much
RAM or ROM for that matter.

I just wanted to ask what you had in mind.  Maybe someone could
be a little more specific with an answer if you let us know what
you had in mind.

Just asking.  Thanks,
Ben

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#9313

"Benjamin David Lunt" <zfysz@fysnet.net> wrote in message 
news:nd2237$ldo$1@gioia.aioe.org...

> Hi Bill, everyone.
>
> May I asked what your reasoning is?
>
> Are you wanting to program smaller devices? Make your own devices?
> Do you want to stay with the assembly language for that processor,
> or can you use C?
>
> I have only programmed, low level, for the x86 and ATTINY stuff.
> However, very little low level for the ATTINY since you can use
> the C language to program for it.
>
> I have made USB devices via the ATTINY.
>  http://www.fysnet.net/attiny2313.htm
>
> Their name does say something though, they are tiny.  Not much
> RAM or ROM for that matter.
>
> I just wanted to ask what you had in mind.  Maybe someone could
> be a little more specific with an answer if you let us know what
> you had in mind.

    Well I kind of like the DOS API in the software intterupts in the x85s. 
You know Ralph's interrupt list. I know a little C. I wouldn't say I could 
program in it. As programming has to do with knowing how to use the language 
to accomplish certain things. For example pcap_fndalldevs() in the libpcap 
library I find as somewhat difficult because you have to know in C how to 
setup a list. If I was doing this all the time, no problem. If I was looking 
at a HLL it would be C. With use it would come. In booting, as compressed 
low level code as possible is needed.

Bill

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#9311

Bill Cunningham asked:

> Would anyone happen to know which would have the simplest ISA? 
> I don't right off. Say old DEC stuff. Processors and Intel 8 bit 
> architectures? And of course the Z80. If various bit sizes of DEC 
> processors had simple instruction sets. Similar to RISIC. 
> Maybe they would be more powerful land less to learn.
 
Less to learn about what ? 

If you mean to learn about assembler languages and their syntax 
from one simpler CPU/MCU and later use your gained knowledge on 
your x86 PC or on any game-console, you might find youself lost 
in the wild.

Every CPU-family (even family-members) got its own register-set 
with different names and apart instruction-sets.
Assembler tools usually support only 'one' family-syntax.

A few cross-assemblers may be around, but they often use other 
languages than any of the origin.

Z-80 isn't the easiest to start with (many instructions).
6502 not much instructions, but pre- and post-index addressing.
1802 was funny, even it had no IP nor SP ...
6800 ... 68hc11  Motorola is an apart story anyway.
2650 had the smallest instructions set I found on 8-bit MCUs. 

__
wolfgang 

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#9312

On 25.03.2016 08:24, wolfgang kern wrote:

> 2650 had the smallest instructions set I found on 8-bit MCUs. 

Here a 16 bit CPU implemented with 65 FlipFlops and about 250 gates.
It has only 3 instructions and no register set:


1.2 Register
To minimize the hardware, there is only a 15 bit program counter (PC) and a 1 bit flag (F). No
other user accessible registers exist. After a reset PC and F are initialized to 0.


1.3 Instructions
MPROZ supports three instructions:

br	adr
+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
|1|         adr                 |  Load adr into PC if F=0
+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+  Clear F


add	adr1,adr2
+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
|0|         adr 1               | Add the contents of memory location adr1 and the contents of
+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ memory location adr2 and store the result in memory location adr2.
|0|         adr 2               | Store the carry of the addition in F.
+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+


nor	adr1,adr2
+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
|0|         adr 1               | Calculate the NOR function of the contents of memory location adr1
+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ and the contents of memory location adr2 and store the result in
|1|         adr 2               | memory location adr2. F=1 if result =0 , else F=0.
+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+


1.4 Interrupt
Because there is no instruction to set or reset the interrupt enable flag (ie), this is done by accessing
memory location $4000. A read from $4000 enables interrupts (ie=1) and a write to $4000 disables
interrupts (ie=0). An external interrupt request (IRQ~) must be asserted until the interrupt is
serviced by MPROZ. The interrupt is serviced by MPROZ, when the interrupt enable flag is set and
a branch instruction with F=0 is executed. Thereby it is not necessary to save the program counter
(PC) and the flag (F), but it is sufficient to save the interrupted branch instruction. This instruction
is saved at the memory location which address is stored in memory location 1 (this normally should
be address $4000, because then the ie flag is automatically cleared, when the instruction is saved).
The execution of the interrupt program starts at address 2. The return from interrupt is done by a
branch to $4000, which also automatically sets the ie flag.

http://www.bitlib.de/pub/mproz/mproz_e.pdf

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#9316

On Thursday, 24 March 2016 17:58:23 UTC, Bill Cunningham  wrote:
> Would anyone happen to know which would have the simplest ISA? I don't 
> right off. Say old DEC stuff. Processors and Intel 8 bit architectures? And 
> of course the Z80. If various bit sizes of DEC processors had simple 
> instruction sets. Similar to RISIC. Maybe they would be more powerful land 
> less to learn.
> 
> Bill

M68k and MIPS definitely. Both are easy to program in. MIPS was extended to 64 bit nicely as well. ARM is the modern day x86 equivalent in complexity, imo.

Luke.

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#9317

On Monday, 28 March 2016 14:45:56 UTC+1, Lucretia  wrote:

> M68k and MIPS definitely. Both are easy to program in. MIPS was extended to 64 bit nicely as well. ARM is the modern day x86 equivalent in complexity, imo.

Anothing about MIPS is that it's easy to load a value into a register, as it's a load/store architecture, you load the upper half and then the lower half. In ARM, you have to use an assembler pseudo instruction which is composed of many 8 bit loads with barrel shifts and all other operations built in like rotate, very strange.

You could look at RISC-V which is being developed by the same people who invented MIPS so will be a good design as well.

As for Z80, it was designed to be binary compatible with 8086 so can run CP/M binaries meant for that processor.

Luke.

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#9318

Lucretia wrote:

[...]

|As for Z80, it was designed to be binary compatible with 8086 so can run 
|CP/M binaries meant for that processor.

This statement could easy mislead a poor newbie.

I wrote many machine code for Z-80/-280, 8080/85/86++ and other.
And I know for sure: Intel and Zilog got really nothing in common.

But NSC800 and Z80 are ~95% code compatible.

__
wolfgang 

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#9329

On Monday, 28 March 2016 21:40:45 UTC+1, wolfgang kern  wrote:
> Lucretia wrote:
> 
> [...]
> 
> |As for Z80, it was designed to be binary compatible with 8086 so can run 
> |CP/M binaries meant for that processor.
> 
> This statement could easy mislead a poor newbie.
> 
> I wrote many machine code for Z-80/-280, 8080/85/86++ and other.
> And I know for sure: Intel and Zilog got really nothing in common.
> 
> But NSC800 and Z80 are ~95% code compatible.

I didn't say they were similar. I said they were "binary compatible" different assembly languages.

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#9331

Lucretia wrote:
 
>>>As for Z80, it was designed to be binary compatible with 8086 so can 
>>>run CP/M binaries meant for that processor.
 
>>This statement could easy mislead a poor newbie.
 
>>I wrote many machine code for Z-80/-280, 8080/85/86++ and other.
>>And I know for sure: Intel and Zilog got really nothing in common.
 
>>But NSC800 and Z80 are ~95% code compatible.
 
> I didn't say they were similar. I said they were "binary compatible" 
> different assembly languages.

Not sure what you mean here. The only common things between this two 
are 16-bit address and 8/16-bit data, but opcodes, instructions and 
register-set along with interrupts and I/O are totally different.

Z-80 code would never work on any Intel nor in the other direction.
__
wolfgang 

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#9350

On 28/03/2016 14:54, Lucretia wrote:

...

> As for Z80, it was designed to be binary compatible with 8086 so can run CP/M binaries meant for that processor.

Do you mean the Z80 was compatible with the 8080 (not the 8086)?

-- 
James

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#9354

James Harris wrote:

> Lucretia wrote:
> ...
>> As for Z80, it was designed to be binary compatible with 8086 so can run 
>> CP/M binaries meant for that processor.

> Do you mean the Z80 was compatible with the 8080 (not the 8086)?

they aren't compatible either...

It was rumored that the 8080 designer team fell apart when Intels
decision for 8085 didn't satisfy all members and so a few fellows
started Z-80 with Zilog. (no evidence, just a rumour)
Me too took the better choice and built my first machines with Z-80.
__
wolfgang 

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#9361

On 01/04/2016 12:16, wolfgang kern wrote:
>
> James Harris wrote:
>
>> Lucretia wrote:
>> ...
>>> As for Z80, it was designed to be binary compatible with 8086 so can
>>> run CP/M binaries meant for that processor.
>
>> Do you mean the Z80 was compatible with the 8080 (not the 8086)?
>
> they aren't compatible either...

I wrote from memory. But Wikipedia seems to agree:

Faggin designed the instruction set to be binary compatible with the 
Intel 8080[6][7] so that most 8080 code, notably the CP/M operating 
system and Intel's PL/M compiler for 8080 (as well as its generated 
code), would run unmodified on the new Z80 CPU.

https://en.wikipedia.org/wiki/Zilog_Z80

-- 
James

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#9369 — OT: processor binary- or pin-compatibility, was [Re: Processor ISAs]

On Fri, 1 Apr 2016 22:48:32 +0100
James Harris <james.harris.1@gmail.com> wrote:

> On 01/04/2016 12:16, wolfgang kern wrote:
> > James Harris wrote:

> > [Z80 binary compatibility]

The issue of processor pin-compatibility versus
binary-compatibility comes up from time to time
on alt.os.development.

I decided to post a basic list for reference:

NEC V20 - pin compatible with 8088
NEC V30 - pin compatible with 8086
Cyrix Cx486 series - pin compatible with 80386
W65C802 - pin compatible with 65C02
6501 - pin compatible with 6800
68010 - pin compatible with 68010

NEC V20 - binary compatible with 80186
Z80 - binary compatible with 8080
8008 - binary compatible with 2200
KL5C8400 - binary compatible with Z80


Rod Pemberton

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#9371 — Re: OT: processor binary- or pin-compatibility, was [Re: Processor ISAs]

On Fri, 1 Apr 2016 21:22:31 -0400
Rod Pemberton <NoHaveNotOne@bcczxcfre.cmm> wrote:

> On Fri, 1 Apr 2016 22:48:32 +0100
> James Harris <james.harris.1@gmail.com> wrote:
> 
> > On 01/04/2016 12:16, wolfgang kern wrote:  
> > > James Harris wrote:  
> 
> > > [Z80 binary compatibility]  

> The issue of processor pin-compatibility versus
> binary-compatibility comes up from time to time
> on alt.os.development.
> 
> I decided to post a basic list for reference:
> 
> NEC V20 - pin compatible with 8088
> NEC V30 - pin compatible with 8086
> Cyrix Cx486 series - pin compatible with 80386
> W65C802 - pin compatible with 65C02
> 6501 - pin compatible with 6800
> 68010 - pin compatible with 68010

Correction:
68010 - pin compatible with 68000

> NEC V20 - binary compatible with 80186
> Z80 - binary compatible with 8080
> 8008 - binary compatible with 2200
> KL5C8400 - binary compatible with Z80
> 

Rod Pemberton

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#9373 — Re: OT: processor binary- or pin-compatibility, was [Re: Processor ISAs]

On Fri, 01 Apr 2016 21:22:31 -0400, Rod Pemberton wrote:

> NEC V20 - binary compatible with 80186

That sort of depends on whether you limit yourself to the instruction 
set. The 80186 had a very different software interface to (e.g.) the 
interrupt controller.

-- 
Using UNIX since v6 (1975)...

Use the BIG mirror service in the UK:
 http://www.mirrorservice.org

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#9385 — Re: OT: processor binary- or pin-compatibility, was [Re: Processor

Hi,

Bob Eager <news0006@eager.cx> writes:
>On Fri, 01 Apr 2016 21:22:31 -0400, Rod Pemberton wrote:
>
>> NEC V20 - binary compatible with 80186
>
>That sort of depends on whether you limit yourself to the instruction 
>set. The 80186 had a very different software interface to (e.g.) the 
>interrupt controller.

   According to "The Undocumented PC", the V20 did not support
undocumented 80186 opcodes.  It also had a mode where it
supported 8080 binary code.

Regards,

Steve N.

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