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| Message-ID | <4F38875A.2050407@SPAM.comp-arch.net> (permalink) |
|---|---|
| Date | 2012-02-12 19:45 -0800 |
| From | "Andy (Super) Glew" <andy@SPAM.comp-arch.net> |
| Organization | comp-arch.net |
| Newsgroups | comp.arch |
| Subject | Re: Single Thread Performance |
| References | (2 earlier) <cc21bb69-16bf-4692-a8b4-7244bdc87a94@vd8g2000pbc.googlegroups.com> <jh3uqm$c2$1@gosset.csi.cam.ac.uk> <jh3veo$ojd$1@adenine.netfront.net> <18985540.1742.1328921030856.JavaMail.geo-discussion-forums@yqks7> <jwvk43r259i.fsf-monnier+comp.arch@gnu.org> |
On 2/12/2012 6:50 PM, Stefan Monnier wrote: >> Transactional Memory is an attempt to get around the inability >> of ATOMIC events to make forward progress in the face of contention. > > Another perspective is that atomicity is a higher-level concept than > locks, which might lead to fewer bugs. IOW it is hoped that more > programmers are able to use correctly atomicity than locks. Also, it is > easier to automatically check that all shared objects are accessed > atomically rather than checking that the locks are used correctly. > > Whether it's sufficiently better (and whether it can be made to perform) > is still up for debate, of course, > > > Stefan What I don't like is that current hardware transactional memory doesn't scale, in the presence of both large footprints (large amounts of memory involved in the transaction), and in the presence of conflicts. Most HW TM that I am aware of - including the cache protocol I designed for it, which may or may not be related to what Ravi is now using - relies on snooping. E.g. if the transaction is too big too big to fit in the L1 cache, the transaction will never finish as a transaction. Or L2, or L3. Or even smaller data structures, before the cache. Worse, if there is thrashing in the ways, of a typically 4 way associative L1$, TM loses. I.e. the transaction will abort. Or a 16 way L2. Or ... I.e. a transaction may work as a transaction when running single threaded. But it may abort forever if running multithreaded thrashes the cache just a wee bit. So, you have to code a non-TM mechanism as a fallback. Probably using locks. -- Perhaps a nice aspect will be that transactions can act as a bug detector for locking. If you have a mutex, and the transaction always fails, then that tells you that probably not everyone is respecting the locks. (Or that the mutx is too big for the transaction.) -- What would a scalable implementation of hardware TM look like? Well, it can't depend on finite size caches, except as an accelerator. How about a log? Log all of the memory accesses in the transaction, possibly filtered and coalesced to reduce size. In the transaction commit phase, "lock" the lines in memory affected. This would require a directory - which might be scalable if there was a lock bit per line. (Which is one of the Holy Grails of computer architecture.) Once locked, commit. Possibly with a "was the value I read still there" approach to validation. Exercise for the reader in how to make this locking not prevent other transactions from going forward. And using the caches to filter as much work as possible - e.g. if it fits in the cache, don't use the log.
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Single Thread Performance "Unspecified" <partha@perfectvips.com> - 2012-02-04 21:54 +0530
Re: Single Thread Performance Brett Davis <ggtgp@yahoo.com> - 2012-02-06 05:55 -0600
Re: Single Thread Performance nmm1@cam.ac.uk - 2012-02-06 13:06 +0000
Re: Single Thread Performance Robert Myers <rbmyersusa@gmail.com> - 2012-02-06 14:12 -0500
Re: Single Thread Performance BGB <cr88192@hotmail.com> - 2012-02-06 13:36 -0700
Re: Single Thread Performance nmm1@cam.ac.uk - 2012-02-06 20:47 +0000
Re: Single Thread Performance BGB <cr88192@hotmail.com> - 2012-02-06 15:07 -0700
Re: Single Thread Performance Brett Davis <ggtgp@yahoo.com> - 2012-02-06 16:32 -0600
Re: Single Thread Performance Robert Wessel <robertwessel2@yahoo.com> - 2012-02-06 17:45 -0600
Re: Single Thread Performance Brett Davis <ggtgp@yahoo.com> - 2012-02-07 06:01 -0600
Re: Single Thread Performance BGB <cr88192@hotmail.com> - 2012-02-07 13:32 -0700
Re: Single Thread Performance timcaffrey@aol.com (Tim McCaffrey) - 2012-02-09 19:08 +0000
Re: Single Thread Performance BGB <cr88192@hotmail.com> - 2012-02-10 08:56 -0700
Re: Single Thread Performance nmm1@cam.ac.uk - 2012-02-06 20:42 +0000
Re: Single Thread Performance Robert Myers <rbmyersusa@gmail.com> - 2012-02-06 19:36 -0500
Re: Single Thread Performance "Andy (Super) Glew" <andy@SPAM.comp-arch.net> - 2012-02-06 18:28 -0800
Re: Single Thread Performance Robert Myers <rbmyersusa@gmail.com> - 2012-02-06 22:23 -0500
Re: Single Thread Performance nmm1@cam.ac.uk - 2012-02-07 06:52 +0000
Re: Single Thread Performance MitchAlsup <MitchAlsup@aol.com> - 2012-02-06 12:10 -0800
Re: Single Thread Performance Thomas Womack <twomack@chiark.greenend.org.uk> - 2012-02-07 10:13 +0000
Re: Single Thread Performance Brett Davis <ggtgp@yahoo.com> - 2012-02-20 23:58 -0600
Re: Single Thread Performance timcaffrey@aol.com (Tim McCaffrey) - 2012-02-07 17:33 +0000
Re: Single Thread Performance nedbrek <nedbrek@yahoo.com> - 2012-02-15 08:10 -0500
Re: Single Thread Performance Robert Myers <rbmyersusa@gmail.com> - 2012-02-06 14:17 -0500
Re: Single Thread Performance del cecchi <delcecchi@gmail.com> - 2012-02-25 22:07 -0800
Re: Single Thread Performance jgk@panix.com (Joe keane) - 2012-02-07 17:57 +0000
Re: Single Thread Performance Quadibloc <jsavard@ecn.ab.ca> - 2012-02-05 13:13 -0800
Re: Single Thread Performance MitchAlsup <MitchAlsup@aol.com> - 2012-02-05 21:35 -0800
Re: Single Thread Performance timcaffrey@aol.com (Tim McCaffrey) - 2012-02-07 17:38 +0000
Re: Single Thread Performance Stephen Sprunk <stephen@sprunk.org> - 2012-02-07 14:54 -0600
Re: Single Thread Performance timcaffrey@aol.com (Tim McCaffrey) - 2012-02-07 21:33 +0000
Re: Single Thread Performance Stephen Sprunk <stephen@sprunk.org> - 2012-02-07 23:13 -0600
Re: Single Thread Performance timcaffrey@aol.com (Tim McCaffrey) - 2012-02-08 18:54 +0000
Re: Single Thread Performance Stephen Sprunk <stephen@sprunk.org> - 2012-02-08 15:17 -0600
Re: Single Thread Performance Terje Mathisen <"terje.mathisen at tmsw.no"> - 2012-02-09 08:13 +0100
Re: Single Thread Performance timcaffrey@aol.com (Tim McCaffrey) - 2012-02-09 17:08 +0000
Re: Single Thread Performance Stephen Sprunk <stephen@sprunk.org> - 2012-02-09 16:01 -0600
Re: Single Thread Performance Terje Mathisen <"terje.mathisen at tmsw.no"> - 2012-02-09 07:56 +0100
Re: Single Thread Performance timcaffrey@aol.com (Tim McCaffrey) - 2012-02-09 17:18 +0000
Re: Single Thread Performance Terje Mathisen <"terje.mathisen at tmsw.no"> - 2012-02-08 10:17 +0100
Re: Single Thread Performance Jon <jon@beniston.com> - 2012-02-08 05:32 -0800
Re: Single Thread Performance MitchAlsup <MitchAlsup@aol.com> - 2012-02-07 16:00 -0800
Re: Single Thread Performance timcaffrey@aol.com (Tim McCaffrey) - 2012-02-08 18:35 +0000
Re: Single Thread Performance Partha <parthaspanda22@gmail.com> - 2012-02-10 11:32 -0800
Re: Single Thread Performance nmm1@cam.ac.uk - 2012-02-10 20:31 +0000
Re: Single Thread Performance "Unspecified" <partha@perfectvips.com> - 2012-02-11 02:12 +0530
Re: Single Thread Performance nmm1@cam.ac.uk - 2012-02-10 21:04 +0000
Re: Single Thread Performance MitchAlsup <MitchAlsup@aol.com> - 2012-02-10 16:43 -0800
Re: Single Thread Performance "Andy (Super) Glew" <andy@SPAM.comp-arch.net> - 2012-02-10 19:48 -0800
Re: Single Thread Performance EricP <ThatWouldBeTelling@thevillage.com> - 2012-02-12 14:31 -0500
Re: Single Thread Performance Stefan Monnier <monnier@iro.umontreal.ca> - 2012-02-12 21:50 -0500
Re: Single Thread Performance "Andy (Super) Glew" <andy@SPAM.comp-arch.net> - 2012-02-12 19:45 -0800
Re: Single Thread Performance MitchAlsup <MitchAlsup@aol.com> - 2012-02-12 20:36 -0800
Re: Single Thread Performance "Andy (Super) Glew" <andy@SPAM.comp-arch.net> - 2012-02-13 06:46 -0800
Re: Single Thread Performance MitchAlsup <MitchAlsup@aol.com> - 2012-02-13 08:58 -0800
Re: Single Thread Performance "Paul A. Clayton" <paaronclayton@gmail.com> - 2012-02-13 16:19 -0800
Re: Single Thread Performance Rick Jones <rick.jones2@hp.com> - 2012-02-14 03:55 +0000
Re: Single Thread Performance Terje Mathisen <"terje.mathisen at tmsw.no"> - 2012-02-14 10:30 +0100
Re: Single Thread Performance Andrew Reilly <areilly---@bigpond.net.au> - 2012-02-14 10:49 +0000
Re: Single Thread Performance Terje Mathisen <"terje.mathisen at tmsw.no"> - 2012-02-14 13:21 +0100
Re: Single Thread Performance Stephen Fuld <SFuld@alumni.cmu.edu.invalid> - 2012-02-14 13:11 -0800
Re: Single Thread Performance MitchAlsup <MitchAlsup@aol.com> - 2012-02-14 09:29 -0800
Re: Single Thread Performance EricP <ThatWouldBeTelling@thevillage.com> - 2012-02-14 12:40 -0500
Re: Single Thread Performance EricP <ThatWouldBeTelling@thevillage.com> - 2012-02-14 16:12 -0500
Re: Single Thread Performance Rick Jones <rick.jones2@hp.com> - 2012-02-14 21:14 +0000
Re: Single Thread Performance Rick Jones <rick.jones2@hp.com> - 2012-02-14 21:16 +0000
Re: Single Thread Performance Rick Jones <rick.jones2@hp.com> - 2012-02-14 21:09 +0000
Re: Single Thread Performance MitchAlsup <MitchAlsup@aol.com> - 2012-02-14 09:26 -0800
Re: Single Thread Performance Terje Mathisen <"terje.mathisen at tmsw.no"> - 2012-02-15 08:44 +0100
Re: Single Thread Performance "Andy (Super) Glew" <andy@SPAM.comp-arch.net> - 2012-02-15 01:07 -0800
Re: Single Thread Performance Terje Mathisen <"terje.mathisen at tmsw.no"> - 2012-02-14 10:16 +0100
Re: Single Thread Performance Michael S <already5chosen@yahoo.com> - 2012-02-08 01:04 -0800
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