Re: [PATCH RFC 3/5] Add KSZ8795 switch driver

From	Andrew Lunn <andrew@lunn.ch>
Newsgroups	linux.kernel
Subject	Re: [PATCH RFC 3/5] Add KSZ8795 switch driver
Date	2017-09-29 22:50 +0200
Message-ID	<uvaop-2Gx-9@gated-at.bofh.it> (permalink)
References	(4 earlier) <uuZCF-4gp-13@gated-at.bofh.it> <uv2qS-642-15@gated-at.bofh.it> <uv8cX-1ku-5@gated-at.bofh.it> <uv8FX-1v8-7@gated-at.bofh.it> <uv8Zk-1R9-5@gated-at.bofh.it>
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On Fri, Sep 29, 2017 at 07:19:17PM +0000, Tristram.Ha@microchip.com wrote:
> > > My concern is if a task is already running with SPI access to a lot
> > > of registers like reading the 32 MIB counters in every port of the
> > > switch, another register access has to wait until they are finished.
> > 
> > Why does it have to wait? Looking at the code in
> > ksz_get_ethtool_stats(), you don't take any mutex which will prevent
> > others from using the SPI bus. All there is is a mutex which prevents
> > two sets of ksz_get_ethtool_stats() at the same time.
> > 
> > So a PTP read could happen in parallel, and will not be blocked by MIB
> > reads. They should get interleaved access to the SPI bus.
> > 
> 
> The MIB counters are read in the background.  For multiple CPU cores 2
> tasks may run in the same time allowing SPI access one after another.
> For single core I am not sure an SPI access like coming from an interrupt
> routine can jump ahead from one in a background task.

The SPI subsystem has a mutex per controller. When starting a
transfer, it takes the mutex and release it once the transfer has
completed. There is also a reschedule point at the end of a
transfer. So even on your single core CPU, there can be multi tasking
going on.

      Andrew

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Re: [PATCH RFC 3/5] Add KSZ8795 switch driver Andrew Lunn <andrew@lunn.ch> - 2017-09-28 21:40 +0200
  RE: [PATCH RFC 3/5] Add KSZ8795 switch driver David Laight <David.Laight@ACULAB.COM> - 2017-09-29 11:20 +0200
    Re: [PATCH RFC 3/5] Add KSZ8795 switch driver Andrew Lunn <andrew@lunn.ch> - 2017-09-29 14:20 +0200
      RE: [PATCH RFC 3/5] Add KSZ8795 switch driver <Tristram.Ha@microchip.com> - 2017-09-29 20:30 +0200
        Re: [PATCH RFC 3/5] Add KSZ8795 switch driver Andrew Lunn <andrew@lunn.ch> - 2017-09-29 21:00 +0200
          RE: [PATCH RFC 3/5] Add KSZ8795 switch driver <Tristram.Ha@microchip.com> - 2017-09-29 21:20 +0200
            Re: [PATCH RFC 3/5] Add KSZ8795 switch driver Andrew Lunn <andrew@lunn.ch> - 2017-09-29 22:50 +0200

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