Groups > linux.kernel > #1742004

RE: [PATCH RFC 3/5] Add KSZ8795 switch driver

From	David Laight <David.Laight@ACULAB.COM>
Newsgroups	linux.kernel
Subject	RE: [PATCH RFC 3/5] Add KSZ8795 switch driver
Date	2017-09-29 11:20 +0200
Message-ID	<uuZCF-4gp-13@gated-at.bofh.it> (permalink)
References	<uncnp-5CP-51@gated-at.bofh.it> <undCO-6jj-13@gated-at.bofh.it> <uraQ1-2OE-1@gated-at.bofh.it> <uuMP8-4CX-17@gated-at.bofh.it>
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From: Andrew Lunn
> Sent: 28 September 2017 20:34
...
> > There are 34 counters.  In normal case using generic bus I/O or PCI to read them
> > is very quick, but the switch is mostly accessed using SPI, or even I2C.  As the SPI
> > access is very slow.
> 
> How slow is it? The Marvell switches all use MDIO. It is probably a
> bit faster than I2C, but it is a lot slower than MMIO or PCI.
> 
> ethtool -S lan0 takes about 25ms.

Is the SPI access software bit-banged?
Doing that with software delays isn't friendly to the rest of the system.
(Hardware guys please note...)

One possibility is to rate-limit the stats reading.
Then an application cannot completely 'hog' the SPI bandwidth.

	David

Thread

Re: [PATCH RFC 3/5] Add KSZ8795 switch driver Andrew Lunn <andrew@lunn.ch> - 2017-09-28 21:40 +0200
  RE: [PATCH RFC 3/5] Add KSZ8795 switch driver David Laight <David.Laight@ACULAB.COM> - 2017-09-29 11:20 +0200
    Re: [PATCH RFC 3/5] Add KSZ8795 switch driver Andrew Lunn <andrew@lunn.ch> - 2017-09-29 14:20 +0200
      RE: [PATCH RFC 3/5] Add KSZ8795 switch driver <Tristram.Ha@microchip.com> - 2017-09-29 20:30 +0200
        Re: [PATCH RFC 3/5] Add KSZ8795 switch driver Andrew Lunn <andrew@lunn.ch> - 2017-09-29 21:00 +0200
          RE: [PATCH RFC 3/5] Add KSZ8795 switch driver <Tristram.Ha@microchip.com> - 2017-09-29 21:20 +0200
            Re: [PATCH RFC 3/5] Add KSZ8795 switch driver Andrew Lunn <andrew@lunn.ch> - 2017-09-29 22:50 +0200

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