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Groups > linux.kernel > #1515032
| From | "Andrejczuk, Grzegorz" <grzegorz.andrejczuk@intel.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | RE: [PATCH v8: 1/4] x86/msr: Add MSR_MISC_FEATURE_ENABLES and PHIR3MWAIT bit |
| Date | 2016-11-04 07:50 +0100 |
| Message-ID | <szGu5-6zz-13@gated-at.bofh.it> (permalink) |
| References | <syEkF-7nA-3@gated-at.bofh.it> <syEkF-7nA-1@gated-at.bofh.it> <sztGy-6N2-13@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
>>On Tue, 1 Nov 2016, Grzegorz Andrejczuk wrote: >> >> +/* Intel Xeon Phi x200 ring 3 MONITOR/MWAIT */ > >Oh well. I asked you to make that whole PHI thing go away. > >This is a feature which has nothing to do with PHI. It just happens to be implemented on PHI. The FEATURES_ENABLES MSR is not at all PHI specific. > >It's all about a feature which enables ring 3 mwait/monitor. This bit enables ring 3 MONITOR/MWAIT only on Xeon Phi. It is reserved for other architectures. I think this will be confusing when I remove PHI. >> +#define MSR_MISC_FEATURE_ENABLES 0x00000140 >> +#define MSR_MISC_FEATURE_ENABLES_PHIR3MWAIT_BIT 1 >> +#define MSR_MISC_FEATURE_ENABLES_PHIR3MWAIT (1ULL << MSR_MISC_FEATURE_ENABLES_PHIR3MWAIT_BIT) >> + > >You really try hard to get your crap behind me. Stop sending out half baken shit every other day without addressing my review comments. > >Your trust level approaches negative space. > >Thanks, > > tglx Regards, Grzegorz
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[PATCH v8: 1/4] x86/msr: Add MSR_MISC_FEATURE_ENABLES and PHIR3MWAIT bit Grzegorz Andrejczuk <grzegorz.andrejczuk@intel.com> - 2016-11-01 11:20 +0100
Re: [PATCH v8: 1/4] x86/msr: Add MSR_MISC_FEATURE_ENABLES and PHIR3MWAIT bit Borislav Petkov <bp@suse.de> - 2016-11-03 16:00 +0100
Re: [PATCH v8: 1/4] x86/msr: Add MSR_MISC_FEATURE_ENABLES and PHIR3MWAIT bit Thomas Gleixner <tglx@linutronix.de> - 2016-11-03 18:10 +0100
RE: [PATCH v8: 1/4] x86/msr: Add MSR_MISC_FEATURE_ENABLES and PHIR3MWAIT bit "Andrejczuk, Grzegorz" <grzegorz.andrejczuk@intel.com> - 2016-11-04 07:50 +0100
RE: [PATCH v8: 1/4] x86/msr: Add MSR_MISC_FEATURE_ENABLES and PHIR3MWAIT bit Thomas Gleixner <tglx@linutronix.de> - 2016-11-07 22:00 +0100
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