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Groups > linux.kernel > #1481014

[PATCH 12/15] x86/mce, EDAC/mce_amd: Print MCA_SYND and MCA_IPID during MCE on SMCA systems

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From: Yazen Ghannam <Yazen.Ghannam@amd.com>

The MCA_SYND and MCA_IPID registers contain valuable information and
should be included in MCE output. The MCA_SYND register contains
syndrome and other error information, and the MCA_IPID register will
uniquely identify the MCA bank's type without having to rely on system
software.

Signed-off-by: Yazen Ghannam <Yazen.Ghannam@amd.com>
Cc: Aravind Gopalakrishnan <aravindksg.lkml@gmail.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: linux-edac <linux-edac@vger.kernel.org>
Cc: x86-ml <x86@kernel.org>
Link: http://lkml.kernel.org/r/1472680624-34221-2-git-send-email-Yazen.Ghannam@amd.com
Signed-off-by: Borislav Petkov <bp@suse.de>
---
 arch/x86/kernel/cpu/mcheck/mce.c | 7 +++++++
 drivers/edac/mce_amd.c           | 2 ++
 2 files changed, 9 insertions(+)

diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 84cb9b5859e2..ae1f47772d4f 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -292,6 +292,13 @@ static void print_mce(struct mce *m)
 	if (m->misc)
 		pr_cont("MISC %llx ", m->misc);
 
+	if (mce_flags.smca) {
+		if (m->synd)
+			pr_cont("SYND %llx ", m->synd);
+		if (m->ipid)
+			pr_cont("IPID %llx ", m->ipid);
+	}
+
 	pr_cont("\n");
 	/*
 	 * Note this output is parsed by external tools and old fields
diff --git a/drivers/edac/mce_amd.c b/drivers/edac/mce_amd.c
index 99b3bf3f4182..e8855a4f92d9 100644
--- a/drivers/edac/mce_amd.c
+++ b/drivers/edac/mce_amd.c
@@ -984,6 +984,8 @@ int amd_decode_mce(struct notifier_block *nb, unsigned long val, void *data)
 		if (m->status & MCI_STATUS_SYNDV)
 			pr_cont(", Syndrome: 0x%016llx", m->synd);
 
+		pr_cont(", IPID: 0x%016llx", m->ipid);
+
 		pr_cont("\n");
 
 		decode_smca_errors(m);
-- 
2.10.0

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[PATCH 00/15] x86/RAS queue for 4.9 Borislav Petkov <bp@alien8.de> - 2016-09-12 10:00 +0200
  [PATCH 13/15] x86/mce/AMD: Extract the error address on SMCA systems Borislav Petkov <bp@alien8.de> - 2016-09-12 10:10 +0200
  [PATCH 15/15] x86/RAS/mce_amd_inj: Fix some W= warnings Borislav Petkov <bp@alien8.de> - 2016-09-12 10:10 +0200
    [tip:ras/core] x86/RAS/mce_amd_inj: Fix some W= warnings tip-bot for Borislav Petkov <tipbot@zytor.com> - 2016-09-13 15:40 +0200
  [PATCH 04/15] x86/RAS: Add syndrome support to mce_amd_inj Borislav Petkov <bp@alien8.de> - 2016-09-12 10:10 +0200
  [PATCH 09/15] x86/mce/AMD: Update sysfs bank names for SMCA systems Borislav Petkov <bp@alien8.de> - 2016-09-12 10:10 +0200
  [PATCH 07/15] EDAC/mce_amd: Use SMCA prefix for error descriptions arrays Borislav Petkov <bp@alien8.de> - 2016-09-12 10:10 +0200
  [PATCH 10/15] x86/mce/AMD: Ensure the deferred error interrupt is of type APIC on SMCA systems Borislav Petkov <bp@alien8.de> - 2016-09-12 10:10 +0200
  [PATCH 01/15] x86/mce/AMD: Use msr_ops.misc() in allocate_threshold_blocks() Borislav Petkov <bp@alien8.de> - 2016-09-12 10:10 +0200
  [PATCH 06/15] EDAC/mce_amd: Add missing SMCA error descriptions Borislav Petkov <bp@alien8.de> - 2016-09-12 10:10 +0200
  [PATCH 11/15] x86/mce/AMD: Save MCA_IPID in MCE struct on SMCA systems Borislav Petkov <bp@alien8.de> - 2016-09-12 10:10 +0200
  [PATCH 03/15] EDAC/mce_amd: Print syndrome register value on SMCA systems Borislav Petkov <bp@alien8.de> - 2016-09-12 10:10 +0200
  [PATCH 14/15] x86/MCE/AMD, EDAC: Handle reserved bank 4 on Fam17h properly Borislav Petkov <bp@alien8.de> - 2016-09-12 10:10 +0200
  [PATCH 12/15] x86/mce, EDAC/mce_amd: Print MCA_SYND and MCA_IPID during MCE on SMCA systems Borislav Petkov <bp@alien8.de> - 2016-09-12 10:10 +0200
  [PATCH 05/15] x86/mce/AMD: Read MSRs on the CPU allocating the threshold blocks Borislav Petkov <bp@alien8.de> - 2016-09-12 10:10 +0200
  [PATCH 02/15] x86/mce: Add support for new MCA_SYND register Borislav Petkov <bp@alien8.de> - 2016-09-12 10:10 +0200
  [PATCH 08/15] x86/mce/AMD, EDAC/mce_amd: Define and use tables for known SMCA IP types Borislav Petkov <bp@alien8.de> - 2016-09-12 10:10 +0200

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