[PATCH 01/15] x86/mce/AMD: Use msr_ops.misc() in allocate_threshold_blocks()

From	Borislav Petkov <bp@alien8.de>
Newsgroups	linux.kernel
Subject	[PATCH 01/15] x86/mce/AMD: Use msr_ops.misc() in allocate_threshold_blocks()
Date	2016-09-12 10:10 +0200
Message-ID	<sguts-Fd-9@gated-at.bofh.it> (permalink)
References	<sgujL-mJ-11@gated-at.bofh.it>
Organization	linux.* mail to news gateway

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From: Yazen Ghannam <Yazen.Ghannam@amd.com>

Change MSR_IA32_MCx_MISC() macro to msr_ops.misc() because SMCA machines
define a different set of MSRs and msr_ops will give you the correct
MISC register.

Signed-off-by: Yazen Ghannam <Yazen.Ghannam@amd.com>
Cc: Aravind Gopalakrishnan <aravindksg.lkml@gmail.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: linux-edac <linux-edac@vger.kernel.org>
Cc: x86-ml <x86@kernel.org>
Link: http://lkml.kernel.org/r/1468269447-8808-1-git-send-email-Yazen.Ghannam@amd.com
Signed-off-by: Borislav Petkov <bp@suse.de>
---
 arch/x86/kernel/cpu/mcheck/mce_amd.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c
index 7b7f3be783d4..78b7681f7f66 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_amd.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c
@@ -869,7 +869,7 @@ static int threshold_create_bank(unsigned int cpu, unsigned int bank)
 		}
 	}
 
-	err = allocate_threshold_blocks(cpu, bank, 0, MSR_IA32_MCx_MISC(bank));
+	err = allocate_threshold_blocks(cpu, bank, 0, msr_ops.misc(bank));
 	if (!err)
 		goto out;
 
-- 
2.10.0

Thread

[PATCH 00/15] x86/RAS queue for 4.9 Borislav Petkov <bp@alien8.de> - 2016-09-12 10:00 +0200
  [PATCH 13/15] x86/mce/AMD: Extract the error address on SMCA systems Borislav Petkov <bp@alien8.de> - 2016-09-12 10:10 +0200
  [PATCH 15/15] x86/RAS/mce_amd_inj: Fix some W= warnings Borislav Petkov <bp@alien8.de> - 2016-09-12 10:10 +0200
    [tip:ras/core] x86/RAS/mce_amd_inj: Fix some W= warnings tip-bot for Borislav Petkov <tipbot@zytor.com> - 2016-09-13 15:40 +0200
  [PATCH 04/15] x86/RAS: Add syndrome support to mce_amd_inj Borislav Petkov <bp@alien8.de> - 2016-09-12 10:10 +0200
  [PATCH 09/15] x86/mce/AMD: Update sysfs bank names for SMCA systems Borislav Petkov <bp@alien8.de> - 2016-09-12 10:10 +0200
  [PATCH 07/15] EDAC/mce_amd: Use SMCA prefix for error descriptions arrays Borislav Petkov <bp@alien8.de> - 2016-09-12 10:10 +0200
  [PATCH 10/15] x86/mce/AMD: Ensure the deferred error interrupt is of type APIC on SMCA systems Borislav Petkov <bp@alien8.de> - 2016-09-12 10:10 +0200
  [PATCH 01/15] x86/mce/AMD: Use msr_ops.misc() in allocate_threshold_blocks() Borislav Petkov <bp@alien8.de> - 2016-09-12 10:10 +0200
  [PATCH 06/15] EDAC/mce_amd: Add missing SMCA error descriptions Borislav Petkov <bp@alien8.de> - 2016-09-12 10:10 +0200
  [PATCH 11/15] x86/mce/AMD: Save MCA_IPID in MCE struct on SMCA systems Borislav Petkov <bp@alien8.de> - 2016-09-12 10:10 +0200
  [PATCH 03/15] EDAC/mce_amd: Print syndrome register value on SMCA systems Borislav Petkov <bp@alien8.de> - 2016-09-12 10:10 +0200
  [PATCH 14/15] x86/MCE/AMD, EDAC: Handle reserved bank 4 on Fam17h properly Borislav Petkov <bp@alien8.de> - 2016-09-12 10:10 +0200
  [PATCH 12/15] x86/mce, EDAC/mce_amd: Print MCA_SYND and MCA_IPID during MCE on SMCA systems Borislav Petkov <bp@alien8.de> - 2016-09-12 10:10 +0200
  [PATCH 05/15] x86/mce/AMD: Read MSRs on the CPU allocating the threshold blocks Borislav Petkov <bp@alien8.de> - 2016-09-12 10:10 +0200
  [PATCH 02/15] x86/mce: Add support for new MCA_SYND register Borislav Petkov <bp@alien8.de> - 2016-09-12 10:10 +0200
  [PATCH 08/15] x86/mce/AMD, EDAC/mce_amd: Define and use tables for known SMCA IP types Borislav Petkov <bp@alien8.de> - 2016-09-12 10:10 +0200

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