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Groups > linux.kernel > #1474259
| From | Javier Martinez Canillas <javier@osg.samsung.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH 2/2] ARM: dts: exynos: Fix mismatched values of SD drive strengh configuration on exynos4415 |
| Date | 2016-09-01 12:30 +0200 |
| Message-ID | <scxpU-vd-35@gated-at.bofh.it> (permalink) |
| References | <scvHr-78u-9@gated-at.bofh.it> <scvHr-78u-7@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
Hello Krzysztof,
On 09/01/2016 10:37 AM, Krzysztof Kozlowski wrote:
> The pinctrl drive strength register on exynos4415 is 2-bit wide for each
> pin. The pins for SD2 were configured with value of 4. The driver does
> not validate the value so this overflow effectively set a bit 1 in
> adjacent pins thus configuring them to drive strength 2x.
>
> The author's intention was probably to set drive strength of 4x.
> All other SD pins are configured with drive strength of 4x. Fix these
> with same pattern.
>
> Fixes: 9246e7ff24c5 ("ARM: dts: Add dts files for exynos4415 SoC")
> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
> ---
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Best regards,
--
Javier Martinez Canillas
Open Source Group
Samsung Research America
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[PATCH 2/2] ARM: dts: exynos: Fix mismatched values of SD drive strengh configuration on exynos4415 Krzysztof Kozlowski <k.kozlowski@samsung.com> - 2016-09-01 10:40 +0200 Re: [PATCH 2/2] ARM: dts: exynos: Fix mismatched values of SD drive strengh configuration on exynos4415 Javier Martinez Canillas <javier@osg.samsung.com> - 2016-09-01 12:30 +0200 Re: [PATCH 2/2] ARM: dts: exynos: Fix mismatched values of SD drive strengh configuration on exynos4415 Krzysztof Kozlowski <k.kozlowski@samsung.com> - 2016-09-01 13:30 +0200 Re: [PATCH 2/2] ARM: dts: exynos: Fix mismatched values of SD drive strengh configuration on exynos4415 Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> - 2016-09-01 13:30 +0200
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