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Groups > comp.lang.c++ > #67888
| From | Vir Campestris <vir.campestris@invalid.invalid> |
|---|---|
| Newsgroups | comp.lang.c++ |
| Subject | Re: "volatile" on variables and current processors |
| Date | 2019-08-22 21:39 +0100 |
| Organization | A noiseless patient Spider |
| Message-ID | <qjmuht$1fi$3@dont-email.me> (permalink) |
| References | (1 earlier) <qjf7bo$ori$1@redfloyd.dont-email.me> <qjf7dm$ori$2@redfloyd.dont-email.me> <qjfbr4$l1t$1@gioia.aioe.org> <qjhmsv$3jk$3@dont-email.me> <Ok_6F.87933$6H5.69171@fx45.iad> |
On 20/08/2019 23:18, Scott Lurndal wrote: > On ARM, the behavior will depend on the memory type. It should work fine > when accessing device memory (e.g. device command/status registers, PCIe > ECAM space, etc). > I've already checked and passed a bunch of those. > For Normal, Sharable, Cacheable memory the weak (relative to x86) memory > model will cause problems even if you qualify your accesses with the volatile > qualifier (in a highly out-of-order pipeline, other accesses may pass the > volatile access or vice versa, so you need a load/store with ordering > semantics). This is the kind of thing I need. Looks like I should worry about the code - it's a 3rd party lump, and it was written in C without atomics. I'll speak to the people who pulled it in next time I'm in their country. Thanks Paavo, Chris & David. Andy -- BTW the first machine I ever worked on professionally didn't do cache snooping. Cache coherency was a manual process. Which meant that 2 processors were more than twice as fast as one on some workloads!
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"volatile" on variables and current processors Vir Campestris <vir.campestris@invalid.invalid> - 2019-08-19 21:56 +0100
Re: "volatile" on variables and current processors red floyd <dont.bother@its.invalid> - 2019-08-19 15:20 -0700
Re: "volatile" on variables and current processors red floyd <dont.bother@its.invalid> - 2019-08-19 15:21 -0700
Re: "volatile" on variables and current processors "Chris M. Thomasson" <chris.m.thomasson.1@gmail.com> - 2019-08-19 16:37 -0700
Re: "volatile" on variables and current processors Vir Campestris <vir.campestris@invalid.invalid> - 2019-08-20 21:58 +0100
Re: "volatile" on variables and current processors scott@slp53.sl.home (Scott Lurndal) - 2019-08-20 22:18 +0000
Re: "volatile" on variables and current processors Vir Campestris <vir.campestris@invalid.invalid> - 2019-08-22 21:39 +0100
Re: "volatile" on variables and current processors Paavo Helde <myfirstname@osa.pri.ee> - 2019-08-21 09:02 +0300
Re: "volatile" on variables and current processors "Chris M. Thomasson" <chris.m.thomasson.1@gmail.com> - 2019-08-20 23:10 -0700
Re: "volatile" on variables and current processors David Brown <david.brown@hesbynett.no> - 2019-08-21 08:34 +0200
Re: "volatile" on variables and current processors Chris Vine <chris@cvine--nospam--.freeserve.co.uk> - 2019-08-21 20:39 +0100
Re: "volatile" on variables and current processors Chris Vine <chris@cvine--nospam--.freeserve.co.uk> - 2019-08-21 21:02 +0100
Re: "volatile" on variables and current processors David Brown <david.brown@hesbynett.no> - 2019-08-22 13:30 +0200
Re: "volatile" on variables and current processors Bonita Montero <Bonita.Montero@gmail.com> - 2019-08-21 08:43 +0200
Re: "volatile" on variables and current processors "Alf P. Steinbach" <alf.p.steinbach+usenet@gmail.com> - 2019-08-20 02:22 +0200
Re: "volatile" on variables and current processors David Brown <david.brown@hesbynett.no> - 2019-08-20 10:05 +0200
Re: "volatile" on variables and current processors Keith Thompson <kst-u@mib.org> - 2019-08-19 17:08 -0700
Re: "volatile" on variables and current processors Bonita Montero <Bonita.Montero@gmail.com> - 2019-08-20 06:08 +0200
Re: "volatile" on variables and current processors David Brown <david.brown@hesbynett.no> - 2019-08-20 10:14 +0200
Re: "volatile" on variables and current processors Juha Nieminen <nospam@thanks.invalid> - 2019-08-20 13:03 +0000
Re: "volatile" on variables and current processors David Brown <david.brown@hesbynett.no> - 2019-08-20 16:18 +0200
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