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Groups > linux.kernel > #1305172
| From | Andy Gross <andy.gross@linaro.org> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH] arm64: dts: Add L2 cache node to msm8916 |
| Date | 2016-01-09 05:50 +0100 |
| Message-ID | <qOTDs-nH-7@gated-at.bofh.it> (permalink) |
| References | <qOP6O-5zU-13@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On Fri, Jan 08, 2016 at 03:57:09PM -0800, Stephen Boyd wrote: > The msm8916 SoC has an L2 cache for all 4 CPUs. Add it to the > dtsi file so that the cache hierarchy can be probed. > > Cc: <devicetree@vger.kernel.org> > Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> > --- Reviewed-by: Andy Gross <andy.gross@linaro.org>
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[PATCH] arm64: dts: Add L2 cache node to msm8916 Stephen Boyd <sboyd@codeaurora.org> - 2016-01-09 01:00 +0100 Re: [PATCH] arm64: dts: Add L2 cache node to msm8916 Andy Gross <andy.gross@linaro.org> - 2016-01-09 05:50 +0100
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