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Re: Sample ARM assember code?

From jeffj@panix.com (Jeff Jonas)
Newsgroups comp.sys.raspberry-pi
Subject Re: Sample ARM assember code?
Date 2016-11-24 02:19 -0500
Organization ferretronix.com
Message-ID <o1649o$j6m$1@panix3.panix.com> (permalink)
References <nlimbu$7l3$1@dont-email.me> <nliu62$krv$1@panix3.panix.com> <EfqdnSy2ZoAj32LKnZ2dnUU7-dPNnZ2d@earthlink.com> <5KOdnUqzvctTJ2LKnZ2dnUU7-L9QAAAA@giganews.com>

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>>>> I'm not used to a register machine with only load and store
>>>> for memory access and just wanted to crib some techniques

Google found that 6502 folks shared libraries for such needs:

http://6502.org/source/general/clearmem.htm
Clearing a Section of Memory

http://6502.org/source/general/memory_move.html

>>> That's part of the 'culture shock' of going to pure RISC.
>>> Only one memory access per instruction.
>>> No memory to memory accesses, searches, etc.

> Memory-to-memory operations, like moves,
> are always really firmware doing loads and stores in a loop.

I think you mean "microcode", not "firmware".

I'd hate to be a nit-picker, but to me "firmware" refers to ROM-code.
Arduino-like microcontroller systems tend to be called "embedded systems"
because they run totally from ROM/read-mostly-flash.
For larger systems, the ROM tends to be ignored once the full system is booted.
The IBM PC originally ran both load-on-demand user programs
with "hooks" to the BIOS: motherboard and peripherals.
But that was all single-threaded.

"microcode" is loaded upon power-on, extending the instruction set.

I believe the Z80's memory-move was totally hard-wired hardware.
No microcode.
Or perhaps a microcoded-state machine
that was hard-coded into the silicon.

> Consider the complexity of a firmware move loop
> on a virtual memory machine, where each operand and the instruction itself
> may cross page boundaries, leading to three potential page faults
> in a single high-level instruction!

The IBM 360 had a more pathological situation:
an execute instruction, on a page boundary
executing a move-character instruction, on a page boundary
where the source spans a page boundary
and the destination spans a page boundary.
That requires 8 pages loaded simultaneously to resume execution.

-- jeffj

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Thread

Sample ARM assember code? "gareth G4SDW GQRP #3339" <no.spam@thank.you.invalid> - 2016-07-06 11:25 +0100
  Re: Sample ARM assember code? Tauno Voipio <tauno.voipio@notused.fi.invalid> - 2016-07-06 13:54 +0300
    Re: Sample ARM assember code? "gareth G4SDW GQRP #3339" <no.spam@thank.you.invalid> - 2016-07-06 12:50 +0100
      Re: Sample ARM assember code? alister <alister.ware@ntlworld.com> - 2016-07-06 12:29 +0000
        Re: Sample ARM assember code? alister <alister.ware@ntlworld.com> - 2016-07-06 12:46 +0000
          Re: Sample ARM assember code? "Kerr Mudd-John" <admin@127.0.0.1> - 2016-07-06 14:15 +0100
        Re: Sample ARM assember code? Dennis <dennis@none.none> - 2016-07-06 10:08 -0500
      Re: Sample ARM assember code? jeffj@panix.com (Jeff Jonas) - 2016-07-06 08:39 -0400
        Re: Sample ARM assember code? Big Bad Bob <BigBadBob-at-mrp3-dot-com@testing.local> - 2016-10-13 01:17 -0700
          Re: Sample ARM assember code? Michael J. Mahon <mjmahon@aol.com> - 2016-10-13 11:48 -0500
            Re: Sample ARM assember code? jeffj@panix.com (Jeff Jonas) - 2016-11-24 02:19 -0500
          Re: Sample ARM assember code? jeffj@panix.com (Jeff Jonas) - 2016-11-24 01:56 -0500
            Re: Sample ARM assember code? Robert Riches <spamtrap42@jacob21819.net> - 2016-11-25 03:36 +0000
              Re: Sample ARM assember code? Michael J. Mahon <mjmahon@aol.com> - 2016-11-24 23:31 -0600
                Re: Sample ARM assember code? alister <alister.ware@ntlworld.com> - 2016-11-25 12:42 +0000
                Re: Sample ARM assember code? The Natural Philosopher <tnp@invalid.invalid> - 2016-11-25 13:14 +0000
                Re: Sample ARM assember code? Robert Riches <spamtrap42@jacob21819.net> - 2016-11-26 01:05 +0000
                Re: Sample ARM assember code? The Natural Philosopher <tnp@invalid.invalid> - 2016-11-26 11:28 +0000
                Re: Sample ARM assember code? Robert Riches <spamtrap42@jacob21819.net> - 2016-11-27 03:32 +0000
                Re: Sample ARM assember code? The Natural Philosopher <tnp@invalid.invalid> - 2016-11-27 12:01 +0000
                Re: Sample ARM assember code? Dennis Lee Bieber <wlfraed@ix.netcom.com> - 2016-11-27 09:28 -0500
              Re: Sample ARM assember code? mm0fmf <none@invalid.com> - 2016-11-25 18:06 +0000
  Re: Sample ARM assember code? glavallin <glavallin@gjlavallin.plus.com> - 2016-10-27 10:07 +0100
    Re: Sample ARM assember code? glavallin <glavallin@gjlavallin.plus.com> - 2016-10-27 10:39 +0100
    Re: Sample ARM assember code? Tauno Voipio <tauno.voipio@notused.fi.invalid> - 2016-10-27 12:30 +0300

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