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Groups > comp.sys.raspberry-pi > #13400
| From | jeffj@panix.com (Jeff Jonas) |
|---|---|
| Newsgroups | comp.sys.raspberry-pi |
| Subject | Re: Sample ARM assember code? |
| Date | 2016-11-24 01:56 -0500 |
| Organization | ferretronix.com |
| Message-ID | <o162v8$kk1$1@panix3.panix.com> (permalink) |
| References | <nlimbu$7l3$1@dont-email.me> <nlir9r$o1m$1@dont-email.me> <nliu62$krv$1@panix3.panix.com> <EfqdnSy2ZoAj32LKnZ2dnUU7-dPNnZ2d@earthlink.com> |
>> That's part of the 'culture shock' of going to pure RISC.
>> Only one memory access per instruction.
>> No memory to memory accesses, searches, etc.
> old-school assembly programmers were used to that,
> particularly on things like 6502 and really old minicomputers
> that only had accumulators and index registers.
The 6502 was not so bad.
It had fewer registers than the Motorola 6800
to reduce die size and complexity, thus the lower cost
but it still had index registers that could be used
almost as well as general purpose registers.
It even had SOME memory-to-memory operations.
Citing http://forum.6502.org/viewtopic.php?t=2
Read-modify-write instructions (like INC)
read the original data, write it back, and then write the modified data.
-- jeffj
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Sample ARM assember code? "gareth G4SDW GQRP #3339" <no.spam@thank.you.invalid> - 2016-07-06 11:25 +0100
Re: Sample ARM assember code? Tauno Voipio <tauno.voipio@notused.fi.invalid> - 2016-07-06 13:54 +0300
Re: Sample ARM assember code? "gareth G4SDW GQRP #3339" <no.spam@thank.you.invalid> - 2016-07-06 12:50 +0100
Re: Sample ARM assember code? alister <alister.ware@ntlworld.com> - 2016-07-06 12:29 +0000
Re: Sample ARM assember code? alister <alister.ware@ntlworld.com> - 2016-07-06 12:46 +0000
Re: Sample ARM assember code? "Kerr Mudd-John" <admin@127.0.0.1> - 2016-07-06 14:15 +0100
Re: Sample ARM assember code? Dennis <dennis@none.none> - 2016-07-06 10:08 -0500
Re: Sample ARM assember code? jeffj@panix.com (Jeff Jonas) - 2016-07-06 08:39 -0400
Re: Sample ARM assember code? Big Bad Bob <BigBadBob-at-mrp3-dot-com@testing.local> - 2016-10-13 01:17 -0700
Re: Sample ARM assember code? Michael J. Mahon <mjmahon@aol.com> - 2016-10-13 11:48 -0500
Re: Sample ARM assember code? jeffj@panix.com (Jeff Jonas) - 2016-11-24 02:19 -0500
Re: Sample ARM assember code? jeffj@panix.com (Jeff Jonas) - 2016-11-24 01:56 -0500
Re: Sample ARM assember code? Robert Riches <spamtrap42@jacob21819.net> - 2016-11-25 03:36 +0000
Re: Sample ARM assember code? Michael J. Mahon <mjmahon@aol.com> - 2016-11-24 23:31 -0600
Re: Sample ARM assember code? alister <alister.ware@ntlworld.com> - 2016-11-25 12:42 +0000
Re: Sample ARM assember code? The Natural Philosopher <tnp@invalid.invalid> - 2016-11-25 13:14 +0000
Re: Sample ARM assember code? Robert Riches <spamtrap42@jacob21819.net> - 2016-11-26 01:05 +0000
Re: Sample ARM assember code? The Natural Philosopher <tnp@invalid.invalid> - 2016-11-26 11:28 +0000
Re: Sample ARM assember code? Robert Riches <spamtrap42@jacob21819.net> - 2016-11-27 03:32 +0000
Re: Sample ARM assember code? The Natural Philosopher <tnp@invalid.invalid> - 2016-11-27 12:01 +0000
Re: Sample ARM assember code? Dennis Lee Bieber <wlfraed@ix.netcom.com> - 2016-11-27 09:28 -0500
Re: Sample ARM assember code? mm0fmf <none@invalid.com> - 2016-11-25 18:06 +0000
Re: Sample ARM assember code? glavallin <glavallin@gjlavallin.plus.com> - 2016-10-27 10:07 +0100
Re: Sample ARM assember code? glavallin <glavallin@gjlavallin.plus.com> - 2016-10-27 10:39 +0100
Re: Sample ARM assember code? Tauno Voipio <tauno.voipio@notused.fi.invalid> - 2016-10-27 12:30 +0300
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