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Re: tethered fpga Forth from Poland

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forthisit@gmail.com writes:
> However, I don't understand their rationale for dismissing the j1 for
> the role of target CPU.  It's an efficient, fast, soft-core CPU that
> also happens to be stack-based with an instruction format that
> directly maps to primitive Forth words. What's not to like?

From page 2 of the paper:

    J1 is a very interesting solution, however from our point of view it
    has one significant disadvantage -- it doesn't offer possibility of
    interactive work. The program for J1 must be written and compiled in
    advance, and put into the program memory located in internal RAM in
    FPGA.

I notice they don't mention the B16 though.

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tethered fpga Forth from Poland Paul Rubin <no.email@nospam.invalid> - 2014-02-20 23:46 -0800
  Re: tethered fpga Forth from Poland forthisit@gmail.com - 2014-02-21 07:31 -0800
    Re: tethered fpga Forth from Poland Paul Rubin <no.email@nospam.invalid> - 2014-02-21 10:28 -0800
      Re: tethered fpga Forth from Poland forthisit@gmail.com - 2014-02-21 10:55 -0800

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