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| Message-ID | <4DCCA664.9070207@SPAM.comp-arch.net> (permalink) |
|---|---|
| Date | 2011-05-12 20:32 -0700 |
| From | "Andy \"Krazy\" Glew" <andy@SPAM.comp-arch.net> |
| Organization | comp-arch.net |
| Newsgroups | comp.arch |
| Subject | Re: What are the various alternate uses for the PC's LSB ? |
| References | <9226d60e-0c97-4863-97ab-1fc568a7bb46@glegroupsg2000goo.googlegroups.com> <iqhv4i$bg8$1@speranza.aioe.org> |
On 5/12/2011 5:01 PM, whygee wrote: > Paul A. Clayton wrote: >> Linked Load/Store Conditional (with different names) are also used by >> Alpha (as you surmised), ARM, and Power(PC). >> It has the additional semantic of failing if there is interference >> with another thread (it is a very limited form of transactional memory). > Yes, it's definitely a RISC technique worth digging. > Simple, elegant, flexible, inspiring. > > yg And really only works properly on a snoopy bus. And even on a snoopy bus can have problems with fairness. If you aren't careful with how you do bus arbitration, one thread can block forever. Note: don't assume all processors are running at the same clock speed. If you want to guarantee fairness forward progress on a machine that doesn't have a snoopy bus, you have to implement more mechanisms. So, in the end, LL/SC isn't very RISCy at all. Let alone a machine where you want to export the atomic RMW to the interconnect, so that you can do NYU Ultracomputer style fetch and op combining. Or, heck, even the simple form of RMW coalescing that most GPUs provide. However, LL/SC is a mechanism that allows a lot of different instruction sequences to be made atomic. You want atomic-increment-with-saturation at [0,255] ... ? LL/SC can do that for you.
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Re: What are the various alternate uses for the PC's LSB ? "Paul A. Clayton" <paaronclayton@gmail.com> - 2011-05-12 08:49 -0700
Re: What are the various alternate uses for the PC's LSB ? whygee <yg@yg.yg> - 2011-05-13 02:01 +0200
Re: What are the various alternate uses for the PC's LSB ? "Andy \"Krazy\" Glew" <andy@SPAM.comp-arch.net> - 2011-05-12 20:32 -0700
Re: What are the various alternate uses for the PC's LSB ? Terje Mathisen <"terje.mathisen at tmsw.no"> - 2011-05-13 12:47 +0200
Re: What are the various alternate uses for the PC's LSB ? Stephen Fuld <SFuld@alumni.cmu.edu.invalid> - 2011-05-13 08:44 -0700
Re: What are the various alternate uses for the PC's LSB ? Terje Mathisen <"terje.mathisen at tmsw.no"> - 2011-05-13 19:53 +0200
Re: What are the various alternate uses for the PC's LSB ? Stephen Fuld <SFuld@alumni.cmu.edu.invalid> - 2011-05-13 11:36 -0700
Re: What are the various alternate uses for the PC's LSB ? Terje Mathisen <"terje.mathisen at tmsw.no"> - 2011-05-13 22:26 +0200
Re: What are the various alternate uses for the PC's LSB ? "Andy \"Krazy\" Glew" <andy@SPAM.comp-arch.net> - 2011-05-14 17:17 -0700
Re: What are the various alternate uses for the PC's LSB ? Terje Mathisen <"terje.mathisen at tmsw.no"> - 2011-05-16 14:22 +0200
Re: What are the various alternate uses for the PC's LSB ? "Andy \"Krazy\" Glew" <andy@SPAM.comp-arch.net> - 2011-05-16 07:38 -0700
Re: What are the various alternate uses for the PC's LSB ? "Andy \"Krazy\" Glew" <andy@SPAM.comp-arch.net> - 2011-05-14 17:14 -0700
Re: What are the various alternate uses for the PC's LSB ? rpw3@rpw3.org (Rob Warnock) - 2011-05-13 07:45 -0500
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