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Groups > sci.physics > #896268
| From | Jan Panteltje <alien@comet.invalid> |
|---|---|
| Newsgroups | sci.physics, sci.logic, sci.electronics.design |
| Subject | Re: TSMC's 2nm (N2) node and the 7 GHz target (Re: Creating a "European CMOS 2.0 Army") |
| Date | 2026-07-14 16:46 +0000 |
| Organization | A noiseless patient Spider |
| Message-ID | <1135p4l$hpfr$1@dont-email.me> (permalink) |
| References | <1131srm$tqe$1@solani.org> <113593j$35be$2@solani.org> |
Cross-posted to 3 groups.
>Mild Shock <janburse@fastmail.fm>wrote: >>Hi, > >TSMC's 2nm (N2) node and the 7 GHz target >represent a monumental milestone in silicon >manufacturing, shifting away from legacy >FinFETs to advanced Gate-All-Around (GAA) >nanosheet transistors. > >This evolution allows chip designers—particularly >in the PC and AI sectors—to push processor >clock speeds previously thought impossible >on standard nodes > >AMD confirms Zen 6 rollout for its July 22 AI event >https://videocardz.com/newz/amd-confirms-zen-6-launches-in-less-than-two-weeks-starting-with-epyc-venice > >Production of the 6th Gen EPYC family is >already ramping up. AMD says Venice is its >first high-performance computing product >manufactured using TSMC’s 2nm process >technology. > >Bye > >Mild Shock schrieb: >> Hi, >> >> For marketing purposes people >> typically look at the race towards >> 2nm, and we find: >> >> A month ago, Apple lost its exclusivity >> on 3 nm smartphone processors with >> MediaTek’s Dimensity 9400 chip, integrated >> in the Vivo X200 Pro smartphone. Qualcomm >> is also in the race with its recently >> unveiled Snapdragon 8 Elite and set to >> power the Xiaomi 15 Pro in 2025. However, >> Apple should regain its position as innovation >> leader in 2026 with the release of the >> iPhone 18, which should feature the A20 >> chip built on TSMC’s 2 nm process." >> >> But there is a vertical vias revolution >> going on as well, some SOCs typically >> being at 18 layers now: >> >> Zooming Into a CPU (It's Incredible) >> https://www.youtube.com/watch?v=Bez-2cvYja0 >> >> imec has coined the term CMOS 2.0: >> >> LEUVEN (Belgium), MARCH 12th, 2026 — Imec, >> a world-leading research and innovation hub >> in advanced semiconductor technologies, has >> launched a first-of-its-kind consortium with >> 26 European university groups that will jointly >> work on the technology roadmap beyond >> CMOS scaling (CMOS 2.0). >> https://www.imec-int.com/en/press/imec-launches-university-consortium-around-next-generation-chips >> >> >> So we might see more mobile grade GPUs. >> >> Bye I am forwarding this to sci.electronics.design
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TSMC's 2nm (N2) node and the 7 GHz target (Re: Creating a "European CMOS 2.0 Army") Mild Shock <janburse@fastmail.fm> - 2026-07-14 14:12 +0200
Re: TSMC's 2nm (N2) node and the 7 GHz target (Re: Creating a "European CMOS 2.0 Army") Jan Panteltje <alien@comet.invalid> - 2026-07-14 16:46 +0000
pi-WAM is just like Laika3, the first Dog on Mars (Was: TSMC's 2nm (N2) node and the 7 GHz target) Mild Shock <janburse@fastmail.fm> - 2026-07-15 18:10 +0200
So memory bandwidth is no issue at all (Re: pi-WAM is just like Laika3, the first Dog on Mars) Mild Shock <janburse@fastmail.fm> - 2026-07-15 18:37 +0200
For iGPU which acts as a APU RAM is shared (Re: So memory bandwidth is no issue at all) Mild Shock <janburse@fastmail.fm> - 2026-07-16 17:09 +0200
Village Idiot wants 8088 back [Puting Troll] (Re: For iGPU which acts as a APU RAM is shared) Mild Shock <janburse@fastmail.fm> - 2026-07-16 23:03 +0200
VT100 25 x 80 terminal = 2000 Bytes (Re: Village Idiot wants 8088 back [Puting Troll]) Mild Shock <janburse@fastmail.fm> - 2026-07-16 23:09 +0200
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