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APU-style chips load enormous AI models (Re: Creating a "European CMOS 2.0 Army")

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Hi,

Its an error to think iGPU and APU are
only an AMD thing. Even though Intel
and Apple avoid AMD's trademarked "APU"
acronym, the core engineering philosophy

is identical: putting specialized, non-CPU
computing accelerators onto the same piece
of silicon so they can share a single,
massive pool of ultra-fast system memory
without data transfer bottlenecks.

Interestingly, this architecture has become
incredibly popular for local AI workloads,
as the unified memory pool allows these modern,
APU-style chips to load enormous AI models

that would normally require highly expensive,
specialized enterprise graphics hardware.

The Evolution of PC Architecture to
Support Local AI Workloads
https://daily.dev/posts/the-evolution-of-pc-architecture-to-support-local-ai-workloads-bys2nzlg9

Companies like AMD, Intel, and Qualcomm
are deeply invested in this race to redefine
computer capabilities, aiming to unlock
powerful on-device AI performance.

This change marks a departure from the
decades-old architecture designed around
separate processing units with individual
memory allocations, setting a new standard
in personal computing.

Bye

Mild Shock schrieb:
> Hi,
> 
> For marketing purposes people
> typically look at the race towards
> 2nm, and we find:
> 
> A month ago, Apple lost its exclusivity
> on 3 nm smartphone processors with
> MediaTek’s Dimensity 9400 chip, integrated
> in the Vivo X200 Pro smartphone. Qualcomm
> is also in the race with its recently
> unveiled Snapdragon 8 Elite and set to
> power the Xiaomi 15 Pro in 2025. However,
> Apple should regain its position as innovation
> leader in 2026 with the release of the
> iPhone 18, which should feature the A20
> chip built on TSMC’s 2 nm process."
> 
> But there is a vertical vias revolution
> going on as well, some SOCs typically
> being at 18 layers now:
> 
> Zooming Into a CPU (It's Incredible)
> https://www.youtube.com/watch?v=Bez-2cvYja0
> 
> imec has coined the term CMOS 2.0:
> 
> LEUVEN (Belgium), MARCH 12th, 2026 — Imec,
> a world-leading research and innovation hub
> in advanced semiconductor technologies, has
> launched a first-of-its-kind consortium with
> 26 European university groups that will jointly
> work on the technology roadmap beyond
> CMOS scaling (CMOS 2.0).
> https://www.imec-int.com/en/press/imec-launches-university-consortium-around-next-generation-chips 
> 
> 
> So we might see more mobile grade GPUs.
> 
> Bye

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Creating a "European CMOS 2.0 Army" Mild Shock <janburse@fastmail.fm> - 2026-07-13 07:30 +0200
  Micro penis walking around with a rucksack (Re: Creating a "European CMOS 2.0 Army") Mild Shock <janburse@fastmail.fm> - 2026-07-13 07:31 +0200
  APU-style chips load enormous AI models (Re: Creating a "European CMOS 2.0 Army") Mild Shock <janburse@fastmail.fm> - 2026-07-16 17:18 +0200
    Donate a VT100 to vilage idiot? [Black Dildo AI Simulation] (Re: APU-style chips load enormous AI models) Mild Shock <janburse@fastmail.fm> - 2026-07-16 23:18 +0200

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