Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]


Groups > sci.physics.relativity > #671458

For iGPU which acts as a APU RAM is shared (Was: So memory bandwidth is no issue at all)

From Mild Shock <janburse@fastmail.fm>
Newsgroups sci.physics.relativity, sci.math
Subject For iGPU which acts as a APU RAM is shared (Was: So memory bandwidth is no issue at all)
Date 2026-07-16 17:07 +0200
Message-ID <113as3a$6t7t$1@solani.org> (permalink)
References <1131tbj$tqe$9@solani.org> <113591l$35be$1@solani.org> <1138bf3$58mb$3@solani.org> <1138ct5$59mb$1@solani.org> <113an8h$1ittn$1@news.nntp4.net>

Cross-posted to 2 groups.

Show all headers | View raw


Hi,

For iGPU which acts as a APU RAM is shared,

an integrated GPU (iGPU) used as an APU
relies entirely on shared system RAM.
Because the processor and graphics chip
live on the same silicon die, they do not
have their own separate video memory
(like discrete GPUs do with dedicated VRAM).
Instead, the iGPU carves out a portion of
your regular system memory to store textures,
frame buffers, and other graphics data.

While AMD originally coined Accelerated
Processing Unit (APU) in 2011 to highlight the
fusion of CPU and GPU on a single die,
modern AI computing has redefined what
it means to "accelerate" data. When Intel
and Apple discuss their latest processors,
they frequently highlight dedicated hardware
blocks called NPUs (Neural Processing Units) or N
eural Engines right alongside the CPU and GPU.

https://www.articsledge.com/post/accelerated-processing-unit-apu

Bye

Dominique Belorussov schrieb:
> Mild Shock wrote:
> 
>> Pretty much the number of shader cores (*),
>> i.e. 512, that the Ryzen AI 7 350 laptop offers in its integrated GPU
>> Radeon 860M.
> 
> this prolog imbecile doesnt know what ram is and where is located
> 

Back to sci.physics.relativity | Previous | NextPrevious in thread | Next in thread | Find similar | Unroll thread


Thread

TSMC's 2nm (N2) node and the 7 GHz target (Was: Creating a "European CMOS 2.0 Army") Mild Shock <janburse@fastmail.fm> - 2026-07-14 14:11 +0200
  Re: TSMC's 2nm (N2) node and the 7 GHz target (Was: Creating a "European CMOS 2.0 Army") Ross Finlayson <ross.a.finlayson@gmail.com> - 2026-07-14 08:49 -0700
  Re: TSMC's 2nm (N2) node and the 7 GHz target (Was: Creating a "European CMOS 2.0 Army") Keyler Babaskin <nb@erbbiia.ru> - 2026-07-14 16:55 +0000
  pi-WAM is just like Laika3, the first Dog on Mars (Re: TSMC's 2nm (N2) node and the 7 GHz target) Mild Shock <janburse@fastmail.fm> - 2026-07-15 18:11 +0200
    So memory bandwidth is no issue at all (Re: pi-WAM is just like Laika3, the first Dog on Mars) Mild Shock <janburse@fastmail.fm> - 2026-07-15 18:35 +0200
      Re: So memory bandwidth is no issue at all (Re: pi-WAM is just like Laika3, the first Dog on Mars) Dominique Belorussov <os@ssdoi.ru> - 2026-07-16 13:44 +0000
        For iGPU which acts as a APU RAM is shared (Was: So memory bandwidth is no issue at all) Mild Shock <janburse@fastmail.fm> - 2026-07-16 17:07 +0200
          Re: For iGPU which acts as a APU RAM is shared (Was: So memory bandwidth is no issue at all) Bobauk Modenov <bo@modoadb.ru> - 2026-07-16 17:45 +0000
            Village Idiot wants 8088 back [Puting Troll] (Was: For iGPU which acts as a APU RAM is shared) Mild Shock <janburse@fastmail.fm> - 2026-07-16 23:02 +0200
              VT100 25 x 80 terminal = 2000 Bytes (Was: Village Idiot wants 8088 back [Puting Troll]) Mild Shock <janburse@fastmail.fm> - 2026-07-16 23:08 +0200

csiph-web