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The Wuhan Virus that destroyed Python [ggml Manifesto]

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  The Wuhan Virus that destroyed Python [ggml Manifesto] Mild Shock <janburse@fastmail.fm> - 2026-07-22 21:00 +0200
    Deadlock Exorcism: Switch from Push to Pull [A pi-calculus Specification of Prolog] (Re: The Wuhan Virus that destroyed Python [ggml Manifesto]) Mild Shock <janburse@fastmail.fm> - 2026-07-23 00:23 +0200
      Why do you even need a mpmc queue? [Thunder Kittens] (Re: Deadlock Exorcism: Switch from Push to Pull) Mild Shock <janburse@fastmail.fm> - 2026-07-23 08:43 +0200
        Trivial balancing example for (int i=0; i<global_id; i++) (Re: Why do you even need a mpmc queue? [Thunder Kittens]) Mild Shock <janburse@fastmail.fm> - 2026-07-23 08:57 +0200
          Enqueue/dequeue need not be fast and can spinn ["fairness" questions] (Was: Trivial balancing example for (int i=0; i<global_id; i++)) Mild Shock <janburse@fastmail.fm> - 2026-07-23 09:11 +0200
            The Pixel Phone AI Experiment Song (Re: Enqueue/dequeue need not be fast and can spinn ["fairness" questions] ) Mild Shock <janburse@fastmail.fm> - 2026-07-23 09:21 +0200
        Re: Why do you even need a mpmc queue? [Thunder Kittens] (Re: Deadlock Exorcism: Switch from Push to Pull) Ross Finlayson <ross.a.finlayson@gmail.com> - 2026-07-23 08:24 -0700
    Potential Python Recovery: Free Threading [3.13 release] (Was: The Wuhan Virus that destroyed Python [ggml Manifesto]) Mild Shock <janburse@fastmail.fm> - 2026-07-23 10:19 +0200
      Re: Potential Python Recovery: Free Threading [3.13 release] (Was: The Wuhan Virus that destroyed Python [ggml Manifesto]) Ross Valikhanov <kavna@rl.ru> - 2026-07-23 16:01 +0000
    Re: The Wuhan Virus that destroyed Python [ggml Manifesto] Ramon Dubenkov <omd@nnk.ru> - 2026-07-23 13:38 +0000
    The things XILINX braught to the AMD table (Was: The Wuhan Virus that destroyed Python [ggml Manifesto]) Mild Shock <janburse@fastmail.fm> - 2026-07-23 18:47 +0200
      NIVIDIA evacuated its Chinese market [Tau Scaling] (Was: The things XILINX braught to the AMD table) Mild Shock <janburse@fastmail.fm> - 2026-07-23 19:11 +0200
      NVIDIA evacuated its Chinese market [Tau Scaling] (Re: The things XILINX braught to the AMD table) Mild Shock <janburse@fastmail.fm> - 2026-07-23 19:12 +0200
        Re: NVIDIA evacuated its Chinese market [Tau Scaling] (Re: The things XILINX braught to the AMD table) Lane W <cactus_DAC@yahoo.com> - 2026-07-23 11:22 -0600
          Micro penis mother sung arias (Was: NVIDIA evacuated its Chinese market [Tau Scaling]) Mild Shock <janburse@fastmail.fm> - 2026-07-24 14:38 +0200
            Re: Micro penis mother sung arias (Was: NVIDIA evacuated its Chinese market [Tau Scaling]) Lane W <cactus_DAC@yahoo.com> - 2026-07-24 07:15 -0600
              Micro penis brain is in constant hiatus (Was: Micro penis mother sung arias) Mild Shock <janburse@fastmail.fm> - 2026-07-24 15:24 +0200
                Re: Micro penis brain is in constant hiatus (Was: Micro penis mother sung arias) Mild Shock <janburse@fastmail.fm> - 2026-07-24 15:36 +0200
                Ignoramus or Ignorabimus: I don't care (π-WAM) (Re: Micro penis brain is in constant hiatus) Mild Shock <janburse@fastmail.fm> - 2026-07-24 15:38 +0200
                  Re: Ignoramus or Ignorabimus: I don't care (π-WAM) (Re: Micro penis brain is in constant hiatus) Lane W <cactus_DAC@yahoo.com> - 2026-07-24 08:31 -0600
                    You are a moron, brainless putin payed (Was: Ignoramus or Ignorabimus: I don't care (π-WAM)) Mild Shock <janburse@fastmail.fm> - 2026-07-24 18:01 +0200
                      Re: You are a moron, brainless putin payed (Was: Ignoramus or Ignorabimus: I don't care (π-WAM)) Lane W <cactus_DAC@yahoo.com> - 2026-07-24 10:27 -0600
                        Yeah keep reading my posts, uninspired fool (Was: You are a moron, brainless putin payed) Mild Shock <janburse@fastmail.fm> - 2026-07-24 19:45 +0200
                          Re: Yeah keep reading my posts, uninspired fool (Was: You are a moron, brainless putin payed) Lane W <cactus_DAC@yahoo.com> - 2026-07-24 12:11 -0600
                            LoL (Was: Yeah keep reading my posts, uninspired fool ) Mild Shock <janburse@fastmail.fm> - 2026-07-24 20:12 +0200
                              Re: LoL (Was: Yeah keep reading my posts, uninspired fool ) Lane W <cactus_DAC@yahoo.com> - 2026-07-24 12:53 -0600
                  Out of the blue accusation span 15 days [Empirical USENET study] (Was: Ignoramus or Ignorabimus: I don't care (π-WAM)) Mild Shock <janburse@fastmail.fm> - 2026-07-24 20:26 +0200
                  A brain desease of 20 days [Rossy Boy] (Re: Ignoramus or Ignorabimus: I don't care (π-WAM)) Mild Shock <janburse@fastmail.fm> - 2026-07-29 18:40 +0200
                    Re: A brain desease of 20 days [Rossy Boy] (Re: Ignoramus or Ignorabimus: I don't care (π-WAM)) Mantra Mahonov <hnaam@aat.ru> - 2026-07-29 21:15 +0000
                      I didn't use a Ryzen Halo, whats wrong with you? (Was: A brain desease of 20 days [Rossy Boy]) Mild Shock <janburse@fastmail.fm> - 2026-07-29 23:24 +0200
        ASML stocks are plunging, bye bye dutchies (Was: NVIDIA evacuated its Chinese market [Tau Scaling]) Mild Shock <janburse@fastmail.fm> - 2026-07-28 14:17 +0200
    Little Data Center on Your Palm [AI Laptops for 500 USD] (Was: The Wuhan Virus that destroyed Python [ggml Manifesto] Mild Shock <janburse@fastmail.fm> - 2026-07-24 17:58 +0200
      2008: 4 Blades + Tesla S1070 versus 2026: 1 AI Laptop (Re: Little Data Center on Your Palm [AI Laptops for 500 USD]) Mild Shock <janburse@fastmail.fm> - 2026-07-24 18:16 +0200
      Re: Little Data Center on Your Palm [AI Laptops for 500 USD] (Was: The Wuhan Virus that destroyed Python [ggml Manifesto] Bradford Babkoff <ffb@odbb.ru> - 2026-07-24 18:05 +0000
        LoL (Was: Little Data Center on Your Palm [AI Laptops for 500 USD]) Mild Shock <janburse@fastmail.fm> - 2026-07-24 20:11 +0200
    Hurry the blue bus doesnt stop indefinitely (Was: The Wuhan Virus that destroyed Python [ggml Manifesto]) Mild Shock <janburse@fastmail.fm> - 2026-07-24 20:36 +0200
      Not SIMD, a MIMD design for NVIDIA Volta (Re: Hurry the blue bus doesnt stop indefinitely) Mild Shock <janburse@fastmail.fm> - 2026-07-24 20:57 +0200
        Could take 3-4 months find machine / browser (Was Not SIMD, a MIMD design for NVIDIA Volta) Mild Shock <janburse@fastmail.fm> - 2026-07-24 21:15 +0200
        The Koan of pi-WAM queues [FORTRAN-S] (Was: Not SIMD, a MIMD design for NVIDIA Volta) Mild Shock <janburse@fastmail.fm> - 2026-07-26 19:52 +0200
          The turbo capping of AI Laptops (Re: The Koan of pi-WAM queues [FORTRAN-S]) Mild Shock <janburse@fastmail.fm> - 2026-07-26 20:01 +0200
          Re: The Koan of pi-WAM queues [FORTRAN-S] (Was: Not SIMD, a MIMD design for NVIDIA Volta) Ross Finlayson <ross.a.finlayson@gmail.com> - 2026-07-26 20:33 -0700
            Why forget Bulgarians, never on my mind (Re: The Koan of pi-WAM queues [FORTRAN-S] (Was: Not SIMD, a MIMD design for NVIDIA Volta) Mild Shock <janburse@fastmail.fm> - 2026-07-27 09:14 +0200
              miniTriton CUDA is an alternative to torch variants (Was: Why forget Bulgarians, never on my mind) Mild Shock <janburse@fastmail.fm> - 2026-07-27 09:40 +0200
                Andrej Karpathy original gangster of Budget Laptop (Was: miniTriton CUDA is an alternative to torch variants) Mild Shock <janburse@fastmail.fm> - 2026-07-27 09:51 +0200
                  Re: Andrej Karpathy original gangster of Budget Laptop (Was: miniTriton CUDA is an alternative to torch variants) Ross Finlayson <ross.a.finlayson@gmail.com> - 2026-07-27 01:41 -0700
              Re: Why forget Bulgarians, never on my mind (Re: The Koan of pi-WAM queues [FORTRAN-S] (Was: Not SIMD, a MIMD design for NVIDIA Volta) Ross Finlayson <ross.a.finlayson@gmail.com> - 2026-07-27 01:38 -0700
              The evolution of hardware and GPT-2 training (Was: Why forget Bulgarians, never on my mind) Mild Shock <janburse@fastmail.fm> - 2026-07-27 10:56 +0200
                How speed up π-WAM with vector operations (Was: The evolution of hardware and GPT-2 training) Mild Shock <janburse@fastmail.fm> - 2026-07-27 11:08 +0200
                  AI accelerator extend from GPU to CPU [Zero Copying] (Was: How speed up π-WAM with vector operations) Mild Shock <janburse@fastmail.fm> - 2026-07-27 11:21 +0200
                    The invention of vector and matrix registers [NVIDIA Volta] (Was: AI accelerator extend from GPU to CPU [Zero Copying]) Mild Shock <janburse@fastmail.fm> - 2026-07-27 13:20 +0200
                      Maybe they should have named it NVIDIA Einstein [Rossy Boy Toe Sucking] (Re: The invention of vector and matrix registers [NVIDIA Volta] (Was: AI accelerator extend from GPU to CPU [Zero Copying]) Mild Shock <janburse@fastmail.fm> - 2026-07-27 17:14 +0200
                      π-WAM is not adding decimals, it is removing decimals (Re: The invention of vector and matrix registers [NVIDIA Volta]) Mild Shock <janburse@fastmail.fm> - 2026-07-27 18:36 +0200
                        In Budget Laptops the TOPS come with low energy footprint (Was: π-WAM is not adding decimals, it is removing decimals) Mild Shock <janburse@fastmail.fm> - 2026-07-27 18:44 +0200
          Java picky concerning JIT-ing [Luckier with C++/C or FORTRAN compilers?] (Re: The Koan of pi-WAM queues [FORTRAN-S]) Mild Shock <janburse@fastmail.fm> - 2026-07-29 12:55 +0200
      Potato Computer owner impressed by Ukraine Tech [Rossy Boys Brother?] (Re: Hurry the blue bus doesnt stop indefinitely) Mild Shock <janburse@fastmail.fm> - 2026-07-27 16:57 +0200
    Got it. Or are you too stupid? [New Usenet Mantra] (Re: The Wuhan Virus that destroyed Python [ggml Manifesto]) Mild Shock <janburse@fastmail.fm> - 2026-07-27 19:00 +0200
      Re: Got it. Or are you too stupid? [New Usenet Mantra] (Re: The Wuhan Virus that destroyed Python [ggml Manifesto]) Kim Baitchorov <bvhkoc@bmc.ru> - 2026-07-27 22:38 +0000
        Clueless about MIMD as usual [Flynn's Taxonomy] (Was: Rossy Boy is neither Einstein nor Zweistein) Mild Shock <janburse@fastmail.fm> - 2026-07-28 11:29 +0200
          confused rossy boy is confused (Re: Clueless about MIMD as usual [Flynn's Taxonomy]) Mild Shock <janburse@fastmail.fm> - 2026-07-29 11:20 +0200
            Gemini, DeepSeek, OpenAI more clever than rossy boy (Re: confused rossy boy is confused) Mild Shock <janburse@fastmail.fm> - 2026-07-29 11:21 +0200
              In AI Acceleration nobody cares about CivetWeb (Re: Gemini, DeepSeek, OpenAI more clever than rossy boy) Mild Shock <janburse@fastmail.fm> - 2026-07-29 11:29 +0200
                Run with minimum HTTPS and .mjs type (Re: In AI Acceleration nobody cares about CivetWeb) Mild Shock <janburse@fastmail.fm> - 2026-07-29 11:49 +0200
                  Your strictness is your problem , not mine [See WebLLM] (Re: Run with minimum HTTPS and .mjs type) Mild Shock <janburse@fastmail.fm> - 2026-07-29 11:51 +0200
                Re: In AI Acceleration nobody cares about CivetWeb (Re: Gemini, DeepSeek, OpenAI more clever than rossy boy) Lane W <cactus_DAC@yahoo.com> - 2026-07-29 07:06 -0600
                Re: In AI Acceleration nobody cares about CivetWeb (Re: Gemini, DeepSeek, OpenAI more clever than rossy boy) Ross Finlayson <ross.a.finlayson@gmail.com> - 2026-07-29 07:20 -0700
          You are still chewing on SIMD. LoL (Re: Clueless about MIMD as usual [Flynn's Taxonomy]) Mild Shock <janburse@fastmail.fm> - 2026-07-29 17:14 +0200
            Hurry Rossy Boy, the blue bus is waiting (Re: You are still chewing on SIMD. LoL) Mild Shock <janburse@fastmail.fm> - 2026-07-29 17:54 +0200
              Look how they advertized CUDA and logical threads (Re: Hurry Rossy Boy, the blue bus is waiting) Mild Shock <janburse@fastmail.fm> - 2026-07-29 17:56 +0200
                Forget any arithmetization of product FSA (Re: Look how they advertized CUDA and logical threads) Mild Shock <janburse@fastmail.fm> - 2026-07-29 17:57 +0200
            Re: You are still chewing on SIMD. LoL (Re: Clueless about MIMD as usual [Flynn's Taxonomy]) Ross Finlayson <ross.a.finlayson@gmail.com> - 2026-07-29 10:48 -0700
              Rossy Boys tears could cool a data center [pi-WAM Interleaved Synchronized Emulator] (Was: You are still chewing on SIMD. LoL) Mild Shock <janburse@fastmail.fm> - 2026-07-29 20:03 +0200
                I don't use Rust, you are crazy [Jump off a bridge, idiot] (Re: Rossy Boys tears could cool a data center [pi-WAM Interleaved Synchronized Emulator]) Mild Shock <janburse@fastmail.fm> - 2026-07-29 20:24 +0200
                  Re: I don't use Rust, you are crazy [Jump off a bridge, idiot] (Re: Rossy Boys tears could cool a data center [pi-WAM Interleaved Synchronized Emulator]) Ross Finlayson <ross.a.finlayson@gmail.com> - 2026-07-29 12:27 -0700
                    Re: I don't use Rust, you are crazy [Jump off a bridge, idiot] (Re: Rossy Boys tears could cool a data center [pi-WAM Interleaved Synchronized Emulator]) Ross Finlayson <ross.a.finlayson@gmail.com> - 2026-07-29 13:40 -0700
                Hack ecosystem ignorance paired with paranoia [Nand to Tetris] (Re: Rossy Boys tears could cool a data center) Mild Shock <janburse@fastmail.fm> - 2026-07-29 22:51 +0200
                  A funny Q16.16 experiment with Hack (Re: Hack ecosystem ignorance paired with paranoia [Nand to Tetris]) Mild Shock <janburse@fastmail.fm> - 2026-07-29 23:12 +0200
                    Re: A funny Q16.16 experiment with Hack (Re: Hack ecosystem ignorance paired with paranoia [Nand to Tetris]) Alexey Bessonov <nexes@ebxsvs.ru> - 2026-07-29 21:24 +0000
    Lamas in a cradle and Lamas on the edge [Red Pyjama] (Was: The Wuhan Virus that destroyed Python [ggml Manifesto]) Mild Shock <janburse@fastmail.fm> - 2026-07-29 13:02 +0200
      AI Accelerators and ISO Prolog multi-threading (Was: Lamas in a cradle and Lamas on the edge [Red Pyjama]) Mild Shock <janburse@fastmail.fm> - 2026-07-29 17:01 +0200
        Actor/Erlang is dead, no Thread and Mailbox conflation [golang channels] (Was: AI Accelerators and ISO Prolog multi-threading) Mild Shock <janburse@fastmail.fm> - 2026-07-29 17:05 +0200

Page 4 of 4 — ← Prev page 1 2 3 [4]

#647032 — In AI Acceleration nobody cares about CivetWeb (Re: Gemini, DeepSeek, OpenAI more clever than rossy boy)

Hi,

Nobody cares about CivetWeb a C++/C library,
the rossy boy moron refuses to understand this
simple GPU test, that shows some AI Acceleration:

11.4 Giga Lips with a Budget Laptop
https://github.com/Jean-Luc-Picard-2021/gigabudget

Bye

Mild Shock schrieb:
> Hi,
> 
> I already posted the candidate MPMC queue
> to do these things. But my research is
> not yet conclusive:
> 
>  > Its actually quite amazing. Gemini, DeepSeek,
>  > OpenAI all know Dmitriy V'jukov. I have asked
>  > the IntelliJ integrated Freeium AI to generate
>  >
>  > some code for me, I guess their service uses
>  > by default OpenAI (Codex), and had it reviewed
>  > by Gemini and DeepSeek. These AIs started lecturing
>  >
>  > me about lazySet() in Java. But I went with set():
>  >
>  >     private static boolean enqueue(Queue q, Object data) {
>  >         int pos = q.enqueuePos.get();
>  >         for (; ; ) {
>  >             int index = pos & q.bufferMask;
>  >             int seq = q.sequences.get(index);
>  >             int dif = seq - pos;
>  >             if (dif == 0) {
>  >                 if (q.enqueuePos.compareAndSet(pos, pos + 1)) {
>  >                     q.data[index] = data;
>  >                     q.sequences.set(index, pos + 1);
>  >                     return true;
>  >                 }
>  >                 pos = q.enqueuePos.get();
>  >             } else if (dif < 0) {
>  >                 return false;
>  >             } else {
>  >                 pos = q.enqueuePos.get();
>  >             }
>  >         }
>  >     }
>  >
>  > The above version seems to be more suitable
>  > for my purpose, since it allows polling, it
>  > basically implements offer(). While the
>  >
>  > version posted on in the lock free group
>  > by Chris M. Thomasson implements a spin wait
>  > blocking put() already.
> 
> Bye
> 
> Mild Shock schrieb:
>> Hi,
>>
>> Confused rossy boy is confused. We are
>> not building a stupid web server, where
>> a listener thread spawns service threads,
>>
>> and to avoid malloc and free, reuses
>> a pool, or some shitty fork join framework.
>> The producer and consumer example I posted
>>
>> elsewhere archived a dataflow without
>> malloc and free of threads. You are miles
>> away from what we are doing here.
>>
>> Bye
>>
>>>> Ross Finlayson schrieb:
>>> This is with infinity and continuity,
>>> SIMT is a worker pool. 
>>
>> Mild Shock schrieb:
>>> Hi,
>>>
>>> Moron there is no SIMT. As I already wrote:
>>>
>>>  > He is also not Zweistein, since he doesn't
>>>  > understand concepts such as:
>>>  >
>>>  > - NVIDIA Volta ff. architecture
>>>
>>> But you had the SIMD and MIMD disctinction
>>> alreay in OpenMP (via #pragma omp simd and
>>> #pragma omp parallel):
>>>
>>> Flynn's Taxonomy classifies computer architectures
>>> according to how many instruction streams (processes)
>>> and data streams they can process simultaneously,
>>> dividing them into four categories:
>>> SISD, SIMD, MISD, and MIMD.
>>> https://www.geeksforgeeks.org/computer-organization-architecture/computer-architecture-flynns-taxonomy/ 
>>>
>>>
>>> Its not so difficult to understand what
>>> the NVIDIA Volta ff. architecture means.
>>>
>>> Bye
>>>
>>> Ross Finlayson schrieb:
>>>  > They're considered really quite simple,
>>>  > each of those threads is simple, SIMT.
>>>
>>> Ross Finlayson schrieb:
>>>  > On 06/25/2021 07:54 PM, Archimedes Plutonium wrote:
>>>  >> On Monday, June 21, 2021 at 12:00:21 PM UTC-5, Graham Cooper wrote:
>>>  >>> On Tuesday, June 22, 2021 at 2:54:40 AM UTC+10, 
>>> burs...@gmail.com wrote:
>>>  >>>> Try yourself:
>>>  >>>> misc.prolog.compound.parenthesis.missing
>>>  >>>>
>>>  >>>> LMAO!
>>>  >>>
>>>  >>> Jan you work too hard. nobody wants theorem provers on prolog
>>>  >>>
>>>  >>> ASIMO tech is going to LISP which will just have a UNIFY routine
>>>  >>>
>>>  >>> but people can LEARN PROLOG if you EFF OFF!
>>>  >>>
>>>  >>>
>>>  >>>
>>>  >>> VOTE NOW! BAN JAN
>>
> 

[toc] | [prev] | [next] | [standalone]

#647033 — Run with minimum HTTPS and .mjs type (Re: In AI Acceleration nobody cares about CivetWeb)

Hi,

Maybe there is a Rossy Boy flux generator
web server with infinity and continuity
HTTPS and .mjs type, aka SIMT halucination.

To run the GPU example that is written in HTML,
JavaScript and WebGPU / WGSL, the minium is
possibly a HTTPS server that can deliver the

right mime type for the .mjs extension. Its
then only a bundle of static pages that does
the demonstration. What worked on my side

is the IntelliJ browse button, which then uses
a small local server on its own, sandboxed to
serving some project files.

But this is only how to launch the test pages.

The Rossy Boy SIMT halucination, could also work, who knows?

Bye

Mild Shock schrieb:
> Hi,
> 
> Nobody cares about CivetWeb a C++/C library,
> the rossy boy moron refuses to understand this
> simple GPU test, that shows some AI Acceleration:
> 
> 11.4 Giga Lips with a Budget Laptop
> https://github.com/Jean-Luc-Picard-2021/gigabudget
> 
> Bye
> 
> Mild Shock schrieb:
>> Hi,
>>
>> I already posted the candidate MPMC queue
>> to do these things. But my research is
>> not yet conclusive:
>>
>>  > Its actually quite amazing. Gemini, DeepSeek,
>>  > OpenAI all know Dmitriy V'jukov. I have asked
>>  > the IntelliJ integrated Freeium AI to generate
>>  >
>>  > some code for me, I guess their service uses
>>  > by default OpenAI (Codex), and had it reviewed
>>  > by Gemini and DeepSeek. These AIs started lecturing
>>  >
>>  > me about lazySet() in Java. But I went with set():
>>  >
>>  >     private static boolean enqueue(Queue q, Object data) {
>>  >         int pos = q.enqueuePos.get();
>>  >         for (; ; ) {
>>  >             int index = pos & q.bufferMask;
>>  >             int seq = q.sequences.get(index);
>>  >             int dif = seq - pos;
>>  >             if (dif == 0) {
>>  >                 if (q.enqueuePos.compareAndSet(pos, pos + 1)) {
>>  >                     q.data[index] = data;
>>  >                     q.sequences.set(index, pos + 1);
>>  >                     return true;
>>  >                 }
>>  >                 pos = q.enqueuePos.get();
>>  >             } else if (dif < 0) {
>>  >                 return false;
>>  >             } else {
>>  >                 pos = q.enqueuePos.get();
>>  >             }
>>  >         }
>>  >     }
>>  >
>>  > The above version seems to be more suitable
>>  > for my purpose, since it allows polling, it
>>  > basically implements offer(). While the
>>  >
>>  > version posted on in the lock free group
>>  > by Chris M. Thomasson implements a spin wait
>>  > blocking put() already.
>>
>> Bye
>>
>> Mild Shock schrieb:
>>> Hi,
>>>
>>> Confused rossy boy is confused. We are
>>> not building a stupid web server, where
>>> a listener thread spawns service threads,
>>>
>>> and to avoid malloc and free, reuses
>>> a pool, or some shitty fork join framework.
>>> The producer and consumer example I posted
>>>
>>> elsewhere archived a dataflow without
>>> malloc and free of threads. You are miles
>>> away from what we are doing here.
>>>
>>> Bye
>>>
>>>>> Ross Finlayson schrieb:
>>>> This is with infinity and continuity,
>>>> SIMT is a worker pool. 
>>>
>>> Mild Shock schrieb:
>>>> Hi,
>>>>
>>>> Moron there is no SIMT. As I already wrote:
>>>>
>>>>  > He is also not Zweistein, since he doesn't
>>>>  > understand concepts such as:
>>>>  >
>>>>  > - NVIDIA Volta ff. architecture
>>>>
>>>> But you had the SIMD and MIMD disctinction
>>>> alreay in OpenMP (via #pragma omp simd and
>>>> #pragma omp parallel):
>>>>
>>>> Flynn's Taxonomy classifies computer architectures
>>>> according to how many instruction streams (processes)
>>>> and data streams they can process simultaneously,
>>>> dividing them into four categories:
>>>> SISD, SIMD, MISD, and MIMD.
>>>> https://www.geeksforgeeks.org/computer-organization-architecture/computer-architecture-flynns-taxonomy/ 
>>>>
>>>>
>>>> Its not so difficult to understand what
>>>> the NVIDIA Volta ff. architecture means.
>>>>
>>>> Bye
>>>>
>>>> Ross Finlayson schrieb:
>>>>  > They're considered really quite simple,
>>>>  > each of those threads is simple, SIMT.
>>>>
>>>> Ross Finlayson schrieb:
>>>>  > On 06/25/2021 07:54 PM, Archimedes Plutonium wrote:
>>>>  >> On Monday, June 21, 2021 at 12:00:21 PM UTC-5, Graham Cooper wrote:
>>>>  >>> On Tuesday, June 22, 2021 at 2:54:40 AM UTC+10, 
>>>> burs...@gmail.com wrote:
>>>>  >>>> Try yourself:
>>>>  >>>> misc.prolog.compound.parenthesis.missing
>>>>  >>>>
>>>>  >>>> LMAO!
>>>>  >>>
>>>>  >>> Jan you work too hard. nobody wants theorem provers on prolog
>>>>  >>>
>>>>  >>> ASIMO tech is going to LISP which will just have a UNIFY routine
>>>>  >>>
>>>>  >>> but people can LEARN PROLOG if you EFF OFF!
>>>>  >>>
>>>>  >>>
>>>>  >>>
>>>>  >>> VOTE NOW! BAN JAN
>>>
>>
> 

[toc] | [prev] | [next] | [standalone]

#647034 — Your strictness is your problem , not mine [See WebLLM] (Re: Run with minimum HTTPS and .mjs type)

Hi,

Your strictness is your problem , not mine.
The WebGPU / WGSL has explicitly an API
for so called compute shaders.

You can also combine compute shaders and
render shaders. But to use compute shaders
for AI acceration is not uncommon now.

See the WebLLM project by OpenAI where a
transformer is just a WebGPU / WGSL
pipeline type:

WebLLM: High-Performance
In-Browser LLM Inference Engine
https://webllm.mlc.ai/

But I do not assume that everybody is
crawling out of under his rock. And trying
to understand what happens with post NVIDIA

Volta GPUs that come as mobile iGPUs.

Take your time.

Bye

Johann 'Myrkraverk' Oskarsson schrieb:
 > On 29/07/2026 5:27 PM, Mild Shock wrote:
 >> Hi,
 >>
 >> Nobody cares about CivetWeb a C++/C library,
 >> the rossy boy moron refuses to understand this
 >> simple GPU test, that shows some AI Acceleration:
 >
 > I don't know about you, but I don't run my webserver on my GPU.  I use
 > it strictly for graphics.
 >


Mild Shock schrieb:
> Hi,
> 
> Maybe there is a Rossy Boy flux generator
> web server with infinity and continuity
> HTTPS and .mjs type, aka SIMT halucination.
> 
> To run the GPU example that is written in HTML,
> JavaScript and WebGPU / WGSL, the minium is
> possibly a HTTPS server that can deliver the
> 
> right mime type for the .mjs extension. Its
> then only a bundle of static pages that does
> the demonstration. What worked on my side
> 
> is the IntelliJ browse button, which then uses
> a small local server on its own, sandboxed to
> serving some project files.
> 
> But this is only how to launch the test pages.
> 
> The Rossy Boy SIMT halucination, could also work, who knows?
> 
> Bye
> 
> Mild Shock schrieb:
>> Hi,
>>
>> Nobody cares about CivetWeb a C++/C library,
>> the rossy boy moron refuses to understand this
>> simple GPU test, that shows some AI Acceleration:
>>
>> 11.4 Giga Lips with a Budget Laptop
>> https://github.com/Jean-Luc-Picard-2021/gigabudget
>>
>> Bye
>>
>> Mild Shock schrieb:
>>> Hi,
>>>
>>> I already posted the candidate MPMC queue
>>> to do these things. But my research is
>>> not yet conclusive:
>>>
>>>  > Its actually quite amazing. Gemini, DeepSeek,
>>>  > OpenAI all know Dmitriy V'jukov. I have asked
>>>  > the IntelliJ integrated Freeium AI to generate
>>>  >
>>>  > some code for me, I guess their service uses
>>>  > by default OpenAI (Codex), and had it reviewed
>>>  > by Gemini and DeepSeek. These AIs started lecturing
>>>  >
>>>  > me about lazySet() in Java. But I went with set():
>>>  >
>>>  >     private static boolean enqueue(Queue q, Object data) {
>>>  >         int pos = q.enqueuePos.get();
>>>  >         for (; ; ) {
>>>  >             int index = pos & q.bufferMask;
>>>  >             int seq = q.sequences.get(index);
>>>  >             int dif = seq - pos;
>>>  >             if (dif == 0) {
>>>  >                 if (q.enqueuePos.compareAndSet(pos, pos + 1)) {
>>>  >                     q.data[index] = data;
>>>  >                     q.sequences.set(index, pos + 1);
>>>  >                     return true;
>>>  >                 }
>>>  >                 pos = q.enqueuePos.get();
>>>  >             } else if (dif < 0) {
>>>  >                 return false;
>>>  >             } else {
>>>  >                 pos = q.enqueuePos.get();
>>>  >             }
>>>  >         }
>>>  >     }
>>>  >
>>>  > The above version seems to be more suitable
>>>  > for my purpose, since it allows polling, it
>>>  > basically implements offer(). While the
>>>  >
>>>  > version posted on in the lock free group
>>>  > by Chris M. Thomasson implements a spin wait
>>>  > blocking put() already.
>>>
>>> Bye
>>>
>>> Mild Shock schrieb:
>>>> Hi,
>>>>
>>>> Confused rossy boy is confused. We are
>>>> not building a stupid web server, where
>>>> a listener thread spawns service threads,
>>>>
>>>> and to avoid malloc and free, reuses
>>>> a pool, or some shitty fork join framework.
>>>> The producer and consumer example I posted
>>>>
>>>> elsewhere archived a dataflow without
>>>> malloc and free of threads. You are miles
>>>> away from what we are doing here.
>>>>
>>>> Bye
>>>>
>>>>>> Ross Finlayson schrieb:
>>>>> This is with infinity and continuity,
>>>>> SIMT is a worker pool. 
>>>>
>>>> Mild Shock schrieb:
>>>>> Hi,
>>>>>
>>>>> Moron there is no SIMT. As I already wrote:
>>>>>
>>>>>  > He is also not Zweistein, since he doesn't
>>>>>  > understand concepts such as:
>>>>>  >
>>>>>  > - NVIDIA Volta ff. architecture
>>>>>
>>>>> But you had the SIMD and MIMD disctinction
>>>>> alreay in OpenMP (via #pragma omp simd and
>>>>> #pragma omp parallel):
>>>>>
>>>>> Flynn's Taxonomy classifies computer architectures
>>>>> according to how many instruction streams (processes)
>>>>> and data streams they can process simultaneously,
>>>>> dividing them into four categories:
>>>>> SISD, SIMD, MISD, and MIMD.
>>>>> https://www.geeksforgeeks.org/computer-organization-architecture/computer-architecture-flynns-taxonomy/ 
>>>>>
>>>>>
>>>>> Its not so difficult to understand what
>>>>> the NVIDIA Volta ff. architecture means.
>>>>>
>>>>> Bye
>>>>>
>>>>> Ross Finlayson schrieb:
>>>>>  > They're considered really quite simple,
>>>>>  > each of those threads is simple, SIMT.
>>>>>
>>>>> Ross Finlayson schrieb:
>>>>>  > On 06/25/2021 07:54 PM, Archimedes Plutonium wrote:
>>>>>  >> On Monday, June 21, 2021 at 12:00:21 PM UTC-5, Graham Cooper 
>>>>> wrote:
>>>>>  >>> On Tuesday, June 22, 2021 at 2:54:40 AM UTC+10, 
>>>>> burs...@gmail.com wrote:
>>>>>  >>>> Try yourself:
>>>>>  >>>> misc.prolog.compound.parenthesis.missing
>>>>>  >>>>
>>>>>  >>>> LMAO!
>>>>>  >>>
>>>>>  >>> Jan you work too hard. nobody wants theorem provers on prolog
>>>>>  >>>
>>>>>  >>> ASIMO tech is going to LISP which will just have a UNIFY routine
>>>>>  >>>
>>>>>  >>> but people can LEARN PROLOG if you EFF OFF!
>>>>>  >>>
>>>>>  >>>
>>>>>  >>>
>>>>>  >>> VOTE NOW! BAN JAN
>>>>
>>>
>>
> 

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#647038 — Re: In AI Acceleration nobody cares about CivetWeb (Re: Gemini, DeepSeek, OpenAI more clever than rossy boy)

Mild Shock wrote:
> Hi,
> 
> Nobody cares about CivetWeb a C++/C library,
> the rossy boy moron refuses to understand this
> simple GPU test, that shows some AI Acceleration:
> 
> 11.4 Giga Lips with a Budget Laptop
> https://github.com/Jean-Luc-Picard-2021/gigabudget
> 
> Bye

C++ is only used today to program some video games. Most programmers 
have switched over to C#, seeing it as greater in advancement and 
usefulness. Using C++ can lead to bad habits. This is because it is 
faster than C# and the programmers make no effort to generate efficient 
software. Programmers who use C# often make their efforts scalable, 
whereas someone programming in C++ would say, "What does scalable mean?"

[toc] | [prev] | [next] | [standalone]

#647039 — Re: In AI Acceleration nobody cares about CivetWeb (Re: Gemini, DeepSeek, OpenAI more clever than rossy boy)

On 07/29/2026 02:29 AM, Mild Shock wrote:
> Hi,
>
> Nobody cares about CivetWeb a C++/C library,
> the rossy boy moron refuses to understand this
> simple GPU test, that shows some AI Acceleration:
>
> 11.4 Giga Lips with a Budget Laptop
> https://github.com/Jean-Luc-Picard-2021/gigabudget
>
> Bye
>
> Mild Shock schrieb:
>> Hi,
>>
>> I already posted the candidate MPMC queue
>> to do these things. But my research is
>> not yet conclusive:
>>
>>  > Its actually quite amazing. Gemini, DeepSeek,
>>  > OpenAI all know Dmitriy V'jukov. I have asked
>>  > the IntelliJ integrated Freeium AI to generate
>>  >
>>  > some code for me, I guess their service uses
>>  > by default OpenAI (Codex), and had it reviewed
>>  > by Gemini and DeepSeek. These AIs started lecturing
>>  >
>>  > me about lazySet() in Java. But I went with set():
>>  >
>>  >     private static boolean enqueue(Queue q, Object data) {
>>  >         int pos = q.enqueuePos.get();
>>  >         for (; ; ) {
>>  >             int index = pos & q.bufferMask;
>>  >             int seq = q.sequences.get(index);
>>  >             int dif = seq - pos;
>>  >             if (dif == 0) {
>>  >                 if (q.enqueuePos.compareAndSet(pos, pos + 1)) {
>>  >                     q.data[index] = data;
>>  >                     q.sequences.set(index, pos + 1);
>>  >                     return true;
>>  >                 }
>>  >                 pos = q.enqueuePos.get();
>>  >             } else if (dif < 0) {
>>  >                 return false;
>>  >             } else {
>>  >                 pos = q.enqueuePos.get();
>>  >             }
>>  >         }
>>  >     }
>>  >
>>  > The above version seems to be more suitable
>>  > for my purpose, since it allows polling, it
>>  > basically implements offer(). While the
>>  >
>>  > version posted on in the lock free group
>>  > by Chris M. Thomasson implements a spin wait
>>  > blocking put() already.
>>
>> Bye
>>
>> Mild Shock schrieb:
>>> Hi,
>>>
>>> Confused rossy boy is confused. We are
>>> not building a stupid web server, where
>>> a listener thread spawns service threads,
>>>
>>> and to avoid malloc and free, reuses
>>> a pool, or some shitty fork join framework.
>>> The producer and consumer example I posted
>>>
>>> elsewhere archived a dataflow without
>>> malloc and free of threads. You are miles
>>> away from what we are doing here.
>>>
>>> Bye
>>>
>>>>> Ross Finlayson schrieb:
>>>> This is with infinity and continuity,
>>>> SIMT is a worker pool.
>>>
>>> Mild Shock schrieb:
>>>> Hi,
>>>>
>>>> Moron there is no SIMT. As I already wrote:
>>>>
>>>>  > He is also not Zweistein, since he doesn't
>>>>  > understand concepts such as:
>>>>  >
>>>>  > - NVIDIA Volta ff. architecture
>>>>
>>>> But you had the SIMD and MIMD disctinction
>>>> alreay in OpenMP (via #pragma omp simd and
>>>> #pragma omp parallel):
>>>>
>>>> Flynn's Taxonomy classifies computer architectures
>>>> according to how many instruction streams (processes)
>>>> and data streams they can process simultaneously,
>>>> dividing them into four categories:
>>>> SISD, SIMD, MISD, and MIMD.
>>>> https://www.geeksforgeeks.org/computer-organization-architecture/computer-architecture-flynns-taxonomy/
>>>>
>>>>
>>>> Its not so difficult to understand what
>>>> the NVIDIA Volta ff. architecture means.
>>>>
>>>> Bye
>>>>
>>>> Ross Finlayson schrieb:
>>>>  > They're considered really quite simple,
>>>>  > each of those threads is simple, SIMT.
>>>>
>>>> Ross Finlayson schrieb:
>>>>  > On 06/25/2021 07:54 PM, Archimedes Plutonium wrote:
>>>>  >> On Monday, June 21, 2021 at 12:00:21 PM UTC-5, Graham Cooper wrote:
>>>>  >>> On Tuesday, June 22, 2021 at 2:54:40 AM UTC+10,
>>>> burs...@gmail.com wrote:
>>>>  >>>> Try yourself:
>>>>  >>>> misc.prolog.compound.parenthesis.missing
>>>>  >>>>
>>>>  >>>> LMAO!
>>>>  >>>
>>>>  >>> Jan you work too hard. nobody wants theorem provers on prolog
>>>>  >>>
>>>>  >>> ASIMO tech is going to LISP which will just have a UNIFY routine
>>>>  >>>
>>>>  >>> but people can LEARN PROLOG if you EFF OFF!
>>>>  >>>
>>>>  >>>
>>>>  >>>
>>>>  >>> VOTE NOW! BAN JAN
>>>
>>
>

I'm not a Mormon, ....


Though I do have quite a few imaginary wives, ....

Also I don't "Fuse", I'm not a "Fuser", though quite Deep.


Employing computer resources,
in the space and time terms,
including the formal guarantees,
it's mostly all been done before,
old-wrapped-as-new, then though
that I don't need shilling of warez spam.

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#647042 — You are still chewing on SIMD. LoL (Re: Clueless about MIMD as usual [Flynn's Taxonomy])

Hi,

You are still chewing on SIMD. LoL

Ross Finlayson schrieb:
 > Then the idea is that any of those can be found and matched in
 > one "run", i.e. a stall-less, branch-less, call-less list of less than
 > a few or less than a few dozens or less than a few hundreds
 > instructions, the results "findings" in data and corresponding
 > "matchings" of expressions, that runs in less than one microsecond.

You cannot make the mental translation that if you have:

Ross Finlayson schrieb:
 > So, the context then is for register state and stack contents, that
 > the indicators of the above as "positive presence" then is to make
 > for that the adjustments to the offsets and extents and the shifts
 > is according to those, otherwise no-ops. Then the idea is that a

As independent logical thread state, that automatically MIMD follows?

Whats the problem to solve then?

Bye

Mild Shock schrieb:
> Hi,
> 
> Moron there is no SIMT. As I already wrote:
> 
>  > He is also not Zweistein, since he doesn't
>  > understand concepts such as:
>  >
>  > - NVIDIA Volta ff. architecture
> 
> But you had the SIMD and MIMD disctinction
> alreay in OpenMP (via #pragma omp simd and
> #pragma omp parallel):
> 
> Flynn's Taxonomy classifies computer architectures
> according to how many instruction streams (processes)
> and data streams they can process simultaneously,
> dividing them into four categories:
> SISD, SIMD, MISD, and MIMD.
> https://www.geeksforgeeks.org/computer-organization-architecture/computer-architecture-flynns-taxonomy/ 
> 
> 
> Its not so difficult to understand what
> the NVIDIA Volta ff. architecture means.
> 
> Bye
> 
> Ross Finlayson schrieb:
>  > They're considered really quite simple,
>  > each of those threads is simple, SIMT.
> 
> Ross Finlayson schrieb:
>  > On 06/25/2021 07:54 PM, Archimedes Plutonium wrote:
>  >> On Monday, June 21, 2021 at 12:00:21 PM UTC-5, Graham Cooper wrote:
>  >>> On Tuesday, June 22, 2021 at 2:54:40 AM UTC+10, burs...@gmail.com 
> wrote:
>  >>>> Try yourself:
>  >>>> misc.prolog.compound.parenthesis.missing
>  >>>>
>  >>>> LMAO!
>  >>>
>  >>> Jan you work too hard. nobody wants theorem provers on prolog
>  >>>
>  >>> ASIMO tech is going to LISP which will just have a UNIFY routine
>  >>>
>  >>> but people can LEARN PROLOG if you EFF OFF!
>  >>>
>  >>>
>  >>>
>  >>> VOTE NOW! BAN JAN

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#647043 — Hurry Rossy Boy, the blue bus is waiting (Re: You are still chewing on SIMD. LoL)

Hi,

Hurry Rossy Boy, the blue bus is waiting.
There is a quite a hyperbole from here:

Tesla S1070 in 2008
700 Watts , 1 Terra Flop
SOLVE TOMORROW’S PROBLEMS TODAY
https://www.azken.com/download/Tesla_DS_S1070_EU.pdf

To here:

Blackwell GPU in 2026
575 Watts, 104.8 Terra Flops ( RTX 5090 )
 From Volta To Blackwell
https://newsletter.semianalysis.com/p/nvidia-tensor-core-evolution-from-volta-to-blackwell

But somehow the S1070 had already Massively-
Parallel, Many-Core Architecture, and forms
of MIMD, since it had 960 / 240 = 4 cores.

960 scalar processor cores (240 per GPU).
But possibly more resticted inside work
groups, than later NVIDIA Volta ff

architecture with independent thread state.

Bye

Disclaimer: The above is only a very rough
RTX 5090 spec. Its doesn't say what value
format and what vector/matrics ops were

used. Also energy consumption may vary.

Mild Shock schrieb:
> Hi,
> 
> You are still chewing on SIMD. LoL
> 
> Ross Finlayson schrieb:
>  > Then the idea is that any of those can be found and matched in
>  > one "run", i.e. a stall-less, branch-less, call-less list of less than
>  > a few or less than a few dozens or less than a few hundreds
>  > instructions, the results "findings" in data and corresponding
>  > "matchings" of expressions, that runs in less than one microsecond.
> 
> You cannot make the mental translation that if you have:
> 
> Ross Finlayson schrieb:
>  > So, the context then is for register state and stack contents, that
>  > the indicators of the above as "positive presence" then is to make
>  > for that the adjustments to the offsets and extents and the shifts
>  > is according to those, otherwise no-ops. Then the idea is that a
> 
> As independent logical thread state, that automatically MIMD follows?
> 
> Whats the problem to solve then?
> 
> Bye

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#647044 — Look how they advertized CUDA and logical threads (Re: Hurry Rossy Boy, the blue bus is waiting)

Hi,

So what does NUM_SHADERS = 4096 shaders mean here?

11.4 Giga Lips with a Budget Laptop
https://github.com/Jean-Luc-Picard-2021/gigabudget

Its only the number of logical threads.

CUDA™ TEChNOLOGY UNLOCkS ThE POWER OF TESLA MANY-CORE PROCESSORS
The CUDA C compiler simplifies  many-core programming
by enabling code development in a high-level language
and optimizing code to run on systems without knowledge of
how many cores are in the hardware.

CUDA applications automatically take advantage of more
cores or fewer cores in a system, so they can scale from
entry-level notebook GPUs to high end GPUs in technical
workstations  and further into racks of GPUs in data
centers. This allows developers to

“code once” and deploy on a range of systems, as well as
scale forward in time as future GPUs deliver more
performance per watt and more cores per processor. The benefit
for software users is the opportunity to boost computing
performance simply by adding GPUs or using their

existing GPUs in new ways.
https://www.azken.com/download/Tesla_DS_S1070_EU.pdf

Bye

Mild Shock schrieb:
> Hi,
> 
> Hurry Rossy Boy, the blue bus is waiting.
> There is a quite a hyperbole from here:
> 
> Tesla S1070 in 2008
> 700 Watts , 1 Terra Flop
> SOLVE TOMORROW’S PROBLEMS TODAY
> https://www.azken.com/download/Tesla_DS_S1070_EU.pdf
> 
> To here:
> 
> Blackwell GPU in 2026
> 575 Watts, 104.8 Terra Flops ( RTX 5090 )
>  From Volta To Blackwell
> https://newsletter.semianalysis.com/p/nvidia-tensor-core-evolution-from-volta-to-blackwell 
> 
> 
> But somehow the S1070 had already Massively-
> Parallel, Many-Core Architecture, and forms
> of MIMD, since it had 960 / 240 = 4 cores.
> 
> 960 scalar processor cores (240 per GPU).
> But possibly more resticted inside work
> groups, than later NVIDIA Volta ff
> 
> architecture with independent thread state.
> 
> Bye
> 
> Disclaimer: The above is only a very rough
> RTX 5090 spec. Its doesn't say what value
> format and what vector/matrics ops were
> 
> used. Also energy consumption may vary.
> 
> Mild Shock schrieb:
>> Hi,
>>
>> You are still chewing on SIMD. LoL
>>
>> Ross Finlayson schrieb:
>>  > Then the idea is that any of those can be found and matched in
>>  > one "run", i.e. a stall-less, branch-less, call-less list of less than
>>  > a few or less than a few dozens or less than a few hundreds
>>  > instructions, the results "findings" in data and corresponding
>>  > "matchings" of expressions, that runs in less than one microsecond.
>>
>> You cannot make the mental translation that if you have:
>>
>> Ross Finlayson schrieb:
>>  > So, the context then is for register state and stack contents, that
>>  > the indicators of the above as "positive presence" then is to make
>>  > for that the adjustments to the offsets and extents and the shifts
>>  > is according to those, otherwise no-ops. Then the idea is that a
>>
>> As independent logical thread state, that automatically MIMD follows?
>>
>> Whats the problem to solve then?
>>
>> Bye

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#647045 — Forget any arithmetization of product FSA (Re: Look how they advertized CUDA and logical threads)

Hi,

Because of this parallelism you anyway
need to forget about any arithmetization
of product FSA (finite-state automata).

Just forget it. What modern GPU provide
is a kind of hirarchical viewpoint. You
can have barriers in groups etc..

So you can exercise control over your
mongolian horde of logical threads in
a kind of multilevel schema.

Have Fun!

Bye

Mild Shock schrieb:
> Hi,
> 
> So what does NUM_SHADERS = 4096 shaders mean here?
> 
> 11.4 Giga Lips with a Budget Laptop
> https://github.com/Jean-Luc-Picard-2021/gigabudget
> 
> Its only the number of logical threads.
> 
> CUDA™ TEChNOLOGY UNLOCkS ThE POWER OF TESLA MANY-CORE PROCESSORS
> The CUDA C compiler simplifies  many-core programming
> by enabling code development in a high-level language
> and optimizing code to run on systems without knowledge of
> how many cores are in the hardware.
> 
> CUDA applications automatically take advantage of more
> cores or fewer cores in a system, so they can scale from
> entry-level notebook GPUs to high end GPUs in technical
> workstations  and further into racks of GPUs in data
> centers. This allows developers to
> 
> “code once” and deploy on a range of systems, as well as
> scale forward in time as future GPUs deliver more
> performance per watt and more cores per processor. The benefit
> for software users is the opportunity to boost computing
> performance simply by adding GPUs or using their
> 
> existing GPUs in new ways.
> https://www.azken.com/download/Tesla_DS_S1070_EU.pdf
> 
> Bye
> 
> Mild Shock schrieb:
>> Hi,
>>
>> Hurry Rossy Boy, the blue bus is waiting.
>> There is a quite a hyperbole from here:
>>
>> Tesla S1070 in 2008
>> 700 Watts , 1 Terra Flop
>> SOLVE TOMORROW’S PROBLEMS TODAY
>> https://www.azken.com/download/Tesla_DS_S1070_EU.pdf
>>
>> To here:
>>
>> Blackwell GPU in 2026
>> 575 Watts, 104.8 Terra Flops ( RTX 5090 )
>>  From Volta To Blackwell
>> https://newsletter.semianalysis.com/p/nvidia-tensor-core-evolution-from-volta-to-blackwell 
>>
>>
>> But somehow the S1070 had already Massively-
>> Parallel, Many-Core Architecture, and forms
>> of MIMD, since it had 960 / 240 = 4 cores.
>>
>> 960 scalar processor cores (240 per GPU).
>> But possibly more resticted inside work
>> groups, than later NVIDIA Volta ff
>>
>> architecture with independent thread state.
>>
>> Bye
>>
>> Disclaimer: The above is only a very rough
>> RTX 5090 spec. Its doesn't say what value
>> format and what vector/matrics ops were
>>
>> used. Also energy consumption may vary.
>>
>> Mild Shock schrieb:
>>> Hi,
>>>
>>> You are still chewing on SIMD. LoL
>>>
>>> Ross Finlayson schrieb:
>>>  > Then the idea is that any of those can be found and matched in
>>>  > one "run", i.e. a stall-less, branch-less, call-less list of less 
>>> than
>>>  > a few or less than a few dozens or less than a few hundreds
>>>  > instructions, the results "findings" in data and corresponding
>>>  > "matchings" of expressions, that runs in less than one microsecond.
>>>
>>> You cannot make the mental translation that if you have:
>>>
>>> Ross Finlayson schrieb:
>>>  > So, the context then is for register state and stack contents, that
>>>  > the indicators of the above as "positive presence" then is to make
>>>  > for that the adjustments to the offsets and extents and the shifts
>>>  > is according to those, otherwise no-ops. Then the idea is that a
>>>
>>> As independent logical thread state, that automatically MIMD follows?
>>>
>>> Whats the problem to solve then?
>>>
>>> Bye
> 

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#647047 — Re: You are still chewing on SIMD. LoL (Re: Clueless about MIMD as usual [Flynn's Taxonomy])

On 07/29/2026 08:14 AM, Mild Shock wrote:
> Hi,
>
> You are still chewing on SIMD. LoL
>
> Ross Finlayson schrieb:
>  > Then the idea is that any of those can be found and matched in
>  > one "run", i.e. a stall-less, branch-less, call-less list of less than
>  > a few or less than a few dozens or less than a few hundreds
>  > instructions, the results "findings" in data and corresponding
>  > "matchings" of expressions, that runs in less than one microsecond.
>
> You cannot make the mental translation that if you have:
>
> Ross Finlayson schrieb:
>  > So, the context then is for register state and stack contents, that
>  > the indicators of the above as "positive presence" then is to make
>  > for that the adjustments to the offsets and extents and the shifts
>  > is according to those, otherwise no-ops. Then the idea is that a
>
> As independent logical thread state, that automatically MIMD follows?
>
> Whats the problem to solve then?
>
> Bye
>
> Mild Shock schrieb:
>> Hi,
>>
>> Moron there is no SIMT. As I already wrote:
>>
>>  > He is also not Zweistein, since he doesn't
>>  > understand concepts such as:
>>  >
>>  > - NVIDIA Volta ff. architecture
>>
>> But you had the SIMD and MIMD disctinction
>> alreay in OpenMP (via #pragma omp simd and
>> #pragma omp parallel):
>>
>> Flynn's Taxonomy classifies computer architectures
>> according to how many instruction streams (processes)
>> and data streams they can process simultaneously,
>> dividing them into four categories:
>> SISD, SIMD, MISD, and MIMD.
>> https://www.geeksforgeeks.org/computer-organization-architecture/computer-architecture-flynns-taxonomy/
>>
>>
>> Its not so difficult to understand what
>> the NVIDIA Volta ff. architecture means.
>>
>> Bye
>>
>> Ross Finlayson schrieb:
>>  > They're considered really quite simple,
>>  > each of those threads is simple, SIMT.
>>
>> Ross Finlayson schrieb:
>>  > On 06/25/2021 07:54 PM, Archimedes Plutonium wrote:
>>  >> On Monday, June 21, 2021 at 12:00:21 PM UTC-5, Graham Cooper wrote:
>>  >>> On Tuesday, June 22, 2021 at 2:54:40 AM UTC+10, burs...@gmail.com
>> wrote:
>>  >>>> Try yourself:
>>  >>>> misc.prolog.compound.parenthesis.missing
>>  >>>>
>>  >>>> LMAO!
>>  >>>
>>  >>> Jan you work too hard. nobody wants theorem provers on prolog
>>  >>>
>>  >>> ASIMO tech is going to LISP which will just have a UNIFY routine
>>  >>>
>>  >>> but people can LEARN PROLOG if you EFF OFF!
>>  >>>
>>  >>>
>>  >>>
>>  >>> VOTE NOW! BAN JAN
>

No, troll, these are serial algorithms their optimized forms.

Normal sorts of forms, ....


Yeah, everybody already figured out "interpreters" and
"programs" and "spawning".

Go spawn yourself.

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#647048 — Rossy Boys tears could cool a data center [pi-WAM Interleaved Synchronized Emulator] (Was: You are still chewing on SIMD. LoL)

Hi,

Rossy Boys tears could cool a data center,
he thinks there exists no literature about
serial algorithms of parallel stuff, and

he also thinks normal forms lead to optimizing
something. LoL, what a utter bullshit. I did
alreay a serial implementation of a parallel

simulation of my pi-WAM. Just lookup the literature
about pi-calulus. I published it a few days ago,
its part of 2.2.4 released already:

Parallel π-WAM: An Interleaved Synchronous Emulator
https://medium.com/2989/0196089e143a

Whats your point, Rossy Boy? Except you post pretend
nonsense not knowing what you are doing?

Bye

Ross Finlayson schrieb:
> No, troll, these are serial algorithms their optimized forms.
> 
> Normal sorts of forms, ....
> 
> 
> Yeah, everybody already figured out "interpreters" and
> "programs" and "spawning".
> 
> Go spawn yourself.
> 
> 

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#647049 — I don't use Rust, you are crazy [Jump off a bridge, idiot] (Re: Rossy Boys tears could cool a data center [pi-WAM Interleaved Synchronized Emulator])

Hi,

I don't use Rust, you are crazy. First of
all the parallel simulator is 100% written
in Prolog, should also run in ISO Prolog,

enhanced by a library(lists). Second I only
mentioned that WebGPU / WGSL, the language
there has a Rust inspired language.

Its not Rust. Whats wrong with you? Why do
you adress your weariness of life to me.
I am neither thief, nor can I help you

with your frustration, and histeric outbursts.
Maybe just be a man and jump off a bridge, idiot.
Or tame your frustration, usenet is not for

you alone, your stupid asshole.

Bye

Ross Finlayson schrieb:
 > 
https://www.theregister.com/databases/2026/07/29/after-rewriting-sqlite-in-rust-turso-turns-its-sights-on-postgres/5279835
 > I don't much care about Rust.
 >
 > .. gibberish ..
 >
 > Thief.

Mild Shock schrieb:
> Hi,
> 
> Rossy Boys tears could cool a data center,
> he thinks there exists no literature about
> serial algorithms of parallel stuff, and
> 
> he also thinks normal forms lead to optimizing
> something. LoL, what a utter bullshit. I did
> alreay a serial implementation of a parallel
> 
> simulation of my pi-WAM. Just lookup the literature
> about pi-calulus. I published it a few days ago,
> its part of 2.2.4 released already:
> 
> Parallel π-WAM: An Interleaved Synchronous Emulator
> https://medium.com/2989/0196089e143a
> 
> Whats your point, Rossy Boy? Except you post pretend
> nonsense not knowing what you are doing?
> 
> Bye
> 
> Ross Finlayson schrieb:
>> No, troll, these are serial algorithms their optimized forms.
>>
>> Normal sorts of forms, ....
>>
>>
>> Yeah, everybody already figured out "interpreters" and
>> "programs" and "spawning".
>>
>> Go spawn yourself.
>>
>>
> 

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#647050 — Re: I don't use Rust, you are crazy [Jump off a bridge, idiot] (Re: Rossy Boys tears could cool a data center [pi-WAM Interleaved Synchronized Emulator])

On 07/29/2026 11:24 AM, Mild Shock wrote:
> Hi,
>
> I don't use Rust, you are crazy. First of
> all the parallel simulator is 100% written
> in Prolog, should also run in ISO Prolog,
>
> enhanced by a library(lists). Second I only
> mentioned that WebGPU / WGSL, the language
> there has a Rust inspired language.
>
> Its not Rust. Whats wrong with you? Why do
> you adress your weariness of life to me.
> I am neither thief, nor can I help you
>
> with your frustration, and histeric outbursts.
> Maybe just be a man and jump off a bridge, idiot.
> Or tame your frustration, usenet is not for
>
> you alone, your stupid asshole.
>
> Bye
>
> Ross Finlayson schrieb:
>  >
> https://www.theregister.com/databases/2026/07/29/after-rewriting-sqlite-in-rust-turso-turns-its-sights-on-postgres/5279835
>
>  > I don't much care about Rust.
>  >
>  > .. gibberish ..
>  >
>  > Thief.
>
> Mild Shock schrieb:
>> Hi,
>>
>> Rossy Boys tears could cool a data center,
>> he thinks there exists no literature about
>> serial algorithms of parallel stuff, and
>>
>> he also thinks normal forms lead to optimizing
>> something. LoL, what a utter bullshit. I did
>> alreay a serial implementation of a parallel
>>
>> simulation of my pi-WAM. Just lookup the literature
>> about pi-calulus. I published it a few days ago,
>> its part of 2.2.4 released already:
>>
>> Parallel π-WAM: An Interleaved Synchronous Emulator
>> https://medium.com/2989/0196089e143a
>>
>> Whats your point, Rossy Boy? Except you post pretend
>> nonsense not knowing what you are doing?
>>
>> Bye
>>
>> Ross Finlayson schrieb:
>>> No, troll, these are serial algorithms their optimized forms.
>>>
>>> Normal sorts of forms, ....
>>>
>>>
>>> Yeah, everybody already figured out "interpreters" and
>>> "programs" and "spawning".
>>>
>>> Go spawn yourself.
>>>
>>>
>>
>

Like JG and the MIT calculus professor, ....

It's like the buffoon and the high school valedictorian,
or the guidance or admissions counselors.


Hm, comme triste. I didn't know that Burse's neuroses
were so near to the surface as it were, there's room for
sympathy while it's the pitiable, then though I've never
had those sorts of problems of suicidal ideation, maybe
since I wasn't raised in a sock-puppet creche where the
essential capriciousness of survival makes for the lack
of attachment to meaning. There are accounts made of
survival in the womb among the colony as it were or
as for the accounts of oogenesis and zygogenesis,
the blastocytes, that though is figured to be before
cognition in usual accounts, with regards to the usual
dogma of reproduction. That is to say, the usual
genetic evolution engineering of sock-puppet bots doesn't
necessarily reward virtue, nor establish personal identity
of the more than transitory sort.

That's why they have shiny yet lifeless eyes.

Yet, "I pity the fool", doesn't much apply, as I don't.

So, while there's sympathy and even pity for the confided
neuroses of nihilism and existentialism for animal types,
thinking beings basically live in an entirely different
world in their mind.


If you like MIND-on-SIMD, you might be interested
in "Very Long Instruction Word".

https://en.wikipedia.org/wiki/Very_long_instruction_word

Dear readers, please excuse these distractions,
and maintain that people are essentially good,
with yet the implicit reserve that some are not.

I'm neither a Calvinist nor Spinozan, though Spinoza
does makes for "infinity is in" that Duns Scotus already
provides, then as with regards who Ecclesiastes is with
regards to the vexatious and the vain, maybe it's Judas.


Clonotype.




1776

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#647051 — Re: I don't use Rust, you are crazy [Jump off a bridge, idiot] (Re: Rossy Boys tears could cool a data center [pi-WAM Interleaved Synchronized Emulator])

On 07/29/2026 12:27 PM, Ross Finlayson wrote:
> On 07/29/2026 11:24 AM, Mild Shock wrote:
>> Hi,
>>
>> I don't use Rust, you are crazy. First of
>> all the parallel simulator is 100% written
>> in Prolog, should also run in ISO Prolog,
>>
>> enhanced by a library(lists). Second I only
>> mentioned that WebGPU / WGSL, the language
>> there has a Rust inspired language.
>>
>> Its not Rust. Whats wrong with you? Why do
>> you adress your weariness of life to me.
>> I am neither thief, nor can I help you
>>
>> with your frustration, and histeric outbursts.
>> Maybe just be a man and jump off a bridge, idiot.
>> Or tame your frustration, usenet is not for
>>
>> you alone, your stupid asshole.
>>
>> Bye
>>
>> Ross Finlayson schrieb:
>>  >
>> https://www.theregister.com/databases/2026/07/29/after-rewriting-sqlite-in-rust-turso-turns-its-sights-on-postgres/5279835
>>
>>
>>  > I don't much care about Rust.
>>  >
>>  > .. gibberish ..
>>  >
>>  > Thief.
>>
>> Mild Shock schrieb:
>>> Hi,
>>>
>>> Rossy Boys tears could cool a data center,
>>> he thinks there exists no literature about
>>> serial algorithms of parallel stuff, and
>>>
>>> he also thinks normal forms lead to optimizing
>>> something. LoL, what a utter bullshit. I did
>>> alreay a serial implementation of a parallel
>>>
>>> simulation of my pi-WAM. Just lookup the literature
>>> about pi-calulus. I published it a few days ago,
>>> its part of 2.2.4 released already:
>>>
>>> Parallel π-WAM: An Interleaved Synchronous Emulator
>>> https://medium.com/2989/0196089e143a
>>>
>>> Whats your point, Rossy Boy? Except you post pretend
>>> nonsense not knowing what you are doing?
>>>
>>> Bye
>>>
>>> Ross Finlayson schrieb:
>>>> No, troll, these are serial algorithms their optimized forms.
>>>>
>>>> Normal sorts of forms, ....
>>>>
>>>>
>>>> Yeah, everybody already figured out "interpreters" and
>>>> "programs" and "spawning".
>>>>
>>>> Go spawn yourself.
>>>>
>>>>
>>>
>>
>
> Like JG and the MIT calculus professor, ....
>
> It's like the buffoon and the high school valedictorian,
> or the guidance or admissions counselors.
>
>
> Hm, comme triste. I didn't know that Burse's neuroses
> were so near to the surface as it were, there's room for
> sympathy while it's the pitiable, then though I've never
> had those sorts of problems of suicidal ideation, maybe
> since I wasn't raised in a sock-puppet creche where the
> essential capriciousness of survival makes for the lack
> of attachment to meaning. There are accounts made of
> survival in the womb among the colony as it were or
> as for the accounts of oogenesis and zygogenesis,
> the blastocytes, that though is figured to be before
> cognition in usual accounts, with regards to the usual
> dogma of reproduction. That is to say, the usual
> genetic evolution engineering of sock-puppet bots doesn't
> necessarily reward virtue, nor establish personal identity
> of the more than transitory sort.
>
> That's why they have shiny yet lifeless eyes.
>
> Yet, "I pity the fool", doesn't much apply, as I don't.
>
> So, while there's sympathy and even pity for the confided
> neuroses of nihilism and existentialism for animal types,
> thinking beings basically live in an entirely different
> world in their mind.
>
>
> If you like MIND-on-SIMD, you might be interested
> in "Very Long Instruction Word".
>
> https://en.wikipedia.org/wiki/Very_long_instruction_word
>
> Dear readers, please excuse these distractions,
> and maintain that people are essentially good,
> with yet the implicit reserve that some are not.
>
> I'm neither a Calvinist nor Spinozan, though Spinoza
> does makes for "infinity is in" that Duns Scotus already
> provides, then as with regards who Ecclesiastes is with
> regards to the vexatious and the vain, maybe it's Judas.
>
>
> Clonotype.
>
>
>
>
> 1776
>
>


These certainly aren't forae for it, though I tend to not
change the follow-ups and politely bottom-post.


About genetic evolution and evolutionary intelligence,
evolution after natural selection and mutation with
environmental factors are key dogmatic concepts in
the theory of dynamics and progression over time,
like how humans develop larger brains and sexual characteristics,
_over time_, over a long, long time.

So, the genetic evolution of sock-puppet bots,
so "accelerated" as it were, is not very natural,
and it's kind of like this. This isn't a particularly
neutral example and it's a bit grotesque. This is
where the would-be operant conditioner (like Pavlov
or the guy with the pigeons or soft-mother/wire-mother),
wants the best cat. So, usual accounts of these
include buying the best cat for characteristics in a fair market, making
a program of cat-breeding and selective-breeding over time
for characteristics, or making a program of the training and
development of the cat, or with regards to nature vis-a-vis nurture.
So anyways, genetic programming of the sock-puppet variety,
or, "training", the sock-puppet, mostly involves getting a
bunch of cats and a bunch of bags, then making batches of
cats in a bag and throwing the cats off a bridge into the river,
where the usual idea is that's an old cruel and inhumane way
to euthanize cats, yet randomly, a cat escapes the bag and
avoids drowning and crawls itself bedraggledly to shore.
Then, the would-be operant conditioner, by simply wasting
tons of cats and quite a few bags, arrives at best cat.

Yet, the characteristics for which it has been selected,
are mostly clawing their way past the other cats and
out of the bag.


So, sock-puppets in usual accounts are intrinsically psychotic.
They don't have the life experiences to condition themselves
according to their own internal maturation of the personal,
psychological, and mental sort what makes nature and nurture,
just stimulus-response.

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#647052 — Hack ecosystem ignorance paired with paranoia [Nand to Tetris] (Re: Rossy Boys tears could cool a data center)

Hi,

 > Who exactly is the thief? Does this person
 > have stats in the Rogue class in dungeons
 > and dragons?

The conspiracy theory of a stealing of Torso VDBE,
by Rossy Boy, is probably a result of complete
ignorance of the Hack ecosystem.

Hack is a very popular computer science project,
with a couple of subprojects in hardware and
software. It goes also by the name Nand to Tetris,

and is programming language agnositic. You can do
Hack experiments in any programming language, be
it BASIC, ADA or Rust. Nobody cares.

The gist are projects like here, first to
educate yourself about Hack:

https://www.nand2tetris.org/course

And then to use Hack in different contexts:

https://www.nand2tetris.org/copy-of-talks

For didactic purposes, I used Hack for my WebGPU
experiment. I didn't even take a look at Torso
VDBE, why should I? Hack is nicely documented,

has even a book, and fusing the two 16-bit
instruction types A and D, into a single 32-bit
instruction stream, is nowhere patented.

Bye

Mild Shock schrieb:
> Hi,
> 
> Rossy Boys tears could cool a data center,
> he thinks there exists no literature about
> serial algorithms of parallel stuff, and
> 
> he also thinks normal forms lead to optimizing
> something. LoL, what a utter bullshit. I did
> alreay a serial implementation of a parallel
> 
> simulation of my pi-WAM. Just lookup the literature
> about pi-calulus. I published it a few days ago,
> its part of 2.2.4 released already:
> 
> Parallel π-WAM: An Interleaved Synchronous Emulator
> https://medium.com/2989/0196089e143a
> 
> Whats your point, Rossy Boy? Except you post pretend
> nonsense not knowing what you are doing?
> 
> Bye
> 
> Ross Finlayson schrieb:
>> No, troll, these are serial algorithms their optimized forms.
>>
>> Normal sorts of forms, ....
>>
>>
>> Yeah, everybody already figured out "interpreters" and
>> "programs" and "spawning".
>>
>> Go spawn yourself.
>>
>>
> 

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#647053 — A funny Q16.16 experiment with Hack (Re: Hack ecosystem ignorance paired with paranoia [Nand to Tetris])

Hi,

This seems to be a funny Q16.16 experiment.
It shows that an integerish Hack can do
floatish stuff, by using binary fixpoint:

Raytracing on the Hack computer
2021/06/13 - im alex
https://blog.alexqua.ch/posts/from-nand-to-raytracer/

That it uses Rust is arbitrary. Feel free
to do it in C, C++, FORTRAN or Java. I guess
these languages all have basic arithmethic,

right? Maybe not a long jump always?

Bye

Mild Shock schrieb:
> Hi,
> 
>  > Who exactly is the thief? Does this person
>  > have stats in the Rogue class in dungeons
>  > and dragons?
> 
> The conspiracy theory of a stealing of Torso VDBE,
> by Rossy Boy, is probably a result of complete
> ignorance of the Hack ecosystem.
> 
> Hack is a very popular computer science project,
> with a couple of subprojects in hardware and
> software. It goes also by the name Nand to Tetris,
> 
> and is programming language agnositic. You can do
> Hack experiments in any programming language, be
> it BASIC, ADA or Rust. Nobody cares.
> 
> The gist are projects like here, first to
> educate yourself about Hack:
> 
> https://www.nand2tetris.org/course
> 
> And then to use Hack in different contexts:
> 
> https://www.nand2tetris.org/copy-of-talks
> 
> For didactic purposes, I used Hack for my WebGPU
> experiment. I didn't even take a look at Torso
> VDBE, why should I? Hack is nicely documented,
> 
> has even a book, and fusing the two 16-bit
> instruction types A and D, into a single 32-bit
> instruction stream, is nowhere patented.
> 
> Bye
> 
> Mild Shock schrieb:
>> Hi,
>>
>> Rossy Boys tears could cool a data center,
>> he thinks there exists no literature about
>> serial algorithms of parallel stuff, and
>>
>> he also thinks normal forms lead to optimizing
>> something. LoL, what a utter bullshit. I did
>> alreay a serial implementation of a parallel
>>
>> simulation of my pi-WAM. Just lookup the literature
>> about pi-calulus. I published it a few days ago,
>> its part of 2.2.4 released already:
>>
>> Parallel π-WAM: An Interleaved Synchronous Emulator
>> https://medium.com/2989/0196089e143a
>>
>> Whats your point, Rossy Boy? Except you post pretend
>> nonsense not knowing what you are doing?
>>
>> Bye
>>
>> Ross Finlayson schrieb:
>>> No, troll, these are serial algorithms their optimized forms.
>>>
>>> Normal sorts of forms, ....
>>>
>>>
>>> Yeah, everybody already figured out "interpreters" and
>>> "programs" and "spawning".
>>>
>>> Go spawn yourself.
>>>
>>>
>>
> 

[toc] | [prev] | [next] | [standalone]

#647056 — Re: A funny Q16.16 experiment with Hack (Re: Hack ecosystem ignorance paired with paranoia [Nand to Tetris])

Mild Shock wrote:

> That it uses Rust is arbitrary. Feel free to do it in C, C++, FORTRAN or
> Java. I guess these languages all have basic arithmethic,

this is nothing, voice to code, you speak your prompt and the comes out on 
the other side in any language you want, it makes no difference.

the same with mathematics, speak your equations and the answer comes 
through the other side.

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#647036 — Lamas in a cradle and Lamas on the edge [Red Pyjama] (Was: The Wuhan Virus that destroyed Python [ggml Manifesto])

Hi,

Why does this Lama have a red pyjama.
Oh, its a baby Lama. Its still in the cradle
and needs some training:

RedPajama-Data-v2
https://github.com/togethercomputer/RedPajama-Data

But then Andrej Karpathy recently showed
GPT-2 training on rented GPUs for less
than 100 USD in less then 2 hours.

So where do these grown up Lamas go.
Well Georgi Gerganov prefered C++/C
when he shouted Llama Llama Red Pyjama.

But you also find WebLLM, wrapping the
underlying C++/C GPU interface via the
W3C standard WebGPU / WGSL, with JavaScript:

In-Browser LLM Inference Engine
https://webllm.mlc.ai/

My experience with WebLLM 6 months
ago on an iPad Pro 2024, still a little early
stage performance and robustness.

But hey hardware of AI mobile iGPUs is
still evolving, and AI laptop, AI smartphones
and AI tablets, will soon feature Chinese

hardware such some new Kirin AI in 2027.

Bye

Mild Shock schrieb:
> Hi,
> 
> Remember when first all local AI was Python
> and PyTorch APIs. And then suddently people strated
> using bare metal C/C++ Code. Here is the story:
> 
> How it started:
> 
> GPT-J or GPT-J-6B is an open-source large
> language model (LLM) developed by EleutherAI
> in 2021. As the name suggests, it is a
> generative pre-trained transformer model
> designed to produce human-like text that
> continues from a prompt.
> https://www.eleuther.ai/
> 
> How it was going [Georgi Gerganov]:
> 
> So a few days later comes out the LLaMA, I do
> some calculations and I figure out “Okay, 65
> billion parameters. You probably need about
> 40 gigs of RAM, with 4-bit quantization. So
> this can run on a MacBook. Why not do it?”
> 
> Why I was able to do it so quickly - basically,
> for all that I saw it’s pretty much GPT-J architecture
> with some modifications, like some extra memorization
> layers. It’s minor changes. Basically, again, the
> existing code for the GPT-J, I just simply
> modified it there, it happened pretty quickly.
> https://changelog.com/podcast/532
> 
> Georgi Gerganov, Bulgarian, now with Hugging
> Face, ggml-cann also running on Chinese AI chips.
> ggml Manifesto https://github.com/ggml-org/ggml
> 
> Bye
> 

[toc] | [prev] | [next] | [standalone]

#647040 — AI Accelerators and ISO Prolog multi-threading (Was: Lamas in a cradle and Lamas on the edge [Red Pyjama])

Hi,

Usual question:

 > Why implement both pre-emptive threading
AND cooperative tasks/engines?

I had implemented the ISO proposal in formerly Jekejeke
Prolog, you find the ISO proposal here:

ISO/IEC DTR 13211–5:2007
Prolog multi-threading support
https://logtalk.org/plstd/threads.pdf

But the ISO proposal doesn't match modern WebGPU APIs,
where your logical threads can live remotely in a dedicated GPU
in the VRAM there, and where you would have launch

parameters that say: Hey please run 4096 compute
shaders for me, that have independet thread state. Using
cooperative multi-tasking as the orchestrator works well.

Bye

Mild Shock schrieb:
> Hi,
> 
> Why does this Lama have a red pyjama.
> Oh, its a baby Lama. Its still in the cradle
> and needs some training:
> 
> RedPajama-Data-v2
> https://github.com/togethercomputer/RedPajama-Data
> 
> But then Andrej Karpathy recently showed
> GPT-2 training on rented GPUs for less
> than 100 USD in less then 2 hours.
> 
> So where do these grown up Lamas go.
> Well Georgi Gerganov prefered C++/C
> when he shouted Llama Llama Red Pyjama.
> 
> But you also find WebLLM, wrapping the
> underlying C++/C GPU interface via the
> W3C standard WebGPU / WGSL, with JavaScript:
> 
> In-Browser LLM Inference Engine
> https://webllm.mlc.ai/
> 
> My experience with WebLLM 6 months
> ago on an iPad Pro 2024, still a little early
> stage performance and robustness.
> 
> But hey hardware of AI mobile iGPUs is
> still evolving, and AI laptop, AI smartphones
> and AI tablets, will soon feature Chinese
> 
> hardware such some new Kirin AI in 2027.
> 
> Bye
> 
> Mild Shock schrieb:
>> Hi,
>>
>> Remember when first all local AI was Python
>> and PyTorch APIs. And then suddently people strated
>> using bare metal C/C++ Code. Here is the story:
>>
>> How it started:
>>
>> GPT-J or GPT-J-6B is an open-source large
>> language model (LLM) developed by EleutherAI
>> in 2021. As the name suggests, it is a
>> generative pre-trained transformer model
>> designed to produce human-like text that
>> continues from a prompt.
>> https://www.eleuther.ai/
>>
>> How it was going [Georgi Gerganov]:
>>
>> So a few days later comes out the LLaMA, I do
>> some calculations and I figure out “Okay, 65
>> billion parameters. You probably need about
>> 40 gigs of RAM, with 4-bit quantization. So
>> this can run on a MacBook. Why not do it?”
>>
>> Why I was able to do it so quickly - basically,
>> for all that I saw it’s pretty much GPT-J architecture
>> with some modifications, like some extra memorization
>> layers. It’s minor changes. Basically, again, the
>> existing code for the GPT-J, I just simply
>> modified it there, it happened pretty quickly.
>> https://changelog.com/podcast/532
>>
>> Georgi Gerganov, Bulgarian, now with Hugging
>> Face, ggml-cann also running on Chinese AI chips.
>> ggml Manifesto https://github.com/ggml-org/ggml
>>
>> Bye
>>
> 

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#647041 — Actor/Erlang is dead, no Thread and Mailbox conflation [golang channels] (Was: AI Accelerators and ISO Prolog multi-threading)

Hi,

Mostlikely for high performance computing à la,
the Actor/Erlang model is dead, they might rely
on MPMC (Multiple Producer, Multiple Consumer)

queue entities separate from the threads. The
ISO Prolog multi-threading support had also such
threads. But besides that was also Actor/Erlang

leaning in practice, like SWI, where threads
have some default queues. So an actor is basically
a Thread and Mailbox conflation. While a MPMC queue

is a kind of separate Mailbox, where multiple
"actors" can read from and write from. A kind of
localized Linda Tuple store.

Which Programming language did adopted the
non-Actor pi-calculus model? Right golang
with its channels.

Bye

Mild Shock schrieb:
> Hi,
> 
> Usual question:
> 
>  > Why implement both pre-emptive threading
> AND cooperative tasks/engines?
> 
> I had implemented the ISO proposal in formerly Jekejeke
> Prolog, you find the ISO proposal here:
> 
> ISO/IEC DTR 13211–5:2007
> Prolog multi-threading support
> https://logtalk.org/plstd/threads.pdf
> 
> But the ISO proposal doesn't match modern WebGPU APIs,
> where your logical threads can live remotely in a dedicated GPU
> in the VRAM there, and where you would have launch
> 
> parameters that say: Hey please run 4096 compute
> shaders for me, that have independet thread state. Using
> cooperative multi-tasking as the orchestrator works well.
> 
> Bye
> 
> Mild Shock schrieb:
>> Hi,
>>
>> Why does this Lama have a red pyjama.
>> Oh, its a baby Lama. Its still in the cradle
>> and needs some training:
>>
>> RedPajama-Data-v2
>> https://github.com/togethercomputer/RedPajama-Data
>>
>> But then Andrej Karpathy recently showed
>> GPT-2 training on rented GPUs for less
>> than 100 USD in less then 2 hours.
>>
>> So where do these grown up Lamas go.
>> Well Georgi Gerganov prefered C++/C
>> when he shouted Llama Llama Red Pyjama.
>>
>> But you also find WebLLM, wrapping the
>> underlying C++/C GPU interface via the
>> W3C standard WebGPU / WGSL, with JavaScript:
>>
>> In-Browser LLM Inference Engine
>> https://webllm.mlc.ai/
>>
>> My experience with WebLLM 6 months
>> ago on an iPad Pro 2024, still a little early
>> stage performance and robustness.
>>
>> But hey hardware of AI mobile iGPUs is
>> still evolving, and AI laptop, AI smartphones
>> and AI tablets, will soon feature Chinese
>>
>> hardware such some new Kirin AI in 2027.
>>
>> Bye
>>
>> Mild Shock schrieb:
>>> Hi,
>>>
>>> Remember when first all local AI was Python
>>> and PyTorch APIs. And then suddently people strated
>>> using bare metal C/C++ Code. Here is the story:
>>>
>>> How it started:
>>>
>>> GPT-J or GPT-J-6B is an open-source large
>>> language model (LLM) developed by EleutherAI
>>> in 2021. As the name suggests, it is a
>>> generative pre-trained transformer model
>>> designed to produce human-like text that
>>> continues from a prompt.
>>> https://www.eleuther.ai/
>>>
>>> How it was going [Georgi Gerganov]:
>>>
>>> So a few days later comes out the LLaMA, I do
>>> some calculations and I figure out “Okay, 65
>>> billion parameters. You probably need about
>>> 40 gigs of RAM, with 4-bit quantization. So
>>> this can run on a MacBook. Why not do it?”
>>>
>>> Why I was able to do it so quickly - basically,
>>> for all that I saw it’s pretty much GPT-J architecture
>>> with some modifications, like some extra memorization
>>> layers. It’s minor changes. Basically, again, the
>>> existing code for the GPT-J, I just simply
>>> modified it there, it happened pretty quickly.
>>> https://changelog.com/podcast/532
>>>
>>> Georgi Gerganov, Bulgarian, now with Hugging
>>> Face, ggml-cann also running on Chinese AI chips.
>>> ggml Manifesto https://github.com/ggml-org/ggml
>>>
>>> Bye
>>>
>>
> 

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