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LDO

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  LDO John Larkin <jjlarkin@highlandtechnology.com> - 2016-10-11 22:09 -0700
    Re: LDO Robert Loos <1209@baer-gmbh.com> - 2016-10-12 09:49 +0200
      Re: LDO John Larkin <jjlarkin@highlandtechnology.com> - 2016-10-12 08:31 -0700
        Re: LDO bitrex <bitrex@de.lete.earthlink.net> - 2016-10-12 22:47 -0400
        Re: LDO John S <Sophi.2@invalid.org> - 2016-10-13 06:16 -0500
          Re: LDO John Larkin <jjlarkin@highlandtechnology.com> - 2016-10-13 08:08 -0700
            Re: LDO Klaus Kragelund <klauskvik@hotmail.com> - 2016-10-13 08:57 -0700
              Re: LDO John Larkin <jjlarkin@highlandtechnology.com> - 2016-10-13 09:05 -0700
              Re: LDO Jim Thompson <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> - 2016-10-13 09:26 -0700
                Re: LDO Klaus Kragelund <klauskvik@hotmail.com> - 2016-10-14 04:38 -0700
                  Re: LDO Jim Thompson <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> - 2016-10-14 07:42 -0700
      Re: LDO klaus.kragelund@gmail.com - 2016-10-12 14:35 -0700
        Re: LDO John Larkin <jjlarkin@highlandtechnology.com> - 2016-10-12 15:58 -0700
        Re: LDO Robert Loos <1209@baer-gmbh.com> - 2016-10-13 08:46 +0200
      Re: LDO Jim Thompson <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> - 2016-10-12 15:08 -0700
        Re: LDO John Larkin <jjlarkin@highlandtechnology.com> - 2016-10-12 15:53 -0700
          Re: LDO Winfield Hill <hill@rowland.harvard.edu> - 2016-10-13 03:28 -0700
            Re: LDO John Larkin <jjlarkin@highlandtechnology.com> - 2016-10-13 08:21 -0700
      Re: LDO piglet <erichpwagner@hotmail.com> - 2016-10-13 14:03 +0100
        Re: LDO Winfield Hill <hill@rowland.harvard.edu> - 2016-10-13 06:16 -0700
          Re: LDO piglet <erichpwagner@hotmail.com> - 2016-10-13 14:30 +0100
            Re: LDO John Larkin <jjlarkin@highlandtechnology.com> - 2016-10-13 08:26 -0700
    Re: LDO doggerel <doggerel@nil.com> - 2016-10-12 16:07 +0800
      Re: LDO Tauno Voipio <tauno.voipio@notused.fi.invalid> - 2016-10-12 15:53 +0300
        Re: LDO doggerel <doggerel@nil.com> - 2016-10-13 10:16 +0800
      Re: LDO John Larkin <jjlarkin@highlandtechnology.com> - 2016-10-12 07:35 -0700
        Re: LDO doggerel <doggerel@nil.com> - 2016-10-13 10:15 +0800
    Re: LDO bloggs.fredbloggs.fred@gmail.com - 2016-10-12 08:41 -0700
      Re: LDO John Larkin <jjlarkin@highlandtechnology.com> - 2016-10-12 09:20 -0700
        Re: LDO bloggs.fredbloggs.fred@gmail.com - 2016-10-13 15:52 -0700
          Re: LDO John Larkin <jjlarkin@highlandtechnology.com> - 2016-10-13 16:11 -0700
            Re: LDO bloggs.fredbloggs.fred@gmail.com - 2016-10-13 21:45 -0700
              Re: LDO John Larkin <jjlarkin@highlandtechnology.com> - 2016-10-14 09:05 -0700
    Re: LDO Tim Wescott <tim@seemywebsite.really> - 2016-10-12 11:21 -0500
      Re: LDO John Larkin <jjlarkin@highlandtechnology.com> - 2016-10-12 09:57 -0700
        Re: LDO Tim Wescott <tim@seemywebsite.really> - 2016-10-12 15:11 -0500
          Re: LDO John Larkin <jjlarkin@highlandtechnology.com> - 2016-10-12 16:11 -0700
            Re: LDO Winfield Hill <hill@rowland.harvard.edu> - 2016-10-13 04:52 -0700
              Re: LDO John Larkin <jjlarkin@highlandtechnology.com> - 2016-10-13 08:33 -0700
            Re: LDO Tim Wescott <seemywebsite@myfooter.really> - 2016-10-13 18:21 -0500
              Re: LDO John Larkin <jjlarkin@highlandtechnology.com> - 2016-10-13 20:15 -0700
                Re: LDO Tim Wescott <seemywebsite@myfooter.really> - 2016-10-14 12:35 -0500
            Re: LDO Tim Wescott <seemywebsite@myfooter.really> - 2016-10-13 18:24 -0500

Page 1 of 3  [1] 2 3  Next page →

#430957 — LDO

I need to make 1.5 volts (for DDR3 ram) from a 1.8 rail, and it was
easier to just do it from available parts than find a new regulator to
buy. Loop comp is the first wild guess, but it looks fine. At 0.3
volts drain-source, the mosfet is acting like a variable resistor.




Version 4
SHEET 1 1080 680
WIRE -48 -32 -144 -32
WIRE 336 -32 256 -32
WIRE 512 -32 336 -32
WIRE -144 -16 -144 -32
WIRE -48 0 -48 -32
WIRE 512 16 512 -32
WIRE -240 128 -272 128
WIRE -112 128 -176 128
WIRE 0 128 -32 128
WIRE 256 128 256 -32
WIRE 512 128 512 96
WIRE -144 176 -144 64
WIRE -432 192 -464 192
WIRE -384 192 -432 192
WIRE -272 192 -272 128
WIRE -272 192 -304 192
WIRE -176 192 -272 192
WIRE 0 208 0 128
WIRE 0 208 -112 208
WIRE 48 208 0 208
WIRE 208 208 128 208
WIRE -176 224 -272 224
WIRE -432 272 -464 272
WIRE -384 272 -432 272
WIRE -272 272 -272 224
WIRE -272 272 -304 272
WIRE 256 288 256 224
WIRE 400 288 256 288
WIRE 448 288 400 288
WIRE 496 288 448 288
WIRE 656 288 576 288
WIRE 800 288 656 288
WIRE 848 288 800 288
WIRE 880 288 848 288
WIRE -272 304 -272 272
WIRE -144 304 -144 240
WIRE 656 320 656 288
WIRE 448 336 448 288
WIRE 800 336 800 288
WIRE -272 448 -272 384
WIRE 448 464 448 400
WIRE 656 464 656 400
WIRE 800 464 800 416
FLAG 448 464 0
FLAG 400 288 OUT
FLAG 512 128 0
FLAG -48 0 0
FLAG -432 192 OUT
FLAG -272 448 0
FLAG 800 464 0
FLAG 656 464 0
FLAG 848 288 LOAD
FLAG -144 304 0
FLAG 336 -32 1.8
FLAG -432 272 1.8
SYMBOL cap 432 336 R0
WINDOW 0 -77 13 Left 2
WINDOW 3 -79 45 Left 2
SYMATTR InstName C2
SYMATTR Value 47µ
SYMBOL voltage 512 0 R0
WINDOW 0 56 41 Left 2
WINDOW 3 54 80 Left 2
SYMATTR InstName V1
SYMATTR Value 1.8
SYMBOL Opamps\\UniversalOpamp2 -144 208 R0
WINDOW 0 73 45 Left 2
SYMATTR InstName U1
SYMATTR Value2 Avol=1Meg GBW=8Meg Slew=10Meg
SYMBOL res 144 192 R90
WINDOW 0 76 52 VBottom 2
WINDOW 3 84 52 VTop 2
SYMATTR InstName R2
SYMATTR Value 22
SYMBOL voltage -144 80 R180
WINDOW 0 55 81 Left 2
WINDOW 3 56 50 Left 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res -288 176 R90
WINDOW 0 -51 51 VBottom 2
WINDOW 3 -43 53 VTop 2
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL cap -176 112 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 10n
SYMBOL res -16 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 100k
SYMBOL current 800 336 R0
WINDOW 3 -175 -104 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PULSE(0 0.3 300m 0 0 100m)
SYMATTR InstName I2
SYMBOL res 480 304 R270
WINDOW 0 82 55 VTop 2
WINDOW 3 73 55 VBottom 2
SYMATTR InstName R6
SYMATTR Value 1m
SYMBOL nmos 208 128 R0
WINDOW 0 124 30 Left 2
WINDOW 3 85 72 Left 2
SYMATTR InstName M1
SYMATTR Value NTLMS4504N
SYMBOL res 640 304 R0
WINDOW 0 -63 62 Left 2
WINDOW 3 -59 97 Left 2
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL res -288 288 R0
WINDOW 0 52 74 Left 2
WINDOW 3 51 107 Left 2
SYMATTR InstName R4
SYMATTR Value 5K
SYMBOL res -288 256 R90
WINDOW 0 70 62 VBottom 2
WINDOW 3 76 63 VTop 2
SYMATTR InstName R7
SYMATTR Value 1K
TEXT 696 112 Left 2 !.tran 500m uic
TEXT 696 0 Left 2 ;1.8 to 1.5 LDO
TEXT 688 48 Left 2 ;JL  Oct 11, 2016
TEXT 104 72 Left 2 ;IRLM6344
TEXT 120 112 Left 2 ;SOT23
TEXT -96 288 Left 2 ;NCS2005
TEXT -96 320 Left 2 ;SOT23
TEXT 344 416 Left 2 ;1206

-- 

John Larkin         Highland Technology, Inc

lunatic fringe electronics 

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#430964

Hello John,
>
> I need to make 1.5 volts (for DDR3 ram) from a 1.8 rail, and it was
> easier to just do it from available parts than find a new regulator to
> buy. Loop comp is the first wild guess, but it looks fine. At 0.3
> volts drain-source, the mosfet is acting like a variable resistor.
>

I love simulations. What would make me a little bit nervous is the small 
oscillation at ~235kHz.
Doubling the output C silences it but I tried to add small C's here and 
there and it only got worse. Not even the frequency changes notably.
So I wonder what determines the frequency? The rise time of the OpAmp?
A better idea how to silence it anyone?

Cheers

Robert

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#430998

On Wed, 12 Oct 2016 09:49:36 +0200, Robert Loos <1209@baer-gmbh.com>
wrote:

>Hello John,
>>
>> I need to make 1.5 volts (for DDR3 ram) from a 1.8 rail, and it was
>> easier to just do it from available parts than find a new regulator to
>> buy. Loop comp is the first wild guess, but it looks fine. At 0.3
>> volts drain-source, the mosfet is acting like a variable resistor.
>>
>
>I love simulations. What would make me a little bit nervous is the small 
>oscillation at ~235kHz.

I don't see an oscillation in my sim. Maybe you have different Spice
settings; LT spice is a speed demon and it can be quirky.

It will oscillate in my sim if R5 is doubled, which is cutting things
close. But then a tiny bit of added ESR in C2 fixes it again.

The transient load regulation is super good, so the loop is needlessly
hot. 1 uF and 20K is more prudent, and those values are already on the
BOM.

The DDR3 ram will probably pull current in short bursts, as CPU cache
is topped off. The 47uF ceramic cap helps; I could put two of them on
the board for luck.



>Doubling the output C silences it but I tried to add small C's here and 
>there and it only got worse. Not even the frequency changes notably.
>So I wonder what determines the frequency? The rise time of the OpAmp?
>A better idea how to silence it anyone?
>
>Cheers
>
>Robert

-- 

John Larkin         Highland Technology, Inc

lunatic fringe electronics 

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#431071

On 10/12/2016 11:31 AM, John Larkin wrote:
> On Wed, 12 Oct 2016 09:49:36 +0200, Robert Loos <1209@baer-gmbh.com>
> wrote:
>
>> Hello John,
>>>
>>> I need to make 1.5 volts (for DDR3 ram) from a 1.8 rail, and it was
>>> easier to just do it from available parts than find a new regulator to
>>> buy. Loop comp is the first wild guess, but it looks fine. At 0.3
>>> volts drain-source, the mosfet is acting like a variable resistor.
>>>
>>
>> I love simulations. What would make me a little bit nervous is the small
>> oscillation at ~235kHz.
>
> I don't see an oscillation in my sim. Maybe you have different Spice
> settings; LT spice is a speed demon and it can be quirky.

For anything other than messing with the included LTSpice switcher 
models, I believe it's best to have "alternate solver" selected for 
accurate results.

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#431088

On 10/12/2016 10:31 AM, John Larkin wrote:
> On Wed, 12 Oct 2016 09:49:36 +0200, Robert Loos <1209@baer-gmbh.com>
> wrote:
>
>> Hello John,
>>>
>>> I need to make 1.5 volts (for DDR3 ram) from a 1.8 rail, and it was
>>> easier to just do it from available parts than find a new regulator to
>>> buy. Loop comp is the first wild guess, but it looks fine. At 0.3
>>> volts drain-source, the mosfet is acting like a variable resistor.
>>>
>>
>> I love simulations. What would make me a little bit nervous is the small
>> oscillation at ~235kHz.
>
> I don't see an oscillation in my sim. Maybe you have different Spice
> settings; LT spice is a speed demon and it can be quirky.
>
> It will oscillate in my sim if R5 is doubled, which is cutting things
> close. But then a tiny bit of added ESR in C2 fixes it again.
>
> The transient load regulation is super good, so the loop is needlessly
> hot. 1 uF and 20K is more prudent, and those values are already on the
> BOM.
>
> The DDR3 ram will probably pull current in short bursts, as CPU cache
> is topped off. The 47uF ceramic cap helps; I could put two of them on
> the board for luck.
>
>
>
>> Doubling the output C silences it but I tried to add small C's here and
>> there and it only got worse. Not even the frequency changes notably.
>> So I wonder what determines the frequency? The rise time of the OpAmp?
>> A better idea how to silence it anyone?
>>
>> Cheers
>>
>> Robert
>

Hey, John, try this setting to see the oscillations:
.tran 0 500m 10m 10u uic

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#431107

On Thu, 13 Oct 2016 06:16:10 -0500, John S <Sophi.2@invalid.org>
wrote:

>On 10/12/2016 10:31 AM, John Larkin wrote:
>> On Wed, 12 Oct 2016 09:49:36 +0200, Robert Loos <1209@baer-gmbh.com>
>> wrote:
>>
>>> Hello John,
>>>>
>>>> I need to make 1.5 volts (for DDR3 ram) from a 1.8 rail, and it was
>>>> easier to just do it from available parts than find a new regulator to
>>>> buy. Loop comp is the first wild guess, but it looks fine. At 0.3
>>>> volts drain-source, the mosfet is acting like a variable resistor.
>>>>
>>>
>>> I love simulations. What would make me a little bit nervous is the small
>>> oscillation at ~235kHz.
>>
>> I don't see an oscillation in my sim. Maybe you have different Spice
>> settings; LT spice is a speed demon and it can be quirky.
>>
>> It will oscillate in my sim if R5 is doubled, which is cutting things
>> close. But then a tiny bit of added ESR in C2 fixes it again.
>>
>> The transient load regulation is super good, so the loop is needlessly
>> hot. 1 uF and 20K is more prudent, and those values are already on the
>> BOM.
>>
>> The DDR3 ram will probably pull current in short bursts, as CPU cache
>> is topped off. The 47uF ceramic cap helps; I could put two of them on
>> the board for luck.
>>
>>
>>
>>> Doubling the output C silences it but I tried to add small C's here and
>>> there and it only got worse. Not even the frequency changes notably.
>>> So I wonder what determines the frequency? The rise time of the OpAmp?
>>> A better idea how to silence it anyone?
>>>
>>> Cheers
>>>
>>> Robert
>>
>
>Hey, John, try this setting to see the oscillations:
>.tran 0 500m 10m 10u uic

If you let LT Spice pick the time step, it doesn't oscillate!


-- 

John Larkin         Highland Technology, Inc

lunatic fringe electronics 

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#431116

On Thursday, October 13, 2016 at 5:08:51 PM UTC+2, John Larkin wrote:
> On Thu, 13 Oct 2016 06:16:10 -0500, John S <Sophi.2@invalid.org>
> wrote:
> 
> >On 10/12/2016 10:31 AM, John Larkin wrote:
> >> On Wed, 12 Oct 2016 09:49:36 +0200, Robert Loos <1209@baer-gmbh.com>
> >> wrote:
> >>
> >>> Hello John,
> >>>>
> >>>> I need to make 1.5 volts (for DDR3 ram) from a 1.8 rail, and it was
> >>>> easier to just do it from available parts than find a new regulator to
> >>>> buy. Loop comp is the first wild guess, but it looks fine. At 0.3
> >>>> volts drain-source, the mosfet is acting like a variable resistor.
> >>>>
> >>>
> >>> I love simulations. What would make me a little bit nervous is the small
> >>> oscillation at ~235kHz.
> >>
> >> I don't see an oscillation in my sim. Maybe you have different Spice
> >> settings; LT spice is a speed demon and it can be quirky.
> >>
> >> It will oscillate in my sim if R5 is doubled, which is cutting things
> >> close. But then a tiny bit of added ESR in C2 fixes it again.
> >>
> >> The transient load regulation is super good, so the loop is needlessly
> >> hot. 1 uF and 20K is more prudent, and those values are already on the
> >> BOM.
> >>
> >> The DDR3 ram will probably pull current in short bursts, as CPU cache
> >> is topped off. The 47uF ceramic cap helps; I could put two of them on
> >> the board for luck.
> >>
> >>
> >>
> >>> Doubling the output C silences it but I tried to add small C's here and
> >>> there and it only got worse. Not even the frequency changes notably.
> >>> So I wonder what determines the frequency? The rise time of the OpAmp?
> >>> A better idea how to silence it anyone?
> >>>
> >>> Cheers
> >>>
> >>> Robert
> >>
> >
> >Hey, John, try this setting to see the oscillations:
> >.tran 0 500m 10m 10u uic
> 
> If you let LT Spice pick the time step, it doesn't oscillate!
> 
I used the original LTSpice file you showed in ascii form, and didn't change anything, and it oscilates

Why would your simulation not do that? It cannot be a machine thing, it's really apparent (several hundreds of millivolts on the gate of the MOSFET)

Cheers

Klaus

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#431119

On Thu, 13 Oct 2016 08:57:08 -0700 (PDT), Klaus Kragelund
<klauskvik@hotmail.com> wrote:

>On Thursday, October 13, 2016 at 5:08:51 PM UTC+2, John Larkin wrote:
>> On Thu, 13 Oct 2016 06:16:10 -0500, John S <Sophi.2@invalid.org>
>> wrote:
>> 
>> >On 10/12/2016 10:31 AM, John Larkin wrote:
>> >> On Wed, 12 Oct 2016 09:49:36 +0200, Robert Loos <1209@baer-gmbh.com>
>> >> wrote:
>> >>
>> >>> Hello John,
>> >>>>
>> >>>> I need to make 1.5 volts (for DDR3 ram) from a 1.8 rail, and it was
>> >>>> easier to just do it from available parts than find a new regulator to
>> >>>> buy. Loop comp is the first wild guess, but it looks fine. At 0.3
>> >>>> volts drain-source, the mosfet is acting like a variable resistor.
>> >>>>
>> >>>
>> >>> I love simulations. What would make me a little bit nervous is the small
>> >>> oscillation at ~235kHz.
>> >>
>> >> I don't see an oscillation in my sim. Maybe you have different Spice
>> >> settings; LT spice is a speed demon and it can be quirky.
>> >>
>> >> It will oscillate in my sim if R5 is doubled, which is cutting things
>> >> close. But then a tiny bit of added ESR in C2 fixes it again.
>> >>
>> >> The transient load regulation is super good, so the loop is needlessly
>> >> hot. 1 uF and 20K is more prudent, and those values are already on the
>> >> BOM.
>> >>
>> >> The DDR3 ram will probably pull current in short bursts, as CPU cache
>> >> is topped off. The 47uF ceramic cap helps; I could put two of them on
>> >> the board for luck.
>> >>
>> >>
>> >>
>> >>> Doubling the output C silences it but I tried to add small C's here and
>> >>> there and it only got worse. Not even the frequency changes notably.
>> >>> So I wonder what determines the frequency? The rise time of the OpAmp?
>> >>> A better idea how to silence it anyone?
>> >>>
>> >>> Cheers
>> >>>
>> >>> Robert
>> >>
>> >
>> >Hey, John, try this setting to see the oscillations:
>> >.tran 0 500m 10m 10u uic
>> 
>> If you let LT Spice pick the time step, it doesn't oscillate!
>> 
>I used the original LTSpice file you showed in ascii form, and didn't change anything, and it oscilates
>
>Why would your simulation not do that? It cannot be a machine thing, it's really apparent (several hundreds of millivolts on the gate of the MOSFET)
>
>Cheers
>
>Klaus

Could be one of the many global settings. It's easily fixed, anyhow.




-- 

John Larkin         Highland Technology, Inc

lunatic fringe electronics 

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#431125

On Thu, 13 Oct 2016 08:57:08 -0700 (PDT), Klaus Kragelund
<klauskvik@hotmail.com> wrote:

>On Thursday, October 13, 2016 at 5:08:51 PM UTC+2, John Larkin wrote:
[snip]
>> 
>> If you let LT Spice pick the time step, it doesn't oscillate!

That ought to raise a red flag in your mind.

>> 
>I used the original LTSpice file you showed in ascii form, and didn't change anything, and it oscilates
>
>Why would your simulation not do that? It cannot be a machine thing, it's really apparent (several hundreds of millivolts on the gate of the MOSFET)
>
>Cheers
>
>Klaus

Always set Solver = Alternate to avoid missed oscillations.  Otherwise
LTspice runs faster than any other simulator, conveniently skipping
over embarrassing anomalies.
		
                                        ...Jim Thompson
-- 
| James E.Thompson                                 |    mens     |
| Analog Innovations                               |     et      |
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    |
| STV, Queen Creek, AZ 85142    Skype: skypeanalog |             |
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
| E-mail Icon at http://www.analog-innovations.com |    1962     |

             I'm looking for work... see my website.

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#431201

On Thursday, October 13, 2016 at 6:26:31 PM UTC+2, Jim Thompson wrote:
> On Thu, 13 Oct 2016 08:57:08 -0700 (PDT), Klaus Kragelund
> <klauskvik@hotmail.com> wrote:
> 
> >On Thursday, October 13, 2016 at 5:08:51 PM UTC+2, John Larkin wrote:
> [snip]
> >> 
> >> If you let LT Spice pick the time step, it doesn't oscillate!
> 
> That ought to raise a red flag in your mind.
> 
> >> 
> >I used the original LTSpice file you showed in ascii form, and didn't change anything, and it oscilates
> >
> >Why would your simulation not do that? It cannot be a machine thing, it's really apparent (several hundreds of millivolts on the gate of the MOSFET)
> >
> >Cheers
> >
> >Klaus
> 
> Always set Solver = Alternate to avoid missed oscillations.  Otherwise
> LTspice runs faster than any other simulator, conveniently skipping
> over embarrassing anomalies.
> 		
The same goes for Pspice. You need to actively think about the circuit and the maximum time step you can defend, otherwise fast transients and oscillations may be overlooked

Cheers

Klaus

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#431206

On Fri, 14 Oct 2016 04:38:45 -0700 (PDT), Klaus Kragelund
<klauskvik@hotmail.com> wrote:

>On Thursday, October 13, 2016 at 6:26:31 PM UTC+2, Jim Thompson wrote:
>> On Thu, 13 Oct 2016 08:57:08 -0700 (PDT), Klaus Kragelund
>> <klauskvik@hotmail.com> wrote:
>> 
>> >On Thursday, October 13, 2016 at 5:08:51 PM UTC+2, John Larkin wrote:
>> [snip]
>> >> 
>> >> If you let LT Spice pick the time step, it doesn't oscillate!
>> 
>> That ought to raise a red flag in your mind.
>> 
>> >> 
>> >I used the original LTSpice file you showed in ascii form, and didn't change anything, and it oscilates
>> >
>> >Why would your simulation not do that? It cannot be a machine thing, it's really apparent (several hundreds of millivolts on the gate of the MOSFET)
>> >
>> >Cheers
>> >
>> >Klaus
>> 
>> Always set Solver = Alternate to avoid missed oscillations.  Otherwise
>> LTspice runs faster than any other simulator, conveniently skipping
>> over embarrassing anomalies.
>> 		
>The same goes for Pspice. You need to actively think about the circuit and the maximum time step you can defend, otherwise fast transients and oscillations may be overlooked
>
>Cheers
>
>Klaus

In LTspice the "solver" is an extra issue besides choosing a
time-step.
		
                                        ...Jim Thompson
-- 
| James E.Thompson                                 |    mens     |
| Analog Innovations                               |     et      |
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    |
| STV, Queen Creek, AZ 85142    Skype: skypeanalog |             |
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
| E-mail Icon at http://www.analog-innovations.com |    1962     |

             I'm looking for work... see my website.

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#431037

On Wednesday, 12 October 2016 09:54:42 UTC+2, Robert Loos  wrote:
> Hello John,
> >
> > I need to make 1.5 volts (for DDR3 ram) from a 1.8 rail, and it was
> > easier to just do it from available parts than find a new regulator to
> > buy. Loop comp is the first wild guess, but it looks fine. At 0.3
> > volts drain-source, the mosfet is acting like a variable resistor.
> >
> 
> I love simulations. What would make me a little bit nervous is the small 
> oscillation at ~235kHz.
I get the same oscillation. It gets a lot worse when the load kicks in at 300ms

If one add a feedback capacitor from the opamp output to the inverting input of 100pF, the oscillation disappears completely. That's the normal way to compensate an LDO, at least how I normally do it :-)

Cheers

Klaus

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#431045

On Wed, 12 Oct 2016 14:35:09 -0700 (PDT), klaus.kragelund@gmail.com
wrote:

>On Wednesday, 12 October 2016 09:54:42 UTC+2, Robert Loos  wrote:
>> Hello John,
>> >
>> > I need to make 1.5 volts (for DDR3 ram) from a 1.8 rail, and it was
>> > easier to just do it from available parts than find a new regulator to
>> > buy. Loop comp is the first wild guess, but it looks fine. At 0.3
>> > volts drain-source, the mosfet is acting like a variable resistor.
>> >
>> 
>> I love simulations. What would make me a little bit nervous is the small 
>> oscillation at ~235kHz.
>I get the same oscillation. It gets a lot worse when the load kicks in at 300ms

My sim doesn't oscillate, but there's not much safety margin.

>
>If one add a feedback capacitor from the opamp output to the inverting input of 100pF, the oscillation disappears completely. That's the normal way to compensate an LDO, at least how I normally do it :-)
>
>Cheers
>
>Klaus

It looks good with a tweak to the feedback RC: 50K + 1 uF. As I said,
the initial loop comp was a wild guess.

Giant ceramic caps have become affordable, things like 47u or 100u,
6.3 volts, 1206, so lots of output cap removes responsibility from the
control loop.



-- 

John Larkin         Highland Technology, Inc
picosecond timing   precision measurement 

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com

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#431081

Am 12.10.2016 um 23:35 schrieb klaus.kragelund@gmail.com:

>> I love simulations. What would make me a little bit nervous is the small
>> oscillation at ~235kHz.
> I get the same oscillation. It gets a lot worse when the load kicks in at 300ms
>
> If one add a feedback capacitor from the opamp output to the inverting input of 100pF,
> the oscillation disappears completely. That's the normal way to compensate an LDO,
 > at least how I normally do it :-)

Yes, it is silent then. Reducing the value of R5 also does the job.
I'd like to mention that the load 'step' in this simulation is _very_ 
soft (it takes 10ms to linearly rise the current). DDR RAM would be much 
faster.
If I specify a rise and fall time of 10ns you can see the step in the 
output and further reduction of R5 becomes necessary.
I've set R5=33k and C3=100p and it's ok. With R5=50k it is only silent 
until the load comes in.

Cheers

Robert

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#431040

On Wed, 12 Oct 2016 09:49:36 +0200, Robert Loos <1209@baer-gmbh.com>
wrote:

>Hello John,
>>
>> I need to make 1.5 volts (for DDR3 ram) from a 1.8 rail, and it was
>> easier to just do it from available parts than find a new regulator to
>> buy. Loop comp is the first wild guess, but it looks fine. At 0.3
>> volts drain-source, the mosfet is acting like a variable resistor.
>>
>
>I love simulations. What would make me a little bit nervous is the small 
>oscillation at ~235kHz.
>Doubling the output C silences it but I tried to add small C's here and 
>there and it only got worse. Not even the frequency changes notably.
>So I wonder what determines the frequency? The rise time of the OpAmp?
>A better idea how to silence it anyone?
>
>Cheers
>
>Robert

Just use a TLV431 with the NMOS... why make it complicated?
		
                                        ...Jim Thompson
-- 
| James E.Thompson                                 |    mens     |
| Analog Innovations                               |     et      |
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    |
| STV, Queen Creek, AZ 85142    Skype: skypeanalog |             |
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
| E-mail Icon at http://www.analog-innovations.com |    1962     |

                          In Memoriam...
                       James Ralph Thompson
                October 12, 1918 - November 7, 2008

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#431044

On Wed, 12 Oct 2016 15:08:25 -0700, Jim Thompson
<To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote:

>On Wed, 12 Oct 2016 09:49:36 +0200, Robert Loos <1209@baer-gmbh.com>
>wrote:
>
>>Hello John,
>>>
>>> I need to make 1.5 volts (for DDR3 ram) from a 1.8 rail, and it was
>>> easier to just do it from available parts than find a new regulator to
>>> buy. Loop comp is the first wild guess, but it looks fine. At 0.3
>>> volts drain-source, the mosfet is acting like a variable resistor.
>>>
>>
>>I love simulations. What would make me a little bit nervous is the small 
>>oscillation at ~235kHz.
>>Doubling the output C silences it but I tried to add small C's here and 
>>there and it only got worse. Not even the frequency changes notably.
>>So I wonder what determines the frequency? The rise time of the OpAmp?
>>A better idea how to silence it anyone?
>>
>>Cheers
>>
>>Robert
>
>Just use a TLV431 with the NMOS... why make it complicated?
>		
>                                        ...Jim Thompson

Post the sim and I'll consider it. But we don't stock the LTV, and I'd
rather use parts that we have.


-- 

John Larkin         Highland Technology, Inc
picosecond timing   precision measurement 

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com

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#431084

John Larkin wrote...
> Jim Thompson wrote:
>
>> Just use a TLV431 with the NMOS... why make it complicated?
>
> Post the sim and I'll consider it. But we don't stock
> the LTV, and I'd rather use parts that we have.

 What, no 1.25V versions of the ubiquitous TL431?
 Choose between LMV431, TLV431, ZTLV431, in sot-23
 package; in this case save three parts!  Featured
 heavily in AoE III, and Table 9.7.  Reminder for
 new readers, free copy, http://artofelectronics.net/

 John, there's an ugly 200mV 50us overshoot at startup. 
 But you can eliminate that with a 10n cap across R4.


-- 
 Thanks,
    - Win

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#431109

On 13 Oct 2016 03:28:25 -0700, Winfield Hill
<hill@rowland.harvard.edu> wrote:

>John Larkin wrote...
>> Jim Thompson wrote:
>>
>>> Just use a TLV431 with the NMOS... why make it complicated?
>>
>> Post the sim and I'll consider it. But we don't stock
>> the LTV, and I'd rather use parts that we have.
>
> What, no 1.25V versions of the ubiquitous TL431?
> Choose between LMV431, TLV431, ZTLV431, in sot-23
> package; in this case save three parts!  Featured
> heavily in AoE III, and Table 9.7.  Reminder for
> new readers, free copy, http://artofelectronics.net/


We do have some LM4041-adj parts. Sort of similar. I prefer the opamp
version, partly because my parts are on the BOM already. We are trying
to pick-and-place the board with a single feeder setup, which is yet
another complicating design constraint.

>
> John, there's an ugly 200mV 50us overshoot at startup. 
> But you can eliminate that with a 10n cap across R4.

The power supplies soft-start, and a 200 mV overshoot wouldn't damage
anything anyhow. I have 13 distinct power rails on this board so far
(23 by another way of counting) and sequencing is getting interesting.




-- 

John Larkin         Highland Technology, Inc

lunatic fringe electronics 

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#431093

On 12/10/2016 08:49, Robert Loos wrote:
> I love simulations. What would make me a little bit nervous is the small
> oscillation at ~235kHz.
> Doubling the output C silences it but I tried to add small C's here and
> there and it only got worse. Not even the frequency changes notably.
> So I wonder what determines the frequency? The rise time of the OpAmp?
> A better idea how to silence it anyone?
>
> Cheers
>
> Robert

As posted the circuit is fine just the gain is too high, reduce R5
(my guess is 10k?) and it should be OK.

piglet

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#431095

piglet wrote...
>
>On 12/10/2016 08:49, Robert Loos wrote:
>> I love simulations. What would make me a little bit nervous is the small
>> oscillation at ~235kHz.
>> Doubling the output C silences it but I tried to add small C's here and
>> there and it only got worse. Not even the frequency changes notably.
>> So I wonder what determines the frequency? The rise time of the OpAmp?
>> A better idea how to silence it anyone?
>
> As posted the circuit is fine just the gain is too high, reduce R5
> (my guess is 10k?) and it should be OK.

 Still overshoots at turnon.  Added 1nF fixes.


-- 
 Thanks,
    - Win

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