Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]


Groups > sci.electronics.design > #747227

hneemann's "Digital" for more than just introduction-to-EE?

Path csiph.com!eternal-september.org!feeder.eternal-september.org!nntp.eternal-september.org!.POSTED!not-for-mail
From Kragen Javier Sitaker <kragen@canonical.org>
Newsgroups sci.electronics.design
Subject hneemann's "Digital" for more than just introduction-to-EE?
Date Fri, 04 Sep 2026 22:41:45 -0300
Organization Primarily biological and memetic
Lines 27
Message-ID <87mrtw5vae.fsf@debian> (permalink)
MIME-Version 1.0
Content-Type text/plain; charset=utf-8
Content-Transfer-Encoding 8bit
Injection-Date Sat, 05 Sep 2026 01:44:03 +0000 (UTC)
Injection-Info dont-email.me; logging-data="1219344"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX1++eGhqtREuI71oZp19LNxc"; posting-host="0c32e03f7af040bb7dee8184243cc869"
User-Agent Gnus/5.13 (Gnus v5.13) Emacs/28.2 (gnu/linux)
Cancel-Lock sha1:UGJV4mMCQgKO5lOk5iA7IHAx0FA= sha1:4Ktnen8iR9QU72ygheaBsxUh8b4= sha256:Ho6GjMnnOXnlFlPaDu/se/EKFKi6pHvRRmo8FCczQC8= sha1:uJUB+GeETZQ2b6uAig80r40a2OI= sha256:L1YsxtvIiz03VMucHuoTHWgd+LCQolfLqqrcNBNBsX4=
Xref csiph.com sci.electronics.design:747227

Show key headers only | View raw


I learned last night of <https://github.com/hneemann/digital>, a poorly
named open-source system for simulating digital logic.  I haven't tried
it yet, but it seems to be intended as an improved replacement for Carl
Burch’s Logisim, especially for teaching students who are learning
digital logic for the first time.

Like Verilog, it supports propagation delays for digital gates, but all
the base propagation delays are the same.

Like LTSpice, it has a schematic-capture UI, and it includes a library
of existing chips, but they’re digital chips; they include 28C64, a lot
of the 7400 family (including the 7408, the 7414, the 74138, the 74164,
the 74165, the 74244, the 74595), but none of the CD4000 family, not
even 74HC4051 and the like.  You can add new components written in VHDL
or Verilog.

It purports to have reasonable simulation performance: “The example
processor can be clocked at 120 kHz,” on a 2.6GHz i5-32320M.

And it can export configurations for PALs, CPLDs, the Artix 7 (on the
Basys 3 board), and the iCE40LP8K (on the TinyFPGA BX board), as well as
exporting VHDL or Verilog.

This seems like it might be usable for tasks beyond just student
exercises?  Has anybody here tried it?

Kragen

Back to sci.electronics.design | Previous | Next — Next in thread | Find similar | Unroll thread


Thread

hneemann's "Digital" for more than just introduction-to-EE? Kragen Javier Sitaker <kragen@canonical.org> - 2026-09-04 22:41 -0300
  Re: hneemann's "Digital" for more than just introduction-to-EE? Don Y <blockedofcourse@foo.invalid> - 2026-09-05 07:11 -0700
  Re: hneemann's "Digital" for more than just introduction-to-EE? john larkin <jl@glen--canyon.com> - 2026-09-05 09:45 -0700
    Re: hneemann's "Digital" for more than just introduction-to-EE? Cóilín Nioclásín Glostéir <thanks-to@Taf.com> - 2026-09-05 21:41 +0000
      Re: hneemann's "Digital" for more than just introduction-to-EE? john larkin <jl@glen--canyon.com> - 2026-09-05 17:23 -0700
        Re: hneemann's "Digital" for more than just introduction-to-EE? someone <2a59d59e3809f827ce709d3815e3950eef4a6a93af5557a93a7fdfba71460843@example.com> - 2026-09-09 17:45 +0000
          AI code and circuit designs (was Re: hneemann's "Digital" for more than just introduction-to-EE?) Kragen Javier Sitaker <kragen@canonical.org> - 2026-09-10 02:39 -0300
            Re: AI code and circuit designs (was Re: hneemann's "Digital" for more than just introduction-to-EE?) Don Y <blockedofcourse@foo.invalid> - 2026-09-09 23:19 -0700
  Re: hneemann's "Digital" for more than just introduction-to-EE? Cóilín Nioclásín Glostéir <thanks-to@Taf.com> - 2026-09-05 18:59 +0000
  Re: hneemann's "Digital" for more than just introduction-to-EE? someone <2a59d59e3809f827ce709d3815e3950eef4a6a93af5557a93a7fdfba71460843@example.com> - 2026-09-09 17:45 +0000
    Re: hneemann's "Digital" for more than just introduction-to-EE? Kragen Javier Sitaker <kragen@canonical.org> - 2026-09-10 03:19 -0300

csiph-web