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[PATCH v4 0/2] add thermal nodes for UniPhier SoCs

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  [PATCH v4 0/2] add thermal nodes for UniPhier SoCs Kunihiko Hayashi <hayashi.kunihiko@socionext.com> - 2017-09-04 03:20 +0200
    [PATCH v4 2/2] arm64: dts: uniphier: add nodes of thermal monitor and thermal zone for LD20 Kunihiko Hayashi <hayashi.kunihiko@socionext.com> - 2017-09-04 03:20 +0200
    Re: [PATCH v4 0/2] add thermal nodes for UniPhier SoCs Masahiro Yamada <yamada.masahiro@socionext.com> - 2017-09-04 04:20 +0200
      Re: [PATCH v4 0/2] add thermal nodes for UniPhier SoCs <hayashi.kunihiko@socionext.com> - 2017-09-04 06:00 +0200

#1725798 — [PATCH v4 0/2] add thermal nodes for UniPhier SoCs

This series adds thermal nodes for UniPhier PXs2 and LD20 SoCs.

Changes since v3:
- rebase on top of linux-next

Changes since v2:
- add the calibration value to device tree for LD20 reference board

Changes since v1:
- separate from driver's patchset[1]
- add cooling-maps nodes on the device tree
- fix an interrupt trigger to set 'level-triggered' according to
  hardware specification
- bring up threshold temperature for LD20 according to the spec sheet
- add cpuN labels for reference in cooling-device property on PXs2 dts

[1] https://lkml.org/lkml/2017/6/28/170

Kunihiko Hayashi (2):
  ARM: dts: uniphier: add nodes of thermal monitor and thermal zone for
    PXs2
  arm64: dts: uniphier: add nodes of thermal monitor and thermal zone
    for LD20

 arch/arm/boot/dts/uniphier-pxs2.dtsi               | 43 ++++++++++++++++++++--
 .../arm64/boot/dts/socionext/uniphier-ld20-ref.dts |  4 ++
 arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi   | 40 ++++++++++++++++++++
 3 files changed, 83 insertions(+), 4 deletions(-)

-- 
2.7.4

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#1725800 — [PATCH v4 2/2] arm64: dts: uniphier: add nodes of thermal monitor and thermal zone for LD20

Add nodes of thermal monitor and thermal zone for UniPhier LD20 SoC.
The thermal monitor is included in sysctrl.

Furthermore, since the reference board doesn't have a calibrated value of
thermal monitor, this patch gives the default value for LD20 reference
board.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
 .../arm64/boot/dts/socionext/uniphier-ld20-ref.dts |  4 +++
 arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi   | 40 ++++++++++++++++++++++
 2 files changed, 44 insertions(+)

diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20-ref.dts b/arch/arm64/boot/dts/socionext/uniphier-ld20-ref.dts
index 1ca0c86..5bb63a2 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld20-ref.dts
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld20-ref.dts
@@ -50,3 +50,7 @@
 &i2c0 {
 	status = "okay";
 };
+
+&pvtctl {
+	socionext,tmod-calibration = <0x0f22 0x68ee>;
+};
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
index a29c279..0f733ad 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
@@ -46,6 +46,7 @@
 			clocks = <&sys_clk 32>;
 			enable-method = "psci";
 			operating-points-v2 = <&cluster0_opp>;
+			#cooling-cells = <2>;
 		};
 
 		cpu1: cpu@1 {
@@ -64,6 +65,7 @@
 			clocks = <&sys_clk 33>;
 			enable-method = "psci";
 			operating-points-v2 = <&cluster1_opp>;
+			#cooling-cells = <2>;
 		};
 
 		cpu3: cpu@101 {
@@ -173,6 +175,38 @@
 			     <1 10 4>;
 	};
 
+	thermal-zones {
+		cpu_thermal {
+			polling-delay-passive = <250>;	/* 250ms */
+			polling-delay = <1000>;		/* 1000ms */
+			thermal-sensors = <&pvtctl>;
+
+			trips {
+				cpu_crit: cpu_crit {
+					temperature = <110000>;	/* 110C */
+					hysteresis = <2000>;
+					type = "critical";
+				};
+				cpu_alert: cpu_alert {
+					temperature = <100000>;	/* 100C */
+					hysteresis = <2000>;
+					type = "passive";
+				};
+			};
+
+			cooling-maps {
+				map0 {
+					trip = <&cpu_alert>;
+					cooling-device = <&cpu0 (-1) (-1)>;
+				};
+				map1 {
+					trip = <&cpu_alert>;
+					cooling-device = <&cpu2 (-1) (-1)>;
+				};
+			};
+		};
+	};
+
 	soc@0 {
 		compatible = "simple-bus";
 		#address-cells = <1>;
@@ -410,6 +444,12 @@
 			watchdog {
 				compatible = "socionext,uniphier-wdt";
 			};
+
+			pvtctl: pvtctl {
+				compatible = "socionext,uniphier-ld20-thermal";
+				interrupts = <0 3 4>;
+				#thermal-sensor-cells = <0>;
+			};
 		};
 
 		nand: nand@68000000 {
-- 
2.7.4

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#1725810

Hi.



2017-09-04 10:16 GMT+09:00 Kunihiko Hayashi <hayashi.kunihiko@socionext.com>:
> This series adds thermal nodes for UniPhier PXs2 and LD20 SoCs.
>
> Changes since v3:
> - rebase on top of linux-next


This repost is a spam.

I left some comments in v3,
but no response from you
nothing was reflected in v4.




> Changes since v2:
> - add the calibration value to device tree for LD20 reference board
>
> Changes since v1:
> - separate from driver's patchset[1]
> - add cooling-maps nodes on the device tree
> - fix an interrupt trigger to set 'level-triggered' according to
>   hardware specification
> - bring up threshold temperature for LD20 according to the spec sheet
> - add cpuN labels for reference in cooling-device property on PXs2 dts
>
> [1] https://lkml.org/lkml/2017/6/28/170
>
> Kunihiko Hayashi (2):
>   ARM: dts: uniphier: add nodes of thermal monitor and thermal zone for
>     PXs2
>   arm64: dts: uniphier: add nodes of thermal monitor and thermal zone
>     for LD20
>
>  arch/arm/boot/dts/uniphier-pxs2.dtsi               | 43 ++++++++++++++++++++--
>  .../arm64/boot/dts/socionext/uniphier-ld20-ref.dts |  4 ++
>  arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi   | 40 ++++++++++++++++++++
>  3 files changed, 83 insertions(+), 4 deletions(-)
>
> --
> 2.7.4
>
> --
> To unsubscribe from this list: send the line "unsubscribe devicetree" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html



-- 
Best Regards
Masahiro Yamada

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#1725827

On Mon, 4 Sep 2017 11:09:51 +0900 <yamada.masahiro@socionext.com> wrote:

> Hi.
> 
> 
> 
> 2017-09-04 10:16 GMT+09:00 Kunihiko Hayashi <hayashi.kunihiko@socionext.com>:
> > This series adds thermal nodes for UniPhier PXs2 and LD20 SoCs.
> >
> > Changes since v3:
> > - rebase on top of linux-next
> 
> 
> This repost is a spam.
> 
> I left some comments in v3,
> but no response from you
> nothing was reflected in v4.

Sorry I missed them. I'll reflect your comments and repost them.

Thank you,

> 
> 
> 
> 
> > Changes since v2:
> > - add the calibration value to device tree for LD20 reference board
> >
> > Changes since v1:
> > - separate from driver's patchset[1]
> > - add cooling-maps nodes on the device tree
> > - fix an interrupt trigger to set 'level-triggered' according to
> >   hardware specification
> > - bring up threshold temperature for LD20 according to the spec sheet
> > - add cpuN labels for reference in cooling-device property on PXs2 dts
> >
> > [1] https://lkml.org/lkml/2017/6/28/170
> >
> > Kunihiko Hayashi (2):
> >   ARM: dts: uniphier: add nodes of thermal monitor and thermal zone for
> >     PXs2
> >   arm64: dts: uniphier: add nodes of thermal monitor and thermal zone
> >     for LD20
> >
> >  arch/arm/boot/dts/uniphier-pxs2.dtsi               | 43 ++++++++++++++++++++--
> >  .../arm64/boot/dts/socionext/uniphier-ld20-ref.dts |  4 ++
> >  arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi   | 40 ++++++++++++++++++++
> >  3 files changed, 83 insertions(+), 4 deletions(-)
> >
> > --
> > 2.7.4
> >
> > --
> > To unsubscribe from this list: send the line "unsubscribe devicetree" in
> > the body of a message to majordomo@vger.kernel.org
> > More majordomo info at  http://vger.kernel.org/majordomo-info.html
> 
> 
> 
> -- 
> Best Regards
> Masahiro Yamada

---
Kunihiko Hayashi
: hayashi.kunihiko@socionext.com

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