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[patch 00/41] x86: Cleanup IDT code

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  [patch 00/41] x86: Cleanup IDT code Thomas Gleixner <tglx@linutronix.de> - 2017-08-25 13:10 +0200
    [patch 01/41] x86/irq: Remove vector_used_by_percpu_irq() Thomas Gleixner <tglx@linutronix.de> - 2017-08-25 13:10 +0200
    [patch 26/41] x86/idt: Consolidate IDT invalidation Thomas Gleixner <tglx@linutronix.de> - 2017-08-25 13:10 +0200
    [patch 06/41] x86/traps: Simplify pagefault tracing logic Thomas Gleixner <tglx@linutronix.de> - 2017-08-25 13:10 +0200
      Re: [patch 06/41] x86/traps: Simplify pagefault tracing logic Andy Lutomirski <luto@kernel.org> - 2017-08-25 17:00 +0200
      Re: [patch 06/41] x86/traps: Simplify pagefault tracing logic Steven Rostedt <rostedt@goodmis.org> - 2017-08-25 17:20 +0200
        Re: [patch 06/41] x86/traps: Simplify pagefault tracing logic Thomas Gleixner <tglx@linutronix.de> - 2017-08-25 17:20 +0200
    [patch 07/41] x86/apic: Remove the duplicated tracing version of  local_timer_interrupt Thomas Gleixner <tglx@linutronix.de> - 2017-08-25 13:10 +0200
      Re: [patch 07/41] x86/apic: Remove the duplicated tracing version  of local_timer_interrupt Steven Rostedt <rostedt@goodmis.org> - 2017-08-25 17:30 +0200
    [patch 14/41] x86/smp: Use static key for reschedule interrupt tracing Thomas Gleixner <tglx@linutronix.de> - 2017-08-25 13:10 +0200
      Re: [patch 14/41] x86/smp: Use static key for reschedule interrupt  tracing Steven Rostedt <rostedt@goodmis.org> - 2017-08-25 21:50 +0200
        Re: [patch 14/41] x86/smp: Use static key for reschedule interrupt  tracing Thomas Gleixner <tglx@linutronix.de> - 2017-08-25 22:10 +0200
          Re: [patch 14/41] x86/smp: Use static key for reschedule interrupt  tracing Steven Rostedt <rostedt@goodmis.org> - 2017-08-25 23:20 +0200
    [patch 05/41] x86/tracing: Introduce a static key for exception  tracing Thomas Gleixner <tglx@linutronix.de> - 2017-08-25 13:10 +0200
      Re: [patch 05/41] x86/tracing: Introduce a static key for exception  tracing Steven Rostedt <rostedt@goodmis.org> - 2017-08-25 17:30 +0200
    [patch 10/41] x86/apic: Remove the duplicated tracing versions of  interrupts Thomas Gleixner <tglx@linutronix.de> - 2017-08-25 13:10 +0200
      Re: [patch 10/41] x86/apic: Remove the duplicated tracing versions  of interrupts Steven Rostedt <rostedt@goodmis.org> - 2017-08-25 17:50 +0200
        Re: [patch 10/41] x86/apic: Remove the duplicated tracing versions  of interrupts Peter Zijlstra <peterz@infradead.org> - 2017-08-28 10:00 +0200
    [patch 11/41] x86/irqwork: Get rid of duplicated tracing interrupt  code Thomas Gleixner <tglx@linutronix.de> - 2017-08-25 13:10 +0200
      Re: [patch 11/41] x86/irqwork: Get rid of duplicated tracing  interrupt code Steven Rostedt <rostedt@goodmis.org> - 2017-08-25 18:00 +0200
    [patch 23/41] x86/idt: Create file for IDT related code Thomas Gleixner <tglx@linutronix.de> - 2017-08-25 13:10 +0200
    [patch 03/41] x86/irq: Move ifdeffery to header file Thomas Gleixner <tglx@linutronix.de> - 2017-08-25 13:10 +0200
      Re: [patch 03/41] x86/irq: Move ifdeffery to header file Thomas Gleixner <tglx@linutronix.de> - 2017-08-25 14:50 +0200
    [patch 24/41] x86/idt: Move 32bit idt_descr to C code Thomas Gleixner <tglx@linutronix.de> - 2017-08-25 13:10 +0200
    [patch 16/41] x86/tracing: Disentangle pagefault and resched IPI  tracing key Thomas Gleixner <tglx@linutronix.de> - 2017-08-25 13:10 +0200
    [patch 09/41] x86/irq: Get rid of duplicated trace_x86_platform_ipi()  code Thomas Gleixner <tglx@linutronix.de> - 2017-08-25 13:10 +0200
      Re: [patch 09/41] x86/irq: Get rid of duplicated  trace_x86_platform_ipi() code Steven Rostedt <rostedt@goodmis.org> - 2017-08-25 17:50 +0200
    [patch 12/41] x86/mce: Remove duplicated tracing interrupt code Thomas Gleixner <tglx@linutronix.de> - 2017-08-25 13:10 +0200
      Re: [patch 12/41] x86/mce: Remove duplicated tracing interrupt code Steven Rostedt <rostedt@goodmis.org> - 2017-08-25 18:10 +0200
        Re: [patch 12/41] x86/mce: Remove duplicated tracing interrupt  code Thomas Gleixner <tglx@linutronix.de> - 2017-08-25 18:20 +0200
    [patch 21/41] x86/gdt: Use bitfields for initialization Thomas Gleixner <tglx@linutronix.de> - 2017-08-25 13:10 +0200
    [patch 28/41] x86/idt: Move early IDT setup out of 32bit asm Thomas Gleixner <tglx@linutronix.de> - 2017-08-25 13:10 +0200
    [patch 22/41] x86/ldttss: Cleanup 32bit descriptors Thomas Gleixner <tglx@linutronix.de> - 2017-08-25 13:10 +0200
    [patch 20/41] x86: Replace access to desc_struct:a/b fields Thomas Gleixner <tglx@linutronix.de> - 2017-08-25 13:10 +0200
      Re: [patch 20/41] x86: Replace access to desc_struct:a/b fields Juergen Gross <jgross@suse.com> - 2017-08-25 13:20 +0200
      Re: [patch 20/41] x86: Replace access to desc_struct:a/b fields Boris Ostrovsky <boris.ostrovsky@oracle.com> - 2017-08-25 16:00 +0200
        Re: [patch 20/41] x86: Replace access to desc_struct:a/b fields Thomas Gleixner <tglx@linutronix.de> - 2017-08-25 16:10 +0200
          Re: [patch 20/41] x86: Replace access to desc_struct:a/b fields Steven Rostedt <rostedt@goodmis.org> - 2017-08-25 16:20 +0200
    [patch 04/41] x86/boot: Move EISA setup to a proper place Thomas Gleixner <tglx@linutronix.de> - 2017-08-25 13:10 +0200
      Re: [patch 04/41] x86/boot: Move EISA setup to a proper place Thomas Gleixner <tglx@linutronix.de> - 2017-08-25 14:00 +0200
    [patch 25/41] x86/idt: Remove unused set_trap_gate() Thomas Gleixner <tglx@linutronix.de> - 2017-08-25 13:10 +0200
    [patch 08/41] x86/apic: Use this_cpu_ptr in local_timer_interrupt Thomas Gleixner <tglx@linutronix.de> - 2017-08-25 13:10 +0200
    [patch 15/41] x86/idt: Remove tracing idt completely Thomas Gleixner <tglx@linutronix.de> - 2017-08-25 13:10 +0200
      Re: [patch 15/41] x86/idt: Remove tracing idt completely Steven Rostedt <rostedt@goodmis.org> - 2017-08-25 23:20 +0200
        Re: [patch 15/41] x86/idt: Remove tracing idt completely Thomas Gleixner <tglx@linutronix.de> - 2017-08-25 23:30 +0200
        Re: [patch 15/41] x86/idt: Remove tracing idt completely Thomas Gleixner <tglx@linutronix.de> - 2017-08-25 23:30 +0200

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#1719975 — [patch 23/41] x86/idt: Create file for IDT related code

IDT related code lives in different places. Create a new source file to
hold it.

Move the idt_tables and descriptors to it for a start. Follow up patches
will gradually move more code over.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/kernel/Makefile     |    2 +-
 arch/x86/kernel/cpu/common.c |    9 ---------
 arch/x86/kernel/idt.c        |   26 ++++++++++++++++++++++++++
 arch/x86/kernel/traps.c      |    6 ------
 4 files changed, 27 insertions(+), 16 deletions(-)

--- a/arch/x86/kernel/Makefile
+++ b/arch/x86/kernel/Makefile
@@ -42,7 +42,7 @@ CFLAGS_irq.o := -I$(src)/../include/asm/
 
 obj-y			:= process_$(BITS).o signal.o
 obj-$(CONFIG_COMPAT)	+= signal_compat.o
-obj-y			+= traps.o irq.o irq_$(BITS).o dumpstack_$(BITS).o
+obj-y			+= traps.o idt.o irq.o irq_$(BITS).o dumpstack_$(BITS).o
 obj-y			+= time.o ioport.o dumpstack.o nmi.o
 obj-$(CONFIG_MODIFY_LDT_SYSCALL)	+= ldt.o
 obj-y			+= setup.o x86_init.o i8259.o irqinit.o jump_label.o
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1289,15 +1289,6 @@ static __init int setup_disablecpuid(cha
 __setup("clearcpuid=", setup_disablecpuid);
 
 #ifdef CONFIG_X86_64
-struct desc_ptr idt_descr __ro_after_init = {
-	.size = NR_VECTORS * 16 - 1,
-	.address = (unsigned long) idt_table,
-};
-const struct desc_ptr debug_idt_descr = {
-	.size = NR_VECTORS * 16 - 1,
-	.address = (unsigned long) debug_idt_table,
-};
-
 DEFINE_PER_CPU_FIRST(union irq_stack_union,
 		     irq_stack_union) __aligned(PAGE_SIZE) __visible;
 
--- /dev/null
+++ b/arch/x86/kernel/idt.c
@@ -0,0 +1,26 @@
+/*
+ * Interrupt descriptor table related code
+ *
+ * This file is licensed under the GPL V2
+ */
+#include <linux/interrupt.h>
+
+#include <asm/desc.h>
+
+/* Must be page-aligned because the real IDT is used in a fixmap. */
+gate_desc idt_table[IDT_ENTRIES] __page_aligned_bss;
+
+#ifdef CONFIG_X86_64
+/* No need to be aligned, but done to keep all IDTs defined the same way. */
+gate_desc debug_idt_table[IDT_ENTRIES] __page_aligned_bss;
+
+struct desc_ptr idt_descr __ro_after_init = {
+	.size		= IDT_ENTRIES * 16 - 1,
+	.address	= (unsigned long) idt_table,
+};
+
+const struct desc_ptr debug_idt_descr = {
+	.size		= IDT_ENTRIES * 16 - 1,
+	.address	= (unsigned long) debug_idt_table,
+};
+#endif
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@ -65,18 +65,12 @@
 #include <asm/x86_init.h>
 #include <asm/pgalloc.h>
 #include <asm/proto.h>
-
-/* No need to be aligned, but done to keep all IDTs defined the same way. */
-gate_desc debug_idt_table[NR_VECTORS] __page_aligned_bss;
 #else
 #include <asm/processor-flags.h>
 #include <asm/setup.h>
 #include <asm/proto.h>
 #endif
 
-/* Must be page-aligned because the real IDT is used in a fixmap. */
-gate_desc idt_table[NR_VECTORS] __page_aligned_bss;
-
 DECLARE_BITMAP(used_vectors, NR_VECTORS);
 
 static inline void cond_local_irq_enable(struct pt_regs *regs)

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#1719977 — [patch 03/41] x86/irq: Move ifdeffery to header file

Having this in the middle of code is beyond ugly.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/include/asm/desc.h |    5 +++++
 arch/x86/kernel/irqinit.c   |    3 ---
 2 files changed, 5 insertions(+), 3 deletions(-)

--- a/arch/x86/include/asm/desc.h
+++ b/arch/x86/include/asm/desc.h
@@ -482,7 +482,12 @@ static inline void _set_gate(int gate, u
 				0, 0, __KERNEL_CS);			\
 	} while (0)
 
+#ifdef CONFIG_X86_LOCAL_APIC
 extern int first_system_vector;
+#else
+#define first_system_vector		NR_VECTORS
+#endif
+
 /* used_vectors is BITMAP for irq is not managed by percpu vector_irq */
 extern unsigned long used_vectors[];
 
--- a/arch/x86/kernel/irqinit.c
+++ b/arch/x86/kernel/irqinit.c
@@ -169,9 +169,6 @@ void __init native_init_IRQ(void)
 	 * 'special' SMP interrupts)
 	 */
 	i = FIRST_EXTERNAL_VECTOR;
-#ifndef CONFIG_X86_LOCAL_APIC
-#define first_system_vector NR_VECTORS
-#endif
 	for_each_clear_bit_from(i, used_vectors, first_system_vector) {
 		/* IA32_SYSCALL_VECTOR could be used in trap_init already. */
 		set_intr_gate(i, irq_entries_start +

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#1720034 — Re: [patch 03/41] x86/irq: Move ifdeffery to header file

On Fri, 25 Aug 2017, Thomas Gleixner wrote:

> Having this in the middle of code is beyond ugly.

Bah, I know why this was in the middle of the code.

I reorder the series so the whole first_system_vector nonsense gets removed
early.

Thanks,

	tglx

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#1719978 — [patch 24/41] x86/idt: Move 32bit idt_descr to C code

32bit has the idt_descr sitting in the low level assembly entry code. There
is no reason for that. Move it into the C file and use the 64bit version of
it.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/kernel/head_32.S |    6 ------
 arch/x86/kernel/idt.c     |   10 +++++-----
 2 files changed, 5 insertions(+), 11 deletions(-)

--- a/arch/x86/kernel/head_32.S
+++ b/arch/x86/kernel/head_32.S
@@ -626,7 +626,6 @@ ENTRY(initial_stack)
 
 	.data
 .globl boot_gdt_descr
-.globl idt_descr
 
 	ALIGN
 # early boot GDT descriptor (must use 1:1 address mapping)
@@ -635,11 +634,6 @@ ENTRY(initial_stack)
 	.word __BOOT_DS+7
 	.long boot_gdt - __PAGE_OFFSET
 
-	.word 0				# 32-bit align idt_desc.address
-idt_descr:
-	.word IDT_ENTRIES*8-1		# idt contains 256 entries
-	.long idt_table
-
 # boot GDT descriptor (later on used by CPU#0):
 	.word 0				# 32 bit align gdt_desc.address
 ENTRY(early_gdt_descr)
--- a/arch/x86/kernel/idt.c
+++ b/arch/x86/kernel/idt.c
@@ -10,15 +10,15 @@
 /* Must be page-aligned because the real IDT is used in a fixmap. */
 gate_desc idt_table[IDT_ENTRIES] __page_aligned_bss;
 
-#ifdef CONFIG_X86_64
-/* No need to be aligned, but done to keep all IDTs defined the same way. */
-gate_desc debug_idt_table[IDT_ENTRIES] __page_aligned_bss;
-
 struct desc_ptr idt_descr __ro_after_init = {
-	.size		= IDT_ENTRIES * 16 - 1,
+	.size		= (IDT_ENTRIES * 2 * sizeof(unsigned long)) - 1,
 	.address	= (unsigned long) idt_table,
 };
 
+#ifdef CONFIG_X86_64
+/* No need to be aligned, but done to keep all IDTs defined the same way. */
+gate_desc debug_idt_table[IDT_ENTRIES] __page_aligned_bss;
+
 const struct desc_ptr debug_idt_descr = {
 	.size		= IDT_ENTRIES * 16 - 1,
 	.address	= (unsigned long) debug_idt_table,

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#1719979 — [patch 16/41] x86/tracing: Disentangle pagefault and resched IPI tracing key

The pagefault and the resched IPI handler are the only ones where it is
worth to optimize the code further in case tracepoints are disabled. But it
makes no sense to have a single static key for both.

Seperate the static keys so the facilities are handled seperately.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/include/asm/trace/common.h      |   15 ++++++++-------
 arch/x86/include/asm/trace/exceptions.h  |    6 ++++--
 arch/x86/include/asm/trace/irq_vectors.h |   22 ++++++++++++++++------
 arch/x86/kernel/smp.c                    |    4 ++--
 arch/x86/kernel/tracepoint.c             |   27 ++++++++++++++++++++++-----
 arch/x86/mm/fault.c                      |    2 +-
 6 files changed, 53 insertions(+), 23 deletions(-)

Index: b/arch/x86/include/asm/trace/common.h
===================================================================
--- a/arch/x86/include/asm/trace/common.h
+++ b/arch/x86/include/asm/trace/common.h
@@ -1,15 +1,16 @@
 #ifndef _ASM_TRACE_COMMON_H
 #define _ASM_TRACE_COMMON_H
 
-extern int trace_irq_vector_regfunc(void);
-extern void trace_irq_vector_unregfunc(void);
-
 #ifdef CONFIG_TRACING
-DECLARE_STATIC_KEY_FALSE(trace_irqvectors_key);
-#define trace_irqvectors_enabled()			\
-	static_branch_unlikely(&trace_irqvectors_key)
+DECLARE_STATIC_KEY_FALSE(trace_pagefault_key);
+#define trace_pagefault_enabled()			\
+	static_branch_unlikely(&trace_pagefault_key)
+DECLARE_STATIC_KEY_FALSE(trace_resched_ipi_key);
+#define trace_resched_ipi_enabled()			\
+	static_branch_unlikely(&trace_resched_ipi_key)
 #else
-static inline bool trace_irqvectors_enabled(void) { return false; }
+static inline bool trace_pagefault_enabled(void) { return false; }
+static inline bool trace_resched_ipi_enabled(void) { return false; }
 #endif
 
 #endif
Index: b/arch/x86/include/asm/trace/exceptions.h
===================================================================
--- a/arch/x86/include/asm/trace/exceptions.h
+++ b/arch/x86/include/asm/trace/exceptions.h
@@ -7,6 +7,9 @@
 #include <linux/tracepoint.h>
 #include <asm/trace/common.h>
 
+extern int trace_pagefault_reg(void);
+extern void trace_pagefault_unreg(void);
+
 DECLARE_EVENT_CLASS(x86_exceptions,
 
 	TP_PROTO(unsigned long address, struct pt_regs *regs,
@@ -35,8 +38,7 @@ DEFINE_EVENT_FN(x86_exceptions, name,
 	TP_PROTO(unsigned long address,	struct pt_regs *regs,	\
 		 unsigned long error_code),			\
 	TP_ARGS(address, regs, error_code),			\
-	trace_irq_vector_regfunc,				\
-	trace_irq_vector_unregfunc);
+	trace_pagefault_reg, trace_pagefault_unreg);
 
 DEFINE_PAGE_FAULT_EVENT(page_fault_user);
 DEFINE_PAGE_FAULT_EVENT(page_fault_kernel);
Index: b/arch/x86/include/asm/trace/irq_vectors.h
===================================================================
--- a/arch/x86/include/asm/trace/irq_vectors.h
+++ b/arch/x86/include/asm/trace/irq_vectors.h
@@ -7,6 +7,9 @@
 #include <linux/tracepoint.h>
 #include <asm/trace/common.h>
 
+extern int trace_resched_ipi_reg(void);
+extern void trace_resched_ipi_unreg(void);
+
 DECLARE_EVENT_CLASS(x86_irq_vector,
 
 	TP_PROTO(int vector),
@@ -26,15 +29,22 @@ DECLARE_EVENT_CLASS(x86_irq_vector,
 #define DEFINE_IRQ_VECTOR_EVENT(name)		\
 DEFINE_EVENT_FN(x86_irq_vector, name##_entry,	\
 	TP_PROTO(int vector),			\
+	TP_ARGS(vector), NULL, NULL);		\
+DEFINE_EVENT_FN(x86_irq_vector, name##_exit,	\
+	TP_PROTO(int vector),			\
+	TP_ARGS(vector), NULL, NULL);
+
+#define DEFINE_RESCHED_IPI_EVENT(name)		\
+DEFINE_EVENT_FN(x86_irq_vector, name##_entry,	\
+	TP_PROTO(int vector),			\
 	TP_ARGS(vector),			\
-	trace_irq_vector_regfunc,		\
-	trace_irq_vector_unregfunc);		\
+	trace_resched_ipi_reg,			\
+	trace_resched_ipi_unreg);		\
 DEFINE_EVENT_FN(x86_irq_vector, name##_exit,	\
 	TP_PROTO(int vector),			\
 	TP_ARGS(vector),			\
-	trace_irq_vector_regfunc,		\
-	trace_irq_vector_unregfunc);
-
+	trace_resched_ipi_reg,			\
+	trace_resched_ipi_unreg);
 
 /*
  * local_timer - called when entering/exiting a local timer interrupt
@@ -45,7 +55,7 @@ DEFINE_IRQ_VECTOR_EVENT(local_timer);
 /*
  * reschedule - called when entering/exiting a reschedule vector handler
  */
-DEFINE_IRQ_VECTOR_EVENT(reschedule);
+DEFINE_RESCHED_IPI_EVENT(reschedule);
 
 /*
  * spurious_apic - called when entering/exiting a spurious apic vector handler
Index: b/arch/x86/kernel/smp.c
===================================================================
--- a/arch/x86/kernel/smp.c
+++ b/arch/x86/kernel/smp.c
@@ -261,7 +261,7 @@ static void native_stop_other_cpus(int w
 {
 	ack_APIC_irq();
 
-	if (trace_irqvectors_enabled()) {
+	if (trace_resched_ipi_enabled()) {
 		/*
 		 * scheduler_ipi() might call irq_enter() as well, but
 		 * nested calls are fine.
@@ -273,7 +273,7 @@ static void native_stop_other_cpus(int w
 	inc_irq_stat(irq_resched_count);
 	scheduler_ipi();
 
-	if (trace_irqvectors_enabled()) {
+	if (trace_resched_ipi_enabled()) {
 		trace_reschedule_exit(RESCHEDULE_VECTOR);
 		irq_exit();
 	}
Index: b/arch/x86/kernel/tracepoint.c
===================================================================
--- a/arch/x86/kernel/tracepoint.c
+++ b/arch/x86/kernel/tracepoint.c
@@ -10,15 +10,32 @@
 #include <asm/hw_irq.h>
 #include <asm/desc.h>
 
-DEFINE_STATIC_KEY_FALSE(trace_irqvectors_key);
+DEFINE_STATIC_KEY_FALSE(trace_pagefault_key);
 
-int trace_irq_vector_regfunc(void)
+int trace_pagefault_reg(void)
 {
-	static_branch_inc(&trace_irqvectors_key);
+	static_branch_inc(&trace_pagefault_key);
 	return 0;
 }
 
-void trace_irq_vector_unregfunc(void)
+void trace_pagefault_unreg(void)
 {
-	static_branch_dec(&trace_irqvectors_key);
+	static_branch_dec(&trace_pagefault_key);
 }
+
+#ifdef CONFIG_SMP
+
+DEFINE_STATIC_KEY_FALSE(trace_resched_ipi_key);
+
+int trace_resched_ipi_reg(void)
+{
+	static_branch_inc(&trace_resched_ipi_key);
+	return 0;
+}
+
+void trace_resched_ipi_unreg(void)
+{
+	static_branch_dec(&trace_resched_ipi_key);
+}
+
+#endif
Index: b/arch/x86/mm/fault.c
===================================================================
--- a/arch/x86/mm/fault.c
+++ b/arch/x86/mm/fault.c
@@ -1509,7 +1509,7 @@ do_page_fault(struct pt_regs *regs, unsi
 	 *
 	 * exception_{enter,exit}() contain all sorts of tracepoints.
 	 */
-	if (trace_irqvectors_enabled())
+	if (trace_pagefault_enabled())
 		trace_page_fault_entries(address, regs, error_code);
 
 	prev_state = exception_enter();

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#1719980 — [patch 09/41] x86/irq: Get rid of duplicated trace_x86_platform_ipi() code

Two NOP5 are really a good tradeoff vs. the unholy IDT switching mess,
which duplicates code all over the place.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/include/asm/hw_irq.h |    2 +-
 arch/x86/kernel/irq.c         |   25 +++++--------------------
 2 files changed, 6 insertions(+), 21 deletions(-)

--- a/arch/x86/include/asm/hw_irq.h
+++ b/arch/x86/include/asm/hw_irq.h
@@ -48,7 +48,6 @@ extern asmlinkage void call_function_sin
 
 #ifdef CONFIG_TRACING
 /* Interrupt handlers registered during init_IRQ */
-extern void trace_x86_platform_ipi(void);
 extern void trace_error_interrupt(void);
 extern void trace_irq_work_interrupt(void);
 extern void trace_spurious_interrupt(void);
@@ -58,6 +57,7 @@ extern void trace_threshold_interrupt(vo
 extern void trace_deferred_error_interrupt(void);
 extern void trace_call_function_interrupt(void);
 extern void trace_call_function_single_interrupt(void);
+#define trace_x86_platform_ipi	x86_platform_ipi
 #define trace_apic_timer_interrupt	apic_timer_interrupt
 #define trace_irq_move_cleanup_interrupt  irq_move_cleanup_interrupt
 #define trace_reboot_interrupt  reboot_interrupt
--- a/arch/x86/kernel/irq.c
+++ b/arch/x86/kernel/irq.c
@@ -262,20 +262,16 @@ u64 arch_irq_stat(void)
 /*
  * Handler for X86_PLATFORM_IPI_VECTOR.
  */
-void __smp_x86_platform_ipi(void)
-{
-	inc_irq_stat(x86_platform_ipis);
-
-	if (x86_platform_ipi_callback)
-		x86_platform_ipi_callback();
-}
-
 __visible void __irq_entry smp_x86_platform_ipi(struct pt_regs *regs)
 {
 	struct pt_regs *old_regs = set_irq_regs(regs);
 
 	entering_ack_irq();
-	__smp_x86_platform_ipi();
+	trace_x86_platform_ipi_entry(X86_PLATFORM_IPI_VECTOR);
+	inc_irq_stat(x86_platform_ipis);
+	if (x86_platform_ipi_callback)
+		x86_platform_ipi_callback();
+	trace_x86_platform_ipi_exit(X86_PLATFORM_IPI_VECTOR);
 	exiting_irq();
 	set_irq_regs(old_regs);
 }
@@ -334,17 +330,6 @@ EXPORT_SYMBOL_GPL(kvm_set_posted_intr_wa
 }
 #endif
 
-__visible void __irq_entry smp_trace_x86_platform_ipi(struct pt_regs *regs)
-{
-	struct pt_regs *old_regs = set_irq_regs(regs);
-
-	entering_ack_irq();
-	trace_x86_platform_ipi_entry(X86_PLATFORM_IPI_VECTOR);
-	__smp_x86_platform_ipi();
-	trace_x86_platform_ipi_exit(X86_PLATFORM_IPI_VECTOR);
-	exiting_irq();
-	set_irq_regs(old_regs);
-}
 
 #ifdef CONFIG_HOTPLUG_CPU
 

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#1720198 — Re: [patch 09/41] x86/irq: Get rid of duplicated trace_x86_platform_ipi() code

On Fri, 25 Aug 2017 12:31:12 +0200
Thomas Gleixner <tglx@linutronix.de> wrote:

> Two NOP5 are really a good tradeoff vs. the unholy IDT switching mess,
> which duplicates code all over the place.
> 
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>

Reviewed-by: Steven Rostedt (VMware) <rostedt@goodmis.org>

-- Steve

> ---
>  arch/x86/include/asm/hw_irq.h |    2 +-
>  arch/x86/kernel/irq.c         |   25 +++++--------------------
>  2 files changed, 6 insertions(+), 21 deletions(-)
> 

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#1719981 — [patch 12/41] x86/mce: Remove duplicated tracing interrupt code

Machine checks are not really high frequency events. The extra two NOP5 for
the disabled tracepoints are noise vs. the heavy lifting which needs to be
done in the MCE handler.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/include/asm/hw_irq.h            |    6 +++---
 arch/x86/kernel/cpu/mcheck/mce_amd.c     |   16 ++--------------
 arch/x86/kernel/cpu/mcheck/therm_throt.c |   20 +++-----------------
 arch/x86/kernel/cpu/mcheck/threshold.c   |   16 ++--------------
 4 files changed, 10 insertions(+), 48 deletions(-)

--- a/arch/x86/include/asm/hw_irq.h
+++ b/arch/x86/include/asm/hw_irq.h
@@ -48,12 +48,12 @@ extern asmlinkage void call_function_sin
 
 #ifdef CONFIG_TRACING
 /* Interrupt handlers registered during init_IRQ */
-extern void trace_thermal_interrupt(void);
 extern void trace_reschedule_interrupt(void);
-extern void trace_threshold_interrupt(void);
-extern void trace_deferred_error_interrupt(void);
 extern void trace_call_function_interrupt(void);
 extern void trace_call_function_single_interrupt(void);
+#define trace_thermal_interrupt	thermal_interrupt
+#define trace_threshold_interrupt	threshold_interrupt
+#define trace_deferred_error_interrupt	deferred_error_interrupt
 #define trace_irq_work_interrupt irq_work_interrupt
 #define trace_error_interrupt error_interrupt
 #define trace_spurious_interrupt spurious_interrupt
--- a/arch/x86/kernel/cpu/mcheck/mce_amd.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c
@@ -776,24 +776,12 @@ static void __log_error(unsigned int ban
 	mce_log(&m);
 }
 
-static inline void __smp_deferred_error_interrupt(void)
-{
-	inc_irq_stat(irq_deferred_error_count);
-	deferred_error_int_vector();
-}
-
 asmlinkage __visible void __irq_entry smp_deferred_error_interrupt(void)
 {
 	entering_irq();
-	__smp_deferred_error_interrupt();
-	exiting_ack_irq();
-}
-
-asmlinkage __visible void __irq_entry smp_trace_deferred_error_interrupt(void)
-{
-	entering_irq();
 	trace_deferred_error_apic_entry(DEFERRED_ERROR_VECTOR);
-	__smp_deferred_error_interrupt();
+	inc_irq_stat(irq_deferred_error_count);
+	deferred_error_int_vector();
 	trace_deferred_error_apic_exit(DEFERRED_ERROR_VECTOR);
 	exiting_ack_irq();
 }
--- a/arch/x86/kernel/cpu/mcheck/therm_throt.c
+++ b/arch/x86/kernel/cpu/mcheck/therm_throt.c
@@ -390,26 +390,12 @@ static void unexpected_thermal_interrupt
 
 static void (*smp_thermal_vector)(void) = unexpected_thermal_interrupt;
 
-static inline void __smp_thermal_interrupt(void)
-{
-	inc_irq_stat(irq_thermal_count);
-	smp_thermal_vector();
-}
-
-asmlinkage __visible void __irq_entry
-smp_thermal_interrupt(struct pt_regs *regs)
-{
-	entering_irq();
-	__smp_thermal_interrupt();
-	exiting_ack_irq();
-}
-
-asmlinkage __visible void __irq_entry
-smp_trace_thermal_interrupt(struct pt_regs *regs)
+asmlinkage __visible void __irq_entry smp_thermal_interrupt(struct pt_regs *r)
 {
 	entering_irq();
+	inc_irq_stat(irq_thermal_count);
 	trace_thermal_apic_entry(THERMAL_APIC_VECTOR);
-	__smp_thermal_interrupt();
+	smp_thermal_vector();
 	trace_thermal_apic_exit(THERMAL_APIC_VECTOR);
 	exiting_ack_irq();
 }
--- a/arch/x86/kernel/cpu/mcheck/threshold.c
+++ b/arch/x86/kernel/cpu/mcheck/threshold.c
@@ -17,24 +17,12 @@ static void default_threshold_interrupt(
 
 void (*mce_threshold_vector)(void) = default_threshold_interrupt;
 
-static inline void __smp_threshold_interrupt(void)
-{
-	inc_irq_stat(irq_threshold_count);
-	mce_threshold_vector();
-}
-
 asmlinkage __visible void __irq_entry smp_threshold_interrupt(void)
 {
 	entering_irq();
-	__smp_threshold_interrupt();
-	exiting_ack_irq();
-}
-
-asmlinkage __visible void __irq_entry smp_trace_threshold_interrupt(void)
-{
-	entering_irq();
 	trace_threshold_apic_entry(THRESHOLD_APIC_VECTOR);
-	__smp_threshold_interrupt();
+	inc_irq_stat(irq_threshold_count);
+	mce_threshold_vector();
 	trace_threshold_apic_exit(THRESHOLD_APIC_VECTOR);
 	exiting_ack_irq();
 }

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#1720229 — Re: [patch 12/41] x86/mce: Remove duplicated tracing interrupt code

On Fri, 25 Aug 2017 12:31:15 +0200
Thomas Gleixner <tglx@linutronix.de> wrote:


> --- a/arch/x86/kernel/cpu/mcheck/mce_amd.c
> +++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c
> @@ -776,24 +776,12 @@ static void __log_error(unsigned int ban
>  	mce_log(&m);
>  }
>  
> -static inline void __smp_deferred_error_interrupt(void)
> -{
> -	inc_irq_stat(irq_deferred_error_count);
> -	deferred_error_int_vector();
> -}
> -
>  asmlinkage __visible void __irq_entry smp_deferred_error_interrupt(void)
>  {
>  	entering_irq();
> -	__smp_deferred_error_interrupt();
> -	exiting_ack_irq();
> -}
> -
> -asmlinkage __visible void __irq_entry smp_trace_deferred_error_interrupt(void)
> -{
> -	entering_irq();
>  	trace_deferred_error_apic_entry(DEFERRED_ERROR_VECTOR);
> -	__smp_deferred_error_interrupt();
> +	inc_irq_stat(irq_deferred_error_count);

Here we do the inc_irq_stat() after the tracepoint (same as the
original).

> +	deferred_error_int_vector();
>  	trace_deferred_error_apic_exit(DEFERRED_ERROR_VECTOR);
>  	exiting_ack_irq();
>  }
> --- a/arch/x86/kernel/cpu/mcheck/therm_throt.c
> +++ b/arch/x86/kernel/cpu/mcheck/therm_throt.c
> @@ -390,26 +390,12 @@ static void unexpected_thermal_interrupt
>  
>  static void (*smp_thermal_vector)(void) = unexpected_thermal_interrupt;
>  
> -static inline void __smp_thermal_interrupt(void)
> -{
> -	inc_irq_stat(irq_thermal_count);
> -	smp_thermal_vector();
> -}
> -
> -asmlinkage __visible void __irq_entry
> -smp_thermal_interrupt(struct pt_regs *regs)
> -{
> -	entering_irq();
> -	__smp_thermal_interrupt();
> -	exiting_ack_irq();
> -}
> -
> -asmlinkage __visible void __irq_entry
> -smp_trace_thermal_interrupt(struct pt_regs *regs)
> +asmlinkage __visible void __irq_entry smp_thermal_interrupt(struct pt_regs *r)
>  {
>  	entering_irq();
> +	inc_irq_stat(irq_thermal_count);
>  	trace_thermal_apic_entry(THERMAL_APIC_VECTOR);

Here we do the inc_irq_stat() after the tracepoint (swapped from the
original). Was that intentional?

> -	__smp_thermal_interrupt();
> +	smp_thermal_vector();
>  	trace_thermal_apic_exit(THERMAL_APIC_VECTOR);
>  	exiting_ack_irq();
>  }
> --- a/arch/x86/kernel/cpu/mcheck/threshold.c
> +++ b/arch/x86/kernel/cpu/mcheck/threshold.c
> @@ -17,24 +17,12 @@ static void default_threshold_interrupt(
>  
>  void (*mce_threshold_vector)(void) = default_threshold_interrupt;
>  
> -static inline void __smp_threshold_interrupt(void)
> -{
> -	inc_irq_stat(irq_threshold_count);
> -	mce_threshold_vector();
> -}
> -
>  asmlinkage __visible void __irq_entry smp_threshold_interrupt(void)
>  {
>  	entering_irq();
> -	__smp_threshold_interrupt();
> -	exiting_ack_irq();
> -}
> -
> -asmlinkage __visible void __irq_entry smp_trace_threshold_interrupt(void)
> -{
> -	entering_irq();
>  	trace_threshold_apic_entry(THRESHOLD_APIC_VECTOR);
> -	__smp_threshold_interrupt();
> +	inc_irq_stat(irq_threshold_count);

Back to inc_irq_stat() after the tracepoint.

-- Steve

> +	mce_threshold_vector();
>  	trace_threshold_apic_exit(THRESHOLD_APIC_VECTOR);
>  	exiting_ack_irq();
>  }
> 

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#1720234 — Re: [patch 12/41] x86/mce: Remove duplicated tracing interrupt code

On Fri, 25 Aug 2017, Steven Rostedt wrote:
> On Fri, 25 Aug 2017 12:31:15 +0200
> Thomas Gleixner <tglx@linutronix.de> wrote:
> >  	trace_deferred_error_apic_entry(DEFERRED_ERROR_VECTOR);
> > -	__smp_deferred_error_interrupt();
> > +	inc_irq_stat(irq_deferred_error_count);
> 
> Here we do the inc_irq_stat() after the tracepoint (same as the
> original).
> >  	entering_irq();
> > +	inc_irq_stat(irq_thermal_count);
> >  	trace_thermal_apic_entry(THERMAL_APIC_VECTOR);
> 
> Here we do the inc_irq_stat() after the tracepoint (swapped from the
> original). Was that intentional?

No. Not that it matters at all, but I can make it consistent everywhere.

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#1719982 — [patch 21/41] x86/gdt: Use bitfields for initialization

The GDT entry related code uses partially bitfields and macros which
initialize the two 16 bit parts of the entry by magic shift and mask
operations.

Clean it up and use the bitfields to initialize and access entries.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/entry/vdso/vma.c        |    2 -
 arch/x86/include/asm/desc.h      |   26 ++++++++++++++---------
 arch/x86/include/asm/desc_defs.h |   44 +++++++++++++++++----------------------
 arch/x86/math-emu/fpu_system.h   |    2 -
 4 files changed, 38 insertions(+), 36 deletions(-)

Index: b/arch/x86/entry/vdso/vma.c
===================================================================
--- a/arch/x86/entry/vdso/vma.c
+++ b/arch/x86/entry/vdso/vma.c
@@ -351,7 +351,7 @@ static void vgetcpu_cpu_init(void *arg)
 	 * and 8 bits for the node)
 	 */
 	d.limit0 = cpu | ((node & 0xf) << 12);
-	d.limit = node >> 4;
+	d.limit1 = node >> 4;
 	d.type = 5;		/* RO data, expand down, accessed */
 	d.dpl = 3;		/* Visible to user code */
 	d.s = 1;		/* Not a system segment */
Index: b/arch/x86/include/asm/desc.h
===================================================================
--- a/arch/x86/include/asm/desc.h
+++ b/arch/x86/include/asm/desc.h
@@ -22,7 +22,7 @@ static inline void fill_ldt(struct desc_
 	desc->s			= 1;
 	desc->dpl		= 0x3;
 	desc->p			= info->seg_not_present ^ 1;
-	desc->limit		= (info->limit & 0xf0000) >> 16;
+	desc->limit1		= (info->limit & 0xf0000) >> 16;
 	desc->avl		= info->useable;
 	desc->d			= info->seg_32bit;
 	desc->g			= info->limit_in_pages;
@@ -169,14 +169,20 @@ static inline void pack_descriptor(struc
 				   unsigned long limit, unsigned char type,
 				   unsigned char flags)
 {
-	desc->a = ((base & 0xffff) << 16) | (limit & 0xffff);
-	desc->b = (base & 0xff000000) | ((base & 0xff0000) >> 16) |
-		(limit & 0x000f0000) | ((type & 0xff) << 8) |
-		((flags & 0xf) << 20);
-	desc->p = 1;
+	desc->limit0		= (u16) limit;
+	desc->base0		= (u16) base;
+	desc->base1		= (base >> 16) & 0xFF;
+	desc->type		= type & 0x0F;
+	desc->s			= 0;
+	desc->dpl		= 0;
+	desc->p			= 1;
+	desc->limit1		= (limit >> 16) & 0xF;
+	desc->avl		= (flags >> 0) & 0x01;
+	desc->l			= (flags >> 1) & 0x01;
+	desc->d			= (flags >> 2) & 0x01;
+	desc->g			= (flags >> 3) & 0x01;
 }
 
-
 static inline void set_tssldt_descriptor(void *d, unsigned long addr,
 					 unsigned type, unsigned size)
 {
@@ -194,7 +200,7 @@ static inline void set_tssldt_descriptor
 	desc->base2		= (addr >> 24) & 0xFF;
 	desc->base3		= (u32) (addr >> 32);
 #else
-	pack_descriptor((struct desc_struct *)d, addr, size, 0x80 | type, 0);
+	pack_descriptor((struct desc_struct *)d, addr, size, type, 0);
 #endif
 }
 
@@ -394,13 +400,13 @@ static inline void set_desc_base(struct
 
 static inline unsigned long get_desc_limit(const struct desc_struct *desc)
 {
-	return desc->limit0 | (desc->limit << 16);
+	return desc->limit0 | (desc->limit1 << 16);
 }
 
 static inline void set_desc_limit(struct desc_struct *desc, unsigned long limit)
 {
 	desc->limit0 = limit & 0xffff;
-	desc->limit = (limit >> 16) & 0xf;
+	desc->limit1 = (limit >> 16) & 0xf;
 }
 
 #ifdef CONFIG_X86_64
Index: b/arch/x86/include/asm/desc_defs.h
===================================================================
--- a/arch/x86/include/asm/desc_defs.h
+++ b/arch/x86/include/asm/desc_defs.h
@@ -11,34 +11,30 @@
 
 #include <linux/types.h>
 
-/*
- * FIXME: Accessing the desc_struct through its fields is more elegant,
- * and should be the one valid thing to do. However, a lot of open code
- * still touches the a and b accessors, and doing this allow us to do it
- * incrementally. We keep the signature as a struct, rather than a union,
- * so we can get rid of it transparently in the future -- glommer
- */
 /* 8 byte segment descriptor */
 struct desc_struct {
-	union {
-		struct {
-			unsigned int a;
-			unsigned int b;
-		};
-		struct {
-			u16 limit0;
-			u16 base0;
-			unsigned base1: 8, type: 4, s: 1, dpl: 2, p: 1;
-			unsigned limit: 4, avl: 1, l: 1, d: 1, g: 1, base2: 8;
-		};
-	};
+	u16	limit0;
+	u16	base0;
+	u16	base1: 8, type: 4, s: 1, dpl: 2, p: 1;
+	u16	limit1: 4, avl: 1, l: 1, d: 1, g: 1, base2: 8;
 } __attribute__((packed));
 
-#define GDT_ENTRY_INIT(flags, base, limit) { { { \
-		.a = ((limit) & 0xffff) | (((base) & 0xffff) << 16), \
-		.b = (((base) & 0xff0000) >> 16) | (((flags) & 0xf0ff) << 8) | \
-			((limit) & 0xf0000) | ((base) & 0xff000000), \
-	} } }
+#define GDT_ENTRY_INIT(flags, base, limit)			\
+	{							\
+		.limit0		= (u16) (limit),		\
+		.limit1		= ((limit) >> 16) & 0x0F,	\
+		.base0		= (u16) (base),			\
+		.base1		= ((base) >> 16) & 0xFF,	\
+		.base2		= ((base) >> 24) & 0xFF,	\
+		.type		= (flags & 0x0f),		\
+		.s		= (flags >> 4) & 0x01,		\
+		.dpl		= (flags >> 5) & 0x03,		\
+		.p		= (flags >> 7) & 0x01,		\
+		.avl		= (flags >> 12) & 0x01,		\
+		.l		= (flags >> 13) & 0x01,		\
+		.d		= (flags >> 14) & 0x01,		\
+		.g		= (flags >> 15) & 0x01,		\
+	}
 
 enum {
 	GATE_INTERRUPT = 0xE,
Index: b/arch/x86/math-emu/fpu_system.h
===================================================================
--- a/arch/x86/math-emu/fpu_system.h
+++ b/arch/x86/math-emu/fpu_system.h
@@ -49,7 +49,7 @@ static inline unsigned long seg_get_base
 
 static inline unsigned long seg_get_limit(struct desc_struct *d)
 {
-	return ((unsigned long)d->limit << 16) | d->limit0;
+	return ((unsigned long)d->limit1 << 16) | d->limit0;
 }
 
 static inline unsigned long seg_get_granularity(struct desc_struct *d)

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#1719983 — [patch 28/41] x86/idt: Move early IDT setup out of 32bit asm

The early IDT setup can be done in C code like it's done on 64 bit. Reuse
the 64 bit version.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/include/asm/segment.h |    1 +
 arch/x86/kernel/head32.c       |    4 ++++
 arch/x86/kernel/head_32.S      |   36 ++----------------------------------
 arch/x86/kernel/idt.c          |    4 ++++
 4 files changed, 11 insertions(+), 34 deletions(-)

Index: b/arch/x86/include/asm/segment.h
===================================================================
--- a/arch/x86/include/asm/segment.h
+++ b/arch/x86/include/asm/segment.h
@@ -238,6 +238,7 @@
 #ifndef __ASSEMBLY__
 
 extern const char early_idt_handler_array[NUM_EXCEPTION_VECTORS][EARLY_IDT_HANDLER_SIZE];
+extern void early_ignore_irq(void);
 
 /*
  * Load a segment. Fall back on loading the zero segment if something goes
Index: b/arch/x86/kernel/head32.c
===================================================================
--- a/arch/x86/kernel/head32.c
+++ b/arch/x86/kernel/head32.c
@@ -10,6 +10,7 @@
 #include <linux/mm.h>
 #include <linux/memblock.h>
 
+#include <asm/desc.h>
 #include <asm/setup.h>
 #include <asm/sections.h>
 #include <asm/e820/api.h>
@@ -30,6 +31,9 @@ static void __init i386_default_early_se
 asmlinkage __visible void __init i386_start_kernel(void)
 {
 	cr4_init_shadow();
+
+	idt_setup_early_handler();
+
 	sanitize_boot_params(&boot_params);
 
 	x86_early_init_platform_quirks();
Index: b/arch/x86/kernel/head_32.S
===================================================================
--- a/arch/x86/kernel/head_32.S
+++ b/arch/x86/kernel/head_32.S
@@ -345,7 +345,6 @@ ENTRY(startup_32_smp)
 	movl %eax,%cr0
 
 	lgdt early_gdt_descr
-	lidt idt_descr
 	ljmp $(__KERNEL_CS),$1f
 1:	movl $(__KERNEL_DS),%eax	# reload all the segment registers
 	movl %eax,%ss			# after changing gdt.
@@ -378,37 +377,6 @@ ENDPROC(startup_32_smp)
  */
 __INIT
 setup_once:
-	/*
-	 * Set up a idt with 256 interrupt gates that push zero if there
-	 * is no error code and then jump to early_idt_handler_common.
-	 * It doesn't actually load the idt - that needs to be done on
-	 * each CPU. Interrupts are enabled elsewhere, when we can be
-	 * relatively sure everything is ok.
-	 */
-
-	movl $idt_table,%edi
-	movl $early_idt_handler_array,%eax
-	movl $NUM_EXCEPTION_VECTORS,%ecx
-1:
-	movl %eax,(%edi)
-	movl %eax,4(%edi)
-	/* interrupt gate, dpl=0, present */
-	movl $(0x8E000000 + __KERNEL_CS),2(%edi)
-	addl $EARLY_IDT_HANDLER_SIZE,%eax
-	addl $8,%edi
-	loop 1b
-
-	movl $256 - NUM_EXCEPTION_VECTORS,%ecx
-	movl $ignore_int,%edx
-	movl $(__KERNEL_CS << 16),%eax
-	movw %dx,%ax		/* selector = 0x0010 = cs */
-	movw $0x8E00,%dx	/* interrupt gate - dpl=0, present */
-2:
-	movl %eax,(%edi)
-	movl %edx,4(%edi)
-	addl $8,%edi
-	loop 2b
-
 #ifdef CONFIG_CC_STACKPROTECTOR
 	/*
 	 * Configure the stack canary. The linker can't handle this by
@@ -498,7 +466,7 @@ ENDPROC(early_idt_handler_common)
 
 /* This is the default interrupt "handler" :-) */
 	ALIGN
-ignore_int:
+ENTRY(early_ignore_irq)
 	cld
 #ifdef CONFIG_PRINTK
 	pushl %eax
@@ -533,7 +501,7 @@ ENDPROC(early_idt_handler_common)
 hlt_loop:
 	hlt
 	jmp hlt_loop
-ENDPROC(ignore_int)
+ENDPROC(early_ignore_irq)
 __INITDATA
 	.align 4
 GLOBAL(early_recursion_flag)
Index: b/arch/x86/kernel/idt.c
===================================================================
--- a/arch/x86/kernel/idt.c
+++ b/arch/x86/kernel/idt.c
@@ -34,6 +34,10 @@ void __init idt_setup_early_handler(void
 
 	for (i = 0; i < NUM_EXCEPTION_VECTORS; i++)
 		set_intr_gate(i, early_idt_handler_array[i]);
+#ifdef CONFIG_X86_32
+	for ( ; i < NR_VECTORS; i++)
+		set_intr_gate(i, early_ignore_irq);
+#endif
 	load_idt((const struct desc_ptr *)&idt_descr);
 }
 

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#1719984 — [patch 22/41] x86/ldttss: Cleanup 32bit descriptors

Like the IDT descriptors the LDT/TSS descriptors are pointlessly different
on 32 and 64 bit.

Unify them and get rid of the duplicated code.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/include/asm/desc.h      |   26 +++-----------------------
 arch/x86/include/asm/desc_defs.h |   27 ++++++++++++---------------
 2 files changed, 15 insertions(+), 38 deletions(-)

--- a/arch/x86/include/asm/desc.h
+++ b/arch/x86/include/asm/desc.h
@@ -165,42 +165,22 @@ native_write_gdt_entry(struct desc_struc
 	memcpy(&gdt[entry], desc, size);
 }
 
-static inline void pack_descriptor(struct desc_struct *desc, unsigned long base,
-				   unsigned long limit, unsigned char type,
-				   unsigned char flags)
-{
-	desc->limit0		= (u16) limit;
-	desc->base0		= (u16) base;
-	desc->base1		= (base >> 16) & 0xFF;
-	desc->type		= type & 0x0F;
-	desc->s			= 0;
-	desc->dpl		= 0;
-	desc->p			= 1;
-	desc->limit1		= (limit >> 16) & 0xF;
-	desc->avl		= (flags >> 0) & 0x01;
-	desc->l			= (flags >> 1) & 0x01;
-	desc->d			= (flags >> 2) & 0x01;
-	desc->g			= (flags >> 3) & 0x01;
-}
-
 static inline void set_tssldt_descriptor(void *d, unsigned long addr,
 					 unsigned type, unsigned size)
 {
-#ifdef CONFIG_X86_64
-	struct ldttss_desc64 *desc = d;
+	struct ldttss_desc *desc = d;
 
 	memset(desc, 0, sizeof(*desc));
 
-	desc->limit0		= size & 0xFFFF;
+	desc->limit0		= (u16) size;
 	desc->base0		= (u16) addr;
 	desc->base1		= (addr >> 16) & 0xFF;
 	desc->type		= type;
 	desc->p			= 1;
 	desc->limit1		= (size >> 16) & 0xF;
 	desc->base2		= (addr >> 24) & 0xFF;
+#ifdef CONFIG_X86_64
 	desc->base3		= (u32) (addr >> 32);
-#else
-	pack_descriptor((struct desc_struct *)d, addr, size, type, 0);
 #endif
 }
 
--- a/arch/x86/include/asm/desc_defs.h
+++ b/arch/x86/include/asm/desc_defs.h
@@ -49,24 +49,21 @@ enum {
 	DESCTYPE_S = 0x10,	/* !system */
 };
 
-/* LDT or TSS descriptor in the GDT. 16 bytes. */
-struct ldttss_desc64 {
-	u16 limit0;
-	u16 base0;
-	unsigned base1 : 8, type : 5, dpl : 2, p : 1;
-	unsigned limit1 : 4, zero0 : 3, g : 1, base2 : 8;
-	u32 base3;
-	u32 zero1;
-} __attribute__((packed));
-
+/* LDT or TSS descriptor in the GDT. */
+struct ldttss_desc {
+	u16	limit0;
+	u16	base0;
 
+	u16	base1 : 8, type : 5, dpl : 2, p : 1;
+	u16	limit1 : 4, zero0 : 3, g : 1, base2 : 8;
 #ifdef CONFIG_X86_64
-typedef struct ldttss_desc64 ldt_desc;
-typedef struct ldttss_desc64 tss_desc;
-#else
-typedef struct desc_struct ldt_desc;
-typedef struct desc_struct tss_desc;
+	u32	base3;
+	u32	zero1;
 #endif
+} __attribute__((packed));
+
+typedef struct ldttss_desc ldt_desc;
+typedef struct ldttss_desc tss_desc;
 
 struct idt_bits {
 	u16		ist	: 3,

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#1719985 — [patch 20/41] x86: Replace access to desc_struct:a/b fields

The union inside of desc_struct which allows access to the raw u32 parts of
the descriptors. This raw access part is about to go away.

Replace the few code parts which access those fields.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Cc: Juergen Gross <jgross@suse.com>
---
 arch/x86/include/asm/xen/hypercall.h |    6 ++++--
 arch/x86/kernel/tls.c                |    2 +-
 arch/x86/xen/enlighten_pv.c          |    2 +-
 3 files changed, 6 insertions(+), 4 deletions(-)

Index: b/arch/x86/include/asm/xen/hypercall.h
===================================================================
--- a/arch/x86/include/asm/xen/hypercall.h
+++ b/arch/x86/include/asm/xen/hypercall.h
@@ -552,6 +552,8 @@ static inline void
 MULTI_update_descriptor(struct multicall_entry *mcl, u64 maddr,
 			struct desc_struct desc)
 {
+	u32 *p = (u32 *) &desc;
+
 	mcl->op = __HYPERVISOR_update_descriptor;
 	if (sizeof(maddr) == sizeof(long)) {
 		mcl->args[0] = maddr;
@@ -559,8 +561,8 @@ MULTI_update_descriptor(struct multicall
 	} else {
 		mcl->args[0] = maddr;
 		mcl->args[1] = maddr >> 32;
-		mcl->args[2] = desc.a;
-		mcl->args[3] = desc.b;
+		mcl->args[2] = *p++;
+		mcl->args[3] = *p;
 	}
 
 	trace_xen_mc_entry(mcl, sizeof(maddr) == sizeof(long) ? 2 : 4);
Index: b/arch/x86/kernel/tls.c
===================================================================
--- a/arch/x86/kernel/tls.c
+++ b/arch/x86/kernel/tls.c
@@ -93,7 +93,7 @@ static void set_tls_desc(struct task_str
 
 	while (n-- > 0) {
 		if (LDT_empty(info) || LDT_zero(info)) {
-			desc->a = desc->b = 0;
+			memset(desc, 0, sizeof(*desc));
 		} else {
 			fill_ldt(desc, info);
 
Index: b/arch/x86/xen/enlighten_pv.c
===================================================================
--- a/arch/x86/xen/enlighten_pv.c
+++ b/arch/x86/xen/enlighten_pv.c
@@ -494,7 +494,7 @@ static void __init xen_load_gdt_boot(con
 static inline bool desc_equal(const struct desc_struct *d1,
 			      const struct desc_struct *d2)
 {
-	return d1->a == d2->a && d1->b == d2->b;
+	return memcmp(d1, d2, sizeof(*d1));
 }
 
 static void load_TLS_descriptor(struct thread_struct *t,

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#1719991 — Re: [patch 20/41] x86: Replace access to desc_struct:a/b fields

On 25/08/17 12:31, Thomas Gleixner wrote:
> The union inside of desc_struct which allows access to the raw u32 parts of
> the descriptors. This raw access part is about to go away.
> 
> Replace the few code parts which access those fields.
> 
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
> Cc: Juergen Gross <jgross@suse.com>

Reviewed-by: Juergen Gross <jgross@suse.com>


Juergen

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#1720090 — Re: [patch 20/41] x86: Replace access to desc_struct:a/b fields

>  
> Index: b/arch/x86/xen/enlighten_pv.c
> ===================================================================
> --- a/arch/x86/xen/enlighten_pv.c
> +++ b/arch/x86/xen/enlighten_pv.c
> @@ -494,7 +494,7 @@ static void __init xen_load_gdt_boot(con
>  static inline bool desc_equal(const struct desc_struct *d1,
>  			      const struct desc_struct *d2)
>  {
> -	return d1->a == d2->a && d1->b == d2->b;
> +	return memcmp(d1, d2, sizeof(*d1));
>  }

Shouldn't this be !memcmp() ?

-boris

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#1720091 — Re: [patch 20/41] x86: Replace access to desc_struct:a/b fields

On Fri, 25 Aug 2017, Boris Ostrovsky wrote:

> 
> >  
> > Index: b/arch/x86/xen/enlighten_pv.c
> > ===================================================================
> > --- a/arch/x86/xen/enlighten_pv.c
> > +++ b/arch/x86/xen/enlighten_pv.c
> > @@ -494,7 +494,7 @@ static void __init xen_load_gdt_boot(con
> >  static inline bool desc_equal(const struct desc_struct *d1,
> >  			      const struct desc_struct *d2)
> >  {
> > -	return d1->a == d2->a && d1->b == d2->b;
> > +	return memcmp(d1, d2, sizeof(*d1));
> >  }
> 
> Shouldn't this be !memcmp() ?

Bah yes.

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#1720096 — Re: [patch 20/41] x86: Replace access to desc_struct:a/b fields

On Fri, 25 Aug 2017 16:02:02 +0200 (CEST)
Thomas Gleixner <tglx@linutronix.de> wrote:

> On Fri, 25 Aug 2017, Boris Ostrovsky wrote:
> 
> >   
> > >  
> > > Index: b/arch/x86/xen/enlighten_pv.c
> > > ===================================================================
> > > --- a/arch/x86/xen/enlighten_pv.c
> > > +++ b/arch/x86/xen/enlighten_pv.c
> > > @@ -494,7 +494,7 @@ static void __init xen_load_gdt_boot(con
> > >  static inline bool desc_equal(const struct desc_struct *d1,
> > >  			      const struct desc_struct *d2)
> > >  {
> > > -	return d1->a == d2->a && d1->b == d2->b;
> > > +	return memcmp(d1, d2, sizeof(*d1));
> > >  }  
> > 
> > Shouldn't this be !memcmp() ?  
> 
> Bah yes.

This is why I'm one of those that like to add the "== 0" to it. Because
I always get this wrong :-p

-- Steve

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#1719986 — [patch 04/41] x86/boot: Move EISA setup to a proper place

EISA has absolutely nothing to do with traps. The EISA bus detection does
not need to run in the very early boot. It's good enough to run it before
the EISA bus and drivers are initialized.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/kernel/Makefile |    1 +
 arch/x86/kernel/eisa.c   |   18 ++++++++++++++++++
 arch/x86/kernel/traps.c  |   13 -------------
 3 files changed, 19 insertions(+), 13 deletions(-)

Index: b/arch/x86/kernel/Makefile
===================================================================
--- a/arch/x86/kernel/Makefile
+++ b/arch/x86/kernel/Makefile
@@ -111,6 +111,7 @@ obj-$(CONFIG_PARAVIRT_SPINLOCKS)+= parav
 obj-$(CONFIG_PARAVIRT_CLOCK)	+= pvclock.o
 obj-$(CONFIG_X86_PMEM_LEGACY_DEVICE) += pmem.o
 
+obj-$(CONFIG_EISA)		+= eisa.o
 obj-$(CONFIG_PCSPKR_PLATFORM)	+= pcspeaker.o
 
 obj-$(CONFIG_X86_CHECK_BIOS_CORRUPTION) += check.o
Index: b/arch/x86/kernel/eisa.c
===================================================================
--- /dev/null
+++ b/arch/x86/kernel/eisa.c
@@ -0,0 +1,18 @@
+/*
+ * EISA specific code
+ *
+ * This file is licensed under the GPL V2
+ */
+#include <linux/ioport.h>
+#include <linux/eisa.h>
+
+static __init int eisa_bus_probe(void)
+{
+	void __iomem *p = ioremap(0x0FFFD9, 4);
+
+	if (readl(p) == 'E' + ('I'<<8) + ('S'<<16) + ('A'<<24))
+		EISA_bus = 1;
+	iounmap(p, 4);
+	return 0;
+}
+subsys_initcall(eisa_bus_probe);
Index: b/arch/x86/kernel/traps.c
===================================================================
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@ -38,11 +38,6 @@
 #include <linux/smp.h>
 #include <linux/io.h>
 
-#ifdef CONFIG_EISA
-#include <linux/ioport.h>
-#include <linux/eisa.h>
-#endif
-
 #if defined(CONFIG_EDAC)
 #include <linux/edac.h>
 #endif
@@ -969,14 +964,6 @@ void __init trap_init(void)
 {
 	int i;
 
-#ifdef CONFIG_EISA
-	void __iomem *p = early_ioremap(0x0FFFD9, 4);
-
-	if (readl(p) == 'E' + ('I'<<8) + ('S'<<16) + ('A'<<24))
-		EISA_bus = 1;
-	early_iounmap(p, 4);
-#endif
-
 	set_intr_gate(X86_TRAP_DE, divide_error);
 	set_intr_gate_ist(X86_TRAP_NMI, &nmi, NMI_STACK);
 	/* int4 can be called from all */

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#1720010 — Re: [patch 04/41] x86/boot: Move EISA setup to a proper place

On Fri, 25 Aug 2017, Thomas Gleixner wrote:
> +static __init int eisa_bus_probe(void)
> +{
> +	void __iomem *p = ioremap(0x0FFFD9, 4);
> +
> +	if (readl(p) == 'E' + ('I'<<8) + ('S'<<16) + ('A'<<24))
> +		EISA_bus = 1;
> +	iounmap(p, 4);

That should obviously be:

     iounmap(p);

But as a side note:

Can't we finally get rid of this EISA cruft alltogether?

Thanks,

	tglx

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