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[PATCH v1 1/2] gpio: gpio-wcove: fix GPIO irq status mask

Started bysathyanarayanan.kuppuswamy@linux.intel.com
First post2017-04-14 19:40 +0200
Last post2017-04-26 18:50 +0200
Articles 11 — 7 participants

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  [PATCH v1 1/2] gpio: gpio-wcove: fix GPIO irq status mask sathyanarayanan.kuppuswamy@linux.intel.com - 2017-04-14 19:40 +0200
    [PATCH v1 2/2] gpio: gpio-wcove: fix irq pending status bit width sathyanarayanan.kuppuswamy@linux.intel.com - 2017-04-14 19:40 +0200
      Re: [PATCH v1 2/2] gpio: gpio-wcove: fix irq pending status bit width Linus Walleij <linus.walleij@linaro.org> - 2017-04-24 15:20 +0200
        Re: [PATCH v1 2/2] gpio: gpio-wcove: fix irq pending status bit  width Andy Shevchenko <andriy.shevchenko@linux.intel.com> - 2017-04-24 16:30 +0200
    Re: [PATCH v1 1/2] gpio: gpio-wcove: fix GPIO irq status mask Andy Shevchenko <andy.shevchenko@gmail.com> - 2017-04-19 22:50 +0200
      Re: [PATCH v1 1/2] gpio: gpio-wcove: fix GPIO irq status mask sathyanarayanan kuppuswamy          <sathyanarayanan.kuppuswamy@linux.intel.com> - 2017-04-21 03:00 +0200
      [PATCH v2 1/1] gpio: gpio-wcove: fix GPIO IRQ status mask sathyanarayanan.kuppuswamy@linux.intel.com - 2017-04-24 21:20 +0200
        Re: [PATCH v2 1/1] gpio: gpio-wcove: fix GPIO IRQ status mask Linus Walleij <linus.walleij@linaro.org> - 2017-04-26 16:30 +0200
          Re: [PATCH v2 1/1] gpio: gpio-wcove: fix GPIO IRQ status mask Mika Westerberg <mika.westerberg@linux.intel.com> - 2017-04-26 17:00 +0200
          Re: [PATCH v2 1/1] gpio: gpio-wcove: fix GPIO IRQ status mask Andy Shevchenko <andy.shevchenko@gmail.com> - 2017-04-26 17:00 +0200
          RE: [PATCH v2 1/1] gpio: gpio-wcove: fix GPIO IRQ status mask "Gao, Bin" <bin.gao@intel.com> - 2017-04-26 18:50 +0200

#1623806 — [PATCH v1 1/2] gpio: gpio-wcove: fix GPIO irq status mask

Fromsathyanarayanan.kuppuswamy@linux.intel.com
Date2017-04-14 19:40 +0200
Subject[PATCH v1 1/2] gpio: gpio-wcove: fix GPIO irq status mask
Message-ID<twdmq-3Wz-7@gated-at.bofh.it>
From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>

According to Whiskey cove PMIC spec, bit 7 of GPIOIRQ0_REG belongs to
battery IO. So we should skip this bit when checking for GPIO irq pending
status. Otherwise, wcove_gpio_irq_handler() might go into the infinite
loop until irq "pending" status becomes 0. This patch fixes this issue.

Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
---
 drivers/gpio/gpio-wcove.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/gpio/gpio-wcove.c b/drivers/gpio/gpio-wcove.c
index 97613de..68ef061 100644
--- a/drivers/gpio/gpio-wcove.c
+++ b/drivers/gpio/gpio-wcove.c
@@ -51,6 +51,8 @@
 #define GROUP1_NR_IRQS		6
 #define IRQ_MASK_BASE		0x4e19
 #define IRQ_STATUS_BASE		0x4e0b
+#define GPIO_IRQ0_MASK		0x7f
+#define GPIO_IRQ1_MASK		0x3f
 #define UPDATE_IRQ_TYPE		BIT(0)
 #define UPDATE_IRQ_MASK		BIT(1)
 
@@ -309,7 +311,7 @@ static irqreturn_t wcove_gpio_irq_handler(int irq, void *data)
 		return IRQ_NONE;
 	}
 
-	pending = p[0] | (p[1] << 8);
+	pending = (p[0] & GPIO_IRQ0_MASK) | ((p[1] & GPIO_IRQ1_MASK) << 7);
 	if (!pending)
 		return IRQ_NONE;
 
@@ -333,7 +335,8 @@ static irqreturn_t wcove_gpio_irq_handler(int irq, void *data)
 			break;
 		}
 
-		pending = p[0] | (p[1] << 8);
+		pending = (p[0] & GPIO_IRQ0_MASK) |
+			((p[1] & GPIO_IRQ1_MASK) << 7);
 	}
 
 	return IRQ_HANDLED;
-- 
2.7.4

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#1623809 — [PATCH v1 2/2] gpio: gpio-wcove: fix irq pending status bit width

Fromsathyanarayanan.kuppuswamy@linux.intel.com
Date2017-04-14 19:40 +0200
Subject[PATCH v1 2/2] gpio: gpio-wcove: fix irq pending status bit width
Message-ID<twdmq-3Wz-21@gated-at.bofh.it>
In reply to#1623806
From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>

Whiskey cove PMIC has three GPIO banks with total number of 13 GPIO
pins. But when checking for the pending status, for_each_set_bit() uses
bit width of 7 and hence it only checks the status for first 7 GPIO pins
missing to check/clear the status of rest of the GPIO pins. This patch
fixes this issue.

Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
---
 drivers/gpio/gpio-wcove.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpio/gpio-wcove.c b/drivers/gpio/gpio-wcove.c
index 68ef061..48c1504 100644
--- a/drivers/gpio/gpio-wcove.c
+++ b/drivers/gpio/gpio-wcove.c
@@ -319,7 +319,7 @@ static irqreturn_t wcove_gpio_irq_handler(int irq, void *data)
 	while (pending) {
 		/* One iteration is for all pending bits */
 		for_each_set_bit(gpio, (const unsigned long *)&pending,
-						 GROUP0_NR_IRQS) {
+						 WCOVE_GPIO_NUM) {
 			offset = (gpio > GROUP0_NR_IRQS) ? 1 : 0;
 			mask = (offset == 1) ? BIT(gpio - GROUP0_NR_IRQS) :
 								BIT(gpio);
-- 
2.7.4

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#1629540 — Re: [PATCH v1 2/2] gpio: gpio-wcove: fix irq pending status bit width

FromLinus Walleij <linus.walleij@linaro.org>
Date2017-04-24 15:20 +0200
SubjectRe: [PATCH v1 2/2] gpio: gpio-wcove: fix irq pending status bit width
Message-ID<tzM4i-7tv-23@gated-at.bofh.it>
In reply to#1623809
On Fri, Apr 14, 2017 at 7:29 PM,
<sathyanarayanan.kuppuswamy@linux.intel.com> wrote:

> From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
>
> Whiskey cove PMIC has three GPIO banks with total number of 13 GPIO
> pins. But when checking for the pending status, for_each_set_bit() uses
> bit width of 7 and hence it only checks the status for first 7 GPIO pins
> missing to check/clear the status of rest of the GPIO pins. This patch
> fixes this issue.
>
> Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>

Looks reasonable so patch applied.

Just looping in Mika & Andy so they have an idea about what's going
on.

Yours,
Linus Walleij

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#1629630 — Re: [PATCH v1 2/2] gpio: gpio-wcove: fix irq pending status bit width

FromAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Date2017-04-24 16:30 +0200
SubjectRe: [PATCH v1 2/2] gpio: gpio-wcove: fix irq pending status bit width
Message-ID<tzNa3-87g-35@gated-at.bofh.it>
In reply to#1629540
On Mon, 2017-04-24 at 15:15 +0200, Linus Walleij wrote:
> On Fri, Apr 14, 2017 at 7:29 PM,
> <sathyanarayanan.kuppuswamy@linux.intel.com> wrote:
> 
> > From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.i
> > ntel.com>
> > 
> > Whiskey cove PMIC has three GPIO banks with total number of 13 GPIO
> > pins. But when checking for the pending status, for_each_set_bit()
> > uses
> > bit width of 7 and hence it only checks the status for first 7 GPIO
> > pins
> > missing to check/clear the status of rest of the GPIO pins. This
> > patch
> > fixes this issue.
> > 
> > Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswam
> > y@linux.intel.com>
> 
> Looks reasonable so patch applied.
> 
> Just looping in Mika & Andy so they have an idea about what's going
> on.

This is fine by me, thanks!


-- 
Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Intel Finland Oy

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#1626790

FromAndy Shevchenko <andy.shevchenko@gmail.com>
Date2017-04-19 22:50 +0200
Message-ID<ty4I2-80K-19@gated-at.bofh.it>
In reply to#1623806
On Fri, Apr 14, 2017 at 8:29 PM,
<sathyanarayanan.kuppuswamy@linux.intel.com> wrote:
> From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
>
> According to Whiskey cove PMIC spec, bit 7 of GPIOIRQ0_REG belongs to

cove -> Cove

> battery IO. So we should skip this bit when checking for GPIO irq pending

irq -> IRQ

> status. Otherwise, wcove_gpio_irq_handler() might go into the infinite
> loop until irq "pending" status becomes 0. This patch fixes this issue.

Ditto.

> +#define GPIO_IRQ0_MASK         0x7f
> +#define GPIO_IRQ1_MASK         0x3f

GENMASK()

> -               pending = p[0] | (p[1] << 8);
> +               pending = (p[0] & GPIO_IRQ0_MASK) |
> +                       ((p[1] & GPIO_IRQ1_MASK) << 7);

I would leave this on one line despite 80 characters limit (actually
how long is it?).

-- 
With Best Regards,
Andy Shevchenko

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#1627884

Fromsathyanarayanan kuppuswamy <sathyanarayanan.kuppuswamy@linux.intel.com>
Date2017-04-21 03:00 +0200
Message-ID<tyv5w-7uf-15@gated-at.bofh.it>
In reply to#1626790
Hi Andy,

Thanks for the review.


On 04/19/2017 01:41 PM, Andy Shevchenko wrote:
> On Fri, Apr 14, 2017 at 8:29 PM,
> <sathyanarayanan.kuppuswamy@linux.intel.com> wrote:
>> From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
>>
>> According to Whiskey cove PMIC spec, bit 7 of GPIOIRQ0_REG belongs to
> cove -> Cove
Will fix it in next version.
>
>> battery IO. So we should skip this bit when checking for GPIO irq pending
> irq -> IRQ
Ditto.
>
>> status. Otherwise, wcove_gpio_irq_handler() might go into the infinite
>> loop until irq "pending" status becomes 0. This patch fixes this issue.
> Ditto.
>
>> +#define GPIO_IRQ0_MASK         0x7f
>> +#define GPIO_IRQ1_MASK         0x3f
> GENMASK()
Ditto.
>
>> -               pending = p[0] | (p[1] << 8);
>> +               pending = (p[0] & GPIO_IRQ0_MASK) |
>> +                       ((p[1] & GPIO_IRQ1_MASK) << 7);
> I would leave this on one line despite 80 characters limit (actually
> how long is it?).
It comes to 84 characters. Should I leave it as it is ?
>

-- 
Sathyanarayanan Kuppuswamy
Android kernel developer

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#1629906 — [PATCH v2 1/1] gpio: gpio-wcove: fix GPIO IRQ status mask

Fromsathyanarayanan.kuppuswamy@linux.intel.com
Date2017-04-24 21:20 +0200
Subject[PATCH v2 1/1] gpio: gpio-wcove: fix GPIO IRQ status mask
Message-ID<tzRGF-2y4-19@gated-at.bofh.it>
In reply to#1626790
From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>

According to Whiskey Cove PMIC spec, bit 7 of GPIOIRQ0_REG belongs to
battery IO. So we should skip this bit when checking for GPIO IRQ pending
status. Otherwise, wcove_gpio_irq_handler() might go into the infinite
loop until IRQ "pending" status becomes 0. This patch fixes this issue.

Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
---
 drivers/gpio/gpio-wcove.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

Changes since v1:
 * Used GENMASK API.
 * Fixed some style issues.
 * Updated commit message.

diff --git a/drivers/gpio/gpio-wcove.c b/drivers/gpio/gpio-wcove.c
index 97613de..7872435 100644
--- a/drivers/gpio/gpio-wcove.c
+++ b/drivers/gpio/gpio-wcove.c
@@ -51,6 +51,8 @@
 #define GROUP1_NR_IRQS		6
 #define IRQ_MASK_BASE		0x4e19
 #define IRQ_STATUS_BASE		0x4e0b
+#define GPIO_IRQ0_MASK		GENMASK(6, 0)
+#define GPIO_IRQ1_MASK		GENMASK(5, 0)
 #define UPDATE_IRQ_TYPE		BIT(0)
 #define UPDATE_IRQ_MASK		BIT(1)
 
@@ -309,7 +311,7 @@ static irqreturn_t wcove_gpio_irq_handler(int irq, void *data)
 		return IRQ_NONE;
 	}
 
-	pending = p[0] | (p[1] << 8);
+	pending = (p[0] & GPIO_IRQ0_MASK) | ((p[1] & GPIO_IRQ1_MASK) << 7);
 	if (!pending)
 		return IRQ_NONE;
 
@@ -333,7 +335,7 @@ static irqreturn_t wcove_gpio_irq_handler(int irq, void *data)
 			break;
 		}
 
-		pending = p[0] | (p[1] << 8);
+		pending = (p[0] & GPIO_IRQ0_MASK) | ((p[1] & GPIO_IRQ1_MASK) << 7);
 	}
 
 	return IRQ_HANDLED;
-- 
2.7.4

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#1631483 — Re: [PATCH v2 1/1] gpio: gpio-wcove: fix GPIO IRQ status mask

FromLinus Walleij <linus.walleij@linaro.org>
Date2017-04-26 16:30 +0200
SubjectRe: [PATCH v2 1/1] gpio: gpio-wcove: fix GPIO IRQ status mask
Message-ID<tAw77-3rU-11@gated-at.bofh.it>
In reply to#1629906
On Mon, Apr 24, 2017 at 9:15 PM,
<sathyanarayanan.kuppuswamy@linux.intel.com> wrote:

> From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
>
> According to Whiskey Cove PMIC spec, bit 7 of GPIOIRQ0_REG belongs to
> battery IO. So we should skip this bit when checking for GPIO IRQ pending
> status. Otherwise, wcove_gpio_irq_handler() might go into the infinite
> loop until IRQ "pending" status becomes 0. This patch fixes this issue.
>
> Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>

Looks fine to me, tentatively applied.

Bin, Mika, Andy, OK?

Yours,
Linus Walleij

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#1631501 — Re: [PATCH v2 1/1] gpio: gpio-wcove: fix GPIO IRQ status mask

FromMika Westerberg <mika.westerberg@linux.intel.com>
Date2017-04-26 17:00 +0200
SubjectRe: [PATCH v2 1/1] gpio: gpio-wcove: fix GPIO IRQ status mask
Message-ID<tAwA9-3Ev-1@gated-at.bofh.it>
In reply to#1631483
On Wed, Apr 26, 2017 at 04:26:17PM +0200, Linus Walleij wrote:
> On Mon, Apr 24, 2017 at 9:15 PM,
> <sathyanarayanan.kuppuswamy@linux.intel.com> wrote:
> 
> > From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
> >
> > According to Whiskey Cove PMIC spec, bit 7 of GPIOIRQ0_REG belongs to
> > battery IO. So we should skip this bit when checking for GPIO IRQ pending
> > status. Otherwise, wcove_gpio_irq_handler() might go into the infinite
> > loop until IRQ "pending" status becomes 0. This patch fixes this issue.
> >
> > Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
> 
> Looks fine to me, tentatively applied.
> 
> Bin, Mika, Andy, OK?

Looks fine to me as well :)

Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>

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#1631510 — Re: [PATCH v2 1/1] gpio: gpio-wcove: fix GPIO IRQ status mask

FromAndy Shevchenko <andy.shevchenko@gmail.com>
Date2017-04-26 17:00 +0200
SubjectRe: [PATCH v2 1/1] gpio: gpio-wcove: fix GPIO IRQ status mask
Message-ID<tAwAa-3Ev-29@gated-at.bofh.it>
In reply to#1631483
On Wed, Apr 26, 2017 at 5:26 PM, Linus Walleij <linus.walleij@linaro.org> wrote:
> On Mon, Apr 24, 2017 at 9:15 PM,
> <sathyanarayanan.kuppuswamy@linux.intel.com> wrote:
>
>> From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
>>
>> According to Whiskey Cove PMIC spec, bit 7 of GPIOIRQ0_REG belongs to
>> battery IO. So we should skip this bit when checking for GPIO IRQ pending
>> status. Otherwise, wcove_gpio_irq_handler() might go into the infinite
>> loop until IRQ "pending" status becomes 0. This patch fixes this issue.
>>
>> Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
>
> Looks fine to me, tentatively applied.
>
> Bin, Mika, Andy, OK?

Yes, thanks!


-- 
With Best Regards,
Andy Shevchenko

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#1631599 — RE: [PATCH v2 1/1] gpio: gpio-wcove: fix GPIO IRQ status mask

From"Gao, Bin" <bin.gao@intel.com>
Date2017-04-26 18:50 +0200
SubjectRE: [PATCH v2 1/1] gpio: gpio-wcove: fix GPIO IRQ status mask
Message-ID<tAyiB-4QP-9@gated-at.bofh.it>
In reply to#1631483
On Wed, April 26, 2017 at 7:26 AM, Linus Walleij wrote:
>On Mon, Apr 24, 2017 at 9:15 PM,
><sathyanarayanan.kuppuswamy@linux.intel.com> wrote:
>
>> From: Kuppuswamy Sathyanarayanan 
>> <sathyanarayanan.kuppuswamy@linux.intel.com>
>>
>> According to Whiskey Cove PMIC spec, bit 7 of GPIOIRQ0_REG belongs to 
>> battery IO. So we should skip this bit when checking for GPIO IRQ 
>> pending status. Otherwise, wcove_gpio_irq_handler() might go into the 
>> infinite loop until IRQ "pending" status becomes 0. This patch fixes this issue.
>>
>> Signed-off-by: Kuppuswamy Sathyanarayanan 
>> <sathyanarayanan.kuppuswamy@linux.intel.com>
>
>Looks fine to me, tentatively applied.
>
>Bin, Mika, Andy, OK?
>
>Yours,
>Linus Walleij

Looks reasonable to me.

Thanks,
Bin

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