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| Started by | Patrick Menschel <menschel.p@posteo.de> |
|---|---|
| First post | 2017-03-24 23:00 +0100 |
| Last post | 2017-03-27 11:00 +0200 |
| Articles | 4 — 2 participants |
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[PATCH v2 0/2] ARM: dts: sunxi: Add CAN node and can0_pins_a pinctrl setting Patrick Menschel <menschel.p@posteo.de> - 2017-03-24 23:00 +0100
[PATCH v2 1/2] ARM: dts: sun4i: Add CAN node and can0_pins_a pinctrl settings Patrick Menschel <menschel.p@posteo.de> - 2017-03-24 23:00 +0100
[PATCH v2 2/2] ARM: dts: sun7i: Add CAN node and can0_pins_a pinctrl settings Patrick Menschel <menschel.p@posteo.de> - 2017-03-24 23:00 +0100
Re: [PATCH v2 2/2] ARM: dts: sun7i: Add CAN node and can0_pins_a pinctrl settings Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-03-27 11:00 +0200
| From | Patrick Menschel <menschel.p@posteo.de> |
|---|---|
| Date | 2017-03-24 23:00 +0100 |
| Subject | [PATCH v2 0/2] ARM: dts: sunxi: Add CAN node and can0_pins_a pinctrl setting |
| Message-ID | <toFpw-7JB-1@gated-at.bofh.it> |
The Allwinner A10/A20 SoCs have an on-board CAN (Controller Area Network)
controller. This patch adds the CAN core to the SoC's include files,
sun4i-a10.dtsi and sun7i-a20.dtsi.
On linux-can mailing list was a discussion about updating the device tree bindings
https://lkml.org/lkml/2015/9/17/220
but it did not progress past writing the documentation file.
Documentation/devicetree/bindings/net/can/sun4i_can.txt
The CAN controller can be enabled in a board specific dts file as
described in the documentation file or by using a device tree overlay.
I have tested the patch v2 on a Banana Pi (A20 SoC) with mainline kernel 4.10.5.
History:
v2: changed can0_pins_a node contents to new generic binding method,
changed can0_pins_a node position by alphabetical order,
changed can0 device node position by rising physical address order
v1: initial
Patrick Menschel (2):
ARM: dts: sun4i: Add CAN node and can0_pins_a pinctrl settings
ARM: dts: sun7i: Add CAN node and can0_pins_a pinctrl settings
arch/arm/boot/dts/sun4i-a10.dtsi | 13 +++++++++++++
arch/arm/boot/dts/sun7i-a20.dtsi | 13 +++++++++++++
2 files changed, 26 insertions(+)
--
1.9.1
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| From | Patrick Menschel <menschel.p@posteo.de> |
|---|---|
| Date | 2017-03-24 23:00 +0100 |
| Subject | [PATCH v2 1/2] ARM: dts: sun4i: Add CAN node and can0_pins_a pinctrl settings |
| Message-ID | <toFpw-7JB-7@gated-at.bofh.it> |
| In reply to | #1609001 |
The A10 SoC has an on-board CAN controller. This patch adds the device node
and the corresponding pinctrl settings for pins PH20 and PH21.
This patch is adapted from the description in
Documentation/devicetree/bindings/net/can/sun4i_can.txt
Signed-off-by: Patrick Menschel <menschel.p@posteo.de>
---
arch/arm/boot/dts/sun4i-a10.dtsi | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index ba20b48..f7dced4 100644
--- a/arch/arm/boot/dts/sun4i-a10.dtsi
+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
@@ -974,6 +974,11 @@
#interrupt-cells = <3>;
#gpio-cells = <3>;
+ can0_pins_a: can0@0 {
+ pins = "PH20","PH21";
+ function = "can";
+ };
+
emac_pins_a: emac0@0 {
pins = "PA0", "PA1", "PA2",
"PA3", "PA4", "PA5", "PA6",
@@ -1313,6 +1318,14 @@
#size-cells = <0>;
};
+ can0: can@01c2bc00 {
+ compatible = "allwinner,sun4i-a10-can";
+ reg = <0x01c2bc00 0x400>;
+ interrupts = <26>;
+ clocks = <&apb1_gates 4>;
+ status = "disabled";
+ };
+
ps20: ps2@01c2a000 {
compatible = "allwinner,sun4i-a10-ps2";
reg = <0x01c2a000 0x400>;
--
1.9.1
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| From | Patrick Menschel <menschel.p@posteo.de> |
|---|---|
| Date | 2017-03-24 23:00 +0100 |
| Subject | [PATCH v2 2/2] ARM: dts: sun7i: Add CAN node and can0_pins_a pinctrl settings |
| Message-ID | <toFpw-7JB-3@gated-at.bofh.it> |
| In reply to | #1609001 |
The A20 SoC has an on-board CAN controller. This patch adds the device node
and the corresponding pinctrl settings for pins PH20 and PH21.
The CAN controller is inherited from the A10 SoC and uses the same driver.
This patch is adapted from the description in
Documentation/devicetree/bindings/net/can/sun4i_can.txt
Signed-off-by: Patrick Menschel <menschel.p@posteo.de>
---
arch/arm/boot/dts/sun7i-a20.dtsi | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index 2db97fc..25af586 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -1096,6 +1096,11 @@
#interrupt-cells = <3>;
#gpio-cells = <3>;
+ can0_pins_a: can0@0 {
+ pins = "PH20","PH21";
+ function = "can";
+ };
+
clk_out_a_pins_a: clk_out_a@0 {
pins = "PI12";
function = "clk_out_a";
@@ -1582,6 +1587,14 @@
#size-cells = <0>;
};
+ can0: can@01c2bc00 {
+ compatible = "allwinner,sun4i-a10-can";
+ reg = <0x01c2bc00 0x400>;
+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&apb1_gates 4>;
+ status = "disabled";
+ };
+
i2c4: i2c@01c2c000 {
compatible = "allwinner,sun7i-a20-i2c",
"allwinner,sun4i-a10-i2c";
--
1.9.1
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| From | Maxime Ripard <maxime.ripard@free-electrons.com> |
|---|---|
| Date | 2017-03-27 11:00 +0200 |
| Subject | Re: [PATCH v2 2/2] ARM: dts: sun7i: Add CAN node and can0_pins_a pinctrl settings |
| Message-ID | <tpyFk-5la-39@gated-at.bofh.it> |
| In reply to | #1609003 |
[Multipart message — attachments visible in raw view] — view raw
Hi Patrick,
On Fri, Mar 24, 2017 at 10:52:19PM +0100, Patrick Menschel wrote:
> The A20 SoC has an on-board CAN controller. This patch adds the device node
> and the corresponding pinctrl settings for pins PH20 and PH21.
>
> The CAN controller is inherited from the A10 SoC and uses the same driver.
>
> This patch is adapted from the description in
> Documentation/devicetree/bindings/net/can/sun4i_can.txt
>
> Signed-off-by: Patrick Menschel <menschel.p@posteo.de>
> ---
> arch/arm/boot/dts/sun7i-a20.dtsi | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
> index 2db97fc..25af586 100644
> --- a/arch/arm/boot/dts/sun7i-a20.dtsi
> +++ b/arch/arm/boot/dts/sun7i-a20.dtsi
> @@ -1096,6 +1096,11 @@
> #interrupt-cells = <3>;
> #gpio-cells = <3>;
>
> + can0_pins_a: can0@0 {
> + pins = "PH20","PH21";
> + function = "can";
> + };
> +
> clk_out_a_pins_a: clk_out_a@0 {
> pins = "PI12";
> function = "clk_out_a";
> @@ -1582,6 +1587,14 @@
> #size-cells = <0>;
> };
>
> + can0: can@01c2bc00 {
> + compatible = "allwinner,sun4i-a10-can";
Sorry for not spotting this earlier, but this would need an A20
compatible too, to deal with the case where it turns out not to be
compatible.
you can do something like this:
compatible = "allwinner,sun7i-a20-can", "allwinner,sun4i-a10-can";
Ideally the pinctrl groups addition should be split out in a separate
patch too.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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